diff options
Diffstat (limited to 'bsps/riscv/riscv/clock/clockdrv.c')
-rw-r--r-- | bsps/riscv/riscv/clock/clockdrv.c | 56 |
1 files changed, 24 insertions, 32 deletions
diff --git a/bsps/riscv/riscv/clock/clockdrv.c b/bsps/riscv/riscv/clock/clockdrv.c index 3afe86576f..d2f8f5da54 100644 --- a/bsps/riscv/riscv/clock/clockdrv.c +++ b/bsps/riscv/riscv/clock/clockdrv.c @@ -1,13 +1,14 @@ /** * @file * - * @ingroup bsp_clock + * @ingroup RTEMSDriverClockImpl * - * @brief riscv clock support. + * @brief This source file contains the implementation of the riscv Clock + * Driver. */ /* - * Copyright (c) 2018 embedded brains GmbH + * Copyright (C) 2018, 2023 embedded brains GmbH & Co. KG * COPYRIGHT (c) 2015 Hesham Alatary <hesham@alumni.york.ac.uk> * * Redistribution and use in source and binary forms, with or without @@ -40,13 +41,12 @@ #include <rtems/sysinit.h> #include <rtems/timecounter.h> #include <rtems/score/cpuimpl.h> +#include <rtems/score/percpu.h> #include <rtems/score/riscv-utility.h> +#include <rtems/score/smpimpl.h> #include <libfdt.h> -/* This is defined in dev/clock/clockimpl.h */ -void Clock_isr(void *arg); - typedef struct { struct timecounter base; volatile RISCV_CLINT_regs *clint; @@ -90,19 +90,19 @@ static uint64_t riscv_clock_read_mtime(volatile RISCV_CLINT_timer_reg *mtime) static void riscv_clock_at_tick(riscv_timecounter *tc) { - volatile RISCV_CLINT_regs *clint; + Per_CPU_Control *cpu_self; + volatile RISCV_CLINT_timer_reg *mtimecmp; uint64_t value; - uint32_t cpu = rtems_scheduler_get_processor(); - clint = tc->clint; - - value = clint->mtimecmp[cpu].val_64; + cpu_self = _Per_CPU_Get(); + mtimecmp = cpu_self->cpu_per_cpu.clint_mtimecmp; + value = mtimecmp->val_64; value += tc->interval; - riscv_clock_write_mtimecmp(&clint->mtimecmp[cpu], value); + riscv_clock_write_mtimecmp(mtimecmp, value); } -static void riscv_clock_handler_install(void) +static void riscv_clock_handler_install(rtems_interrupt_handler handler) { rtems_status_code sc; @@ -110,8 +110,8 @@ static void riscv_clock_handler_install(void) RISCV_INTERRUPT_VECTOR_TIMER, "Clock", RTEMS_INTERRUPT_UNIQUE, - (rtems_interrupt_handler) Clock_isr, - NULL + handler, + &riscv_clock_tc ); if (sc != RTEMS_SUCCESSFUL) { bsp_fatal(RISCV_FATAL_CLOCK_IRQ_INSTALL); @@ -149,16 +149,12 @@ static uint32_t riscv_clock_get_timebase_frequency(const void *fdt) return fdt32_to_cpu(*val); } -static void riscv_clock_clint_init( - volatile RISCV_CLINT_regs *clint, - uint64_t cmpval, - uint32_t cpu -) +static void riscv_clock_clint_init(uint64_t cmpval) { - riscv_clock_write_mtimecmp( - &clint->mtimecmp[cpu], - cmpval - ); + Per_CPU_Control *cpu_self; + + cpu_self = _Per_CPU_Get(); + riscv_clock_write_mtimecmp(cpu_self->cpu_per_cpu.clint_mtimecmp, cmpval); /* Enable mtimer interrupts */ set_csr(mie, MIP_MTIP); @@ -167,11 +163,7 @@ static void riscv_clock_clint_init( #if defined(RTEMS_SMP) && !defined(CLOCK_DRIVER_USE_ONLY_BOOT_PROCESSOR) static void riscv_clock_secondary_action(void *arg) { - volatile RISCV_CLINT_regs *clint = riscv_clint; - uint64_t *cmpval = arg; - uint32_t cpu = _CPU_SMP_Get_current_processor(); - - riscv_clock_clint_init(clint, *cmpval, cpu); + riscv_clock_clint_init(*(uint64_t *) arg); } #endif @@ -213,7 +205,7 @@ static void riscv_clock_initialize(void) cmpval = riscv_clock_read_mtime(&clint->mtime); cmpval += interval; - riscv_clock_clint_init(clint, cmpval, 0); + riscv_clock_clint_init(cmpval); riscv_clock_secondary_initialization(clint, cmpval, interval); /* Initialize timecounter */ @@ -247,11 +239,11 @@ RTEMS_SYSINIT_ITEM( RTEMS_SYSINIT_ORDER_FIRST ); -#define Clock_driver_support_at_tick() riscv_clock_at_tick(&riscv_clock_tc) +#define Clock_driver_support_at_tick(arg) riscv_clock_at_tick(arg) #define Clock_driver_support_initialize_hardware() riscv_clock_initialize() #define Clock_driver_support_install_isr(isr) \ - riscv_clock_handler_install() + riscv_clock_handler_install(isr) #include "../../../shared/dev/clock/clockimpl.h" |