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-rw-r--r--bsps/arm/shared/start/arm-a9mpcore-smp.c43
-rw-r--r--bsps/arm/shared/start/bsp-start-memcpy.S27
-rw-r--r--bsps/arm/shared/start/bspreset-armv7m.c27
-rw-r--r--bsps/arm/shared/start/bspstarthook0-empty.c42
-rw-r--r--bsps/arm/shared/start/linkcmds.armv42
-rw-r--r--bsps/arm/shared/start/linkcmds.armv7m2
-rw-r--r--bsps/arm/shared/start/linkcmds.base6
-rw-r--r--bsps/arm/shared/start/start.S11
8 files changed, 135 insertions, 25 deletions
diff --git a/bsps/arm/shared/start/arm-a9mpcore-smp.c b/bsps/arm/shared/start/arm-a9mpcore-smp.c
index a9970b952c..c99f68f9cf 100644
--- a/bsps/arm/shared/start/arm-a9mpcore-smp.c
+++ b/bsps/arm/shared/start/arm-a9mpcore-smp.c
@@ -1,9 +1,28 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
/*
- * Copyright (c) 2013, 2018 embedded brains GmbH. All rights reserved.
+ * Copyright (C) 2013, 2018 embedded brains GmbH & Co. KG
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
*
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
*/
#include <rtems/score/smpimpl.h>
@@ -22,20 +41,24 @@ uint32_t _CPU_SMP_Initialize(void)
return arm_gic_irq_processor_count();
}
+static rtems_interrupt_entry arm_a9mpcore_ipi_entry =
+ RTEMS_INTERRUPT_ENTRY_INITIALIZER(
+ bsp_inter_processor_interrupt,
+ NULL,
+ "IPI"
+ );
+
void _CPU_SMP_Finalize_initialization(uint32_t cpu_count)
{
if (cpu_count > 0) {
rtems_status_code sc;
- sc = rtems_interrupt_handler_install(
+ sc = rtems_interrupt_entry_install(
ARM_GIC_IRQ_SGI_0,
- "IPI",
RTEMS_INTERRUPT_UNIQUE,
- bsp_inter_processor_interrupt,
- NULL
+ &arm_a9mpcore_ipi_entry
);
- _Assert(sc == RTEMS_SUCCESSFUL);
- (void) sc;
+ _Assert_Unused_variable_equals(sc, RTEMS_SUCCESSFUL);
#if defined(BSP_DATA_CACHE_ENABLED) || defined(BSP_INSTRUCTION_CACHE_ENABLED)
/* Enable unified L2 cache */
diff --git a/bsps/arm/shared/start/bsp-start-memcpy.S b/bsps/arm/shared/start/bsp-start-memcpy.S
index 8a7632821c..0cfd47b820 100644
--- a/bsps/arm/shared/start/bsp-start-memcpy.S
+++ b/bsps/arm/shared/start/bsp-start-memcpy.S
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
/**
* @file
*
@@ -5,11 +7,28 @@
*/
/*
- * Copyright (c) 2008-2011 embedded brains GmbH. All rights reserved.
+ * Copyright (C) 2008, 2011 embedded brains GmbH & Co. KG
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
*
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
*/
#include <rtems/asm.h>
diff --git a/bsps/arm/shared/start/bspreset-armv7m.c b/bsps/arm/shared/start/bspreset-armv7m.c
index 3afc0b6b69..816334bd70 100644
--- a/bsps/arm/shared/start/bspreset-armv7m.c
+++ b/bsps/arm/shared/start/bspreset-armv7m.c
@@ -1,9 +1,28 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
/*
- * Copyright (c) 2015 embedded brains GmbH. All rights reserved.
+ * Copyright (c) 2015 embedded brains GmbH & Co. KG
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
*
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
*/
#include <rtems.h>
diff --git a/bsps/arm/shared/start/bspstarthook0-empty.c b/bsps/arm/shared/start/bspstarthook0-empty.c
new file mode 100644
index 0000000000..65e2efcf03
--- /dev/null
+++ b/bsps/arm/shared/start/bspstarthook0-empty.c
@@ -0,0 +1,42 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSBSPsARMShared
+ *
+ * @brief This source file contains a bsp_start_hook_0() implentation which
+ * does nothing.
+ */
+
+/*
+ * Copyright (C) 2023 embedded brains GmbH & Co. KG
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <bsp/start.h>
+
+void BSP_START_TEXT_SECTION bsp_start_hook_0( void )
+{
+ /* Do nothing */
+}
diff --git a/bsps/arm/shared/start/linkcmds.armv4 b/bsps/arm/shared/start/linkcmds.armv4
index d78a08eb48..e666c953f3 100644
--- a/bsps/arm/shared/start/linkcmds.armv4
+++ b/bsps/arm/shared/start/linkcmds.armv4
@@ -7,7 +7,7 @@
*/
/*
- * Copyright (c) 2010-2014 embedded brains GmbH. All rights reserved.
+ * Copyright (C) 2010, 2014 embedded brains GmbH & Co. KG
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
diff --git a/bsps/arm/shared/start/linkcmds.armv7m b/bsps/arm/shared/start/linkcmds.armv7m
index ccc73734e7..2bface96ee 100644
--- a/bsps/arm/shared/start/linkcmds.armv7m
+++ b/bsps/arm/shared/start/linkcmds.armv7m
@@ -7,7 +7,7 @@
*/
/*
- * Copyright (c) 2010 embedded brains GmbH. All rights reserved.
+ * Copyright (c) 2010 embedded brains GmbH & Co. KG
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
diff --git a/bsps/arm/shared/start/linkcmds.base b/bsps/arm/shared/start/linkcmds.base
index 10d2c54028..aeca87005b 100644
--- a/bsps/arm/shared/start/linkcmds.base
+++ b/bsps/arm/shared/start/linkcmds.base
@@ -7,7 +7,7 @@
*/
/*
- * Copyright (c) 2008, 2016 embedded brains GmbH. All rights reserved.
+ * Copyright (C) 2008, 2016 embedded brains GmbH & Co. KG
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
@@ -152,7 +152,7 @@ SECTIONS {
} > REGION_RODATA AT > REGION_RODATA_LOAD
.data.rel.ro : ALIGN_WITH_INPUT {
*(.data.rel.ro.local* .gnu.linkonce.d.rel.ro.local.*)
- *(.data.rel.ro* .gnu.linkonce.d.rel.ro.*)
+ *(.data.rel.ro .data.rel.ro.* .gnu.linkonce.d.rel.ro.*)
} > REGION_RODATA AT > REGION_RODATA_LOAD
.jcr : ALIGN_WITH_INPUT {
KEEP (*(.jcr))
@@ -334,7 +334,7 @@ SECTIONS {
.noinit (NOLOAD) : ALIGN_WITH_INPUT {
bsp_section_noinit_begin = .;
- *(.noinit*)
+ *(SORT_BY_NAME (SORT_BY_ALIGNMENT (.noinit*)))
bsp_section_noinit_end = .;
} > REGION_WORK AT > REGION_WORK
bsp_section_noinit_size = bsp_section_noinit_end - bsp_section_noinit_begin;
diff --git a/bsps/arm/shared/start/start.S b/bsps/arm/shared/start/start.S
index b90801c2aa..dfd0d3891d 100644
--- a/bsps/arm/shared/start/start.S
+++ b/bsps/arm/shared/start/start.S
@@ -5,7 +5,7 @@
*/
/*
- * Copyright (c) 2008, 2020 embedded brains GmbH. All rights reserved.
+ * Copyright (C) 2008, 2020 embedded brains GmbH & Co. KG
*
* Copyright (c) 2016 Pavel Pisa <pisa@cmp.felk.cvut.cz>
*
@@ -29,7 +29,9 @@
/* Global symbols */
.globl _start
+ .type _start, %function
.globl bsp_start_hook_0_done
+ .type bsp_start_hook_0_done, %function
.globl bsp_start_vector_table_begin
.globl bsp_start_vector_table_end
.globl bsp_start_vector_table_size
@@ -75,6 +77,10 @@ bsp_start_vector_table_begin:
ldr pc, .Lhandler_addr_irq
ldr pc, .Lhandler_addr_fiq
+#ifdef BSP_START_VECTOR_ADDRESS_TABLE_ALIGNMENT
+.balign BSP_START_VECTOR_ADDRESS_TABLE_ALIGNMENT
+#endif
+
.Lhandler_addr_reset:
#ifdef BSP_START_RESET_VECTOR
@@ -194,7 +200,7 @@ _start:
/*
* Check that this is a configured processor. If not, then there is
- * not much what can be done since we do not have a stack available for
+ * not much that can be done since we do not have a stack available for
* this processor. Just loop forever in this case.
*/
ldr r1, =_SMP_Processor_configured_maximum
@@ -285,6 +291,7 @@ _start:
sub r3, r3, r1
#ifdef BSP_START_NEEDS_REGISTER_INITIALIZATION
+ /* These are banked FIQ mode registers */
mov r8, #0
mov r9, #0
mov r10, #0
generated by cgit v1.2.3 (git 2.25.1) at 2024-04-28 09:18:47 +0000