diff options
| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2019-07-19 13:09:43 +0200 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2020-09-14 07:11:32 +0200 |
| commit | f3f0370f1054f4e49aa8f5ea70485d673e8e94b6 (patch) | |
| tree | 11d44920353aea9bf4301eb267f8c831e622520e /spec/build/bsps/riscv | |
| parent | i386/score: fix assembly mnemonic (diff) | |
| download | rtems-f3f0370f1054f4e49aa8f5ea70485d673e8e94b6.tar.bz2 | |
build: Alternative build system based on waf
Update #3818.
Diffstat (limited to 'spec/build/bsps/riscv')
42 files changed, 1338 insertions, 0 deletions
diff --git a/spec/build/bsps/riscv/griscv/abi.yml b/spec/build/bsps/riscv/griscv/abi.yml new file mode 100644 index 0000000000..fc915468ae --- /dev/null +++ b/spec/build/bsps/riscv/griscv/abi.yml @@ -0,0 +1,38 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-string: null +- split: null +- env-append: null +build-type: option +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +default: +- -march=rv32imafdc +- -mabi=ilp32d +default-by-variant: +- value: + - -march=rv32imac + - -mabi=ilp32 + variants: + - riscv/grv32imac +- value: + - -march=rv32im + - -mabi=ilp32 + variants: + - riscv/grv32im +- value: + - -march=rv32i + - -mabi=ilp32 + variants: + - riscv/grv32i +- value: + - -march=rv32imafd + - -mabi=ilp32d + variants: + - riscv/griscv +description: | + ABI flags +enabled-by: true +links: [] +name: ABI_FLAGS +type: build diff --git a/spec/build/bsps/riscv/griscv/bspgriscv.yml b/spec/build/bsps/riscv/griscv/bspgriscv.yml new file mode 100644 index 0000000000..1992d096de --- /dev/null +++ b/spec/build/bsps/riscv/griscv/bspgriscv.yml @@ -0,0 +1,19 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +arch: riscv +bsp: griscv +build-type: bsp +cflags: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +cppflags: [] +enabled-by: true +family: griscv +includes: [] +install: [] +links: +- role: build-dependency + uid: ../../opto2 +- role: build-dependency + uid: grp +source: [] +type: build diff --git a/spec/build/bsps/riscv/griscv/bspgrv32i.yml b/spec/build/bsps/riscv/griscv/bspgrv32i.yml new file mode 100644 index 0000000000..4f130b6cc7 --- /dev/null +++ b/spec/build/bsps/riscv/griscv/bspgrv32i.yml @@ -0,0 +1,19 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +arch: riscv +bsp: grv32i +build-type: bsp +cflags: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +cppflags: [] +enabled-by: true +family: griscv +includes: [] +install: [] +links: +- role: build-dependency + uid: ../../opto2 +- role: build-dependency + uid: grp +source: [] +type: build diff --git a/spec/build/bsps/riscv/griscv/bspgrv32im.yml b/spec/build/bsps/riscv/griscv/bspgrv32im.yml new file mode 100644 index 0000000000..ed17f1ae11 --- /dev/null +++ b/spec/build/bsps/riscv/griscv/bspgrv32im.yml @@ -0,0 +1,19 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +arch: riscv +bsp: grv32im +build-type: bsp +cflags: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +cppflags: [] +enabled-by: true +family: griscv +includes: [] +install: [] +links: +- role: build-dependency + uid: ../../opto2 +- role: build-dependency + uid: grp +source: [] +type: build diff --git a/spec/build/bsps/riscv/griscv/bspgrv32imac.yml b/spec/build/bsps/riscv/griscv/bspgrv32imac.yml new file mode 100644 index 0000000000..32c4807b57 --- /dev/null +++ b/spec/build/bsps/riscv/griscv/bspgrv32imac.yml @@ -0,0 +1,19 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +arch: riscv +bsp: grv32imac +build-type: bsp +cflags: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +cppflags: [] +enabled-by: true +family: griscv +includes: [] +install: [] +links: +- role: build-dependency + uid: ../../opto2 +- role: build-dependency + uid: grp +source: [] +type: build diff --git a/spec/build/bsps/riscv/griscv/bspgrv32imafdc.yml b/spec/build/bsps/riscv/griscv/bspgrv32imafdc.yml new file mode 100644 index 0000000000..1448e19869 --- /dev/null +++ b/spec/build/bsps/riscv/griscv/bspgrv32imafdc.yml @@ -0,0 +1,19 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +arch: riscv +bsp: grv32imafdc +build-type: bsp +cflags: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +cppflags: [] +enabled-by: true +family: griscv +includes: [] +install: [] +links: +- role: build-dependency + uid: ../../opto2 +- role: build-dependency + uid: grp +source: [] +type: build diff --git a/spec/build/bsps/riscv/griscv/grp.yml b/spec/build/bsps/riscv/griscv/grp.yml new file mode 100644 index 0000000000..1945d984f5 --- /dev/null +++ b/spec/build/bsps/riscv/griscv/grp.yml @@ -0,0 +1,46 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +build-type: group +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +enabled-by: true +includes: [] +install: [] +ldflags: [] +links: +- role: build-dependency + uid: ../../obj +- role: build-dependency + uid: ../../objgrlib +- role: build-dependency + uid: ../../objirq +- role: build-dependency + uid: ../../optclang +- role: build-dependency + uid: ../../optconsolebaud +- role: build-dependency + uid: ../../optgcc +- role: build-dependency + uid: abi +- role: build-dependency + uid: obj +- role: build-dependency + uid: objsmp +- role: build-dependency + uid: optextirqmax +- role: build-dependency + uid: ../grp +- role: build-dependency + uid: ../optrambegin +- role: build-dependency + uid: ../optramsize +- role: build-dependency + uid: ../linkcmds +- role: build-dependency + uid: ../linkcmdsbase +- role: build-dependency + uid: ../start +- role: build-dependency + uid: ../../bspopts +type: build +use-after: [] +use-before: [] diff --git a/spec/build/bsps/riscv/griscv/obj.yml b/spec/build/bsps/riscv/griscv/obj.yml new file mode 100644 index 0000000000..769364c8fc --- /dev/null +++ b/spec/build/bsps/riscv/griscv/obj.yml @@ -0,0 +1,36 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +build-type: objects +cflags: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +cppflags: [] +cxxflags: [] +enabled-by: true +includes: [] +install: +- destination: ${BSP_INCLUDEDIR} + source: + - bsps/riscv/griscv/include/amba.h + - bsps/riscv/griscv/include/bsp.h + - bsps/riscv/griscv/include/tm27.h +- destination: ${BSP_INCLUDEDIR}/bsp + source: + - bsps/riscv/griscv/include/bsp/irq.h +links: [] +source: +- bsps/riscv/griscv/clock/clockdrv.c +- bsps/riscv/griscv/console/console.c +- bsps/riscv/griscv/console/printk_support.c +- bsps/riscv/griscv/irq/irq.c +- bsps/riscv/griscv/start/amba.c +- bsps/riscv/griscv/start/bsp_fatal_halt.c +- bsps/riscv/griscv/start/bspstart.c +- bsps/shared/cache/nocache.c +- bsps/shared/dev/btimer/btimer-stub.c +- bsps/shared/dev/getentropy/getentropy-cpucounter.c +- bsps/shared/dev/serial/console-termios.c +- bsps/shared/irq/irq-default-handler.c +- bsps/shared/start/bspfatal-default.c +- bsps/shared/start/bspgetworkarea-default.c +- bsps/shared/start/bspreset-empty.c +type: build diff --git a/spec/build/bsps/riscv/griscv/objsmp.yml b/spec/build/bsps/riscv/griscv/objsmp.yml new file mode 100644 index 0000000000..83f5bb7f31 --- /dev/null +++ b/spec/build/bsps/riscv/griscv/objsmp.yml @@ -0,0 +1,15 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +build-type: objects +cflags: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +cppflags: [] +cxxflags: [] +enabled-by: +- RTEMS_SMP +includes: [] +install: [] +links: [] +source: +- bsps/riscv/griscv/start/bspsmp.c +type: build diff --git a/spec/build/bsps/riscv/griscv/optextirqmax.yml b/spec/build/bsps/riscv/griscv/optextirqmax.yml new file mode 100644 index 0000000000..ffa84748b6 --- /dev/null +++ b/spec/build/bsps/riscv/griscv/optextirqmax.yml @@ -0,0 +1,16 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-integer: null +- define: null +build-type: option +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +default: 64 +default-by-variant: [] +description: | + maximum number of external interrupts supported by the BSP (default 64) +enabled-by: true +format: '{}' +links: [] +name: RISCV_MAXIMUM_EXTERNAL_INTERRUPTS +type: build diff --git a/spec/build/bsps/riscv/grp.yml b/spec/build/bsps/riscv/grp.yml new file mode 100644 index 0000000000..7dad3970c5 --- /dev/null +++ b/spec/build/bsps/riscv/grp.yml @@ -0,0 +1,15 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +build-type: group +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +enabled-by: true +includes: [] +install: +- destination: ${BSP_INCLUDEDIR}/bsp + source: + - bsps/riscv/include/bsp/linker-symbols.h +ldflags: [] +links: [] +type: build +use-after: [] +use-before: [] diff --git a/spec/build/bsps/riscv/linkcmds.yml b/spec/build/bsps/riscv/linkcmds.yml new file mode 100644 index 0000000000..ed536b3c5d --- /dev/null +++ b/spec/build/bsps/riscv/linkcmds.yml @@ -0,0 +1,29 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +build-type: config-file +content: | + MEMORY { + RAM : ORIGIN = ${RISCV_RAM_REGION_BEGIN}, LENGTH = ${RISCV_RAM_REGION_SIZE} + } + + REGION_ALIAS ("REGION_START", RAM); + REGION_ALIAS ("REGION_TEXT", RAM); + REGION_ALIAS ("REGION_TEXT_LOAD", RAM); + REGION_ALIAS ("REGION_FAST_TEXT", RAM); + REGION_ALIAS ("REGION_FAST_TEXT_LOAD", RAM); + REGION_ALIAS ("REGION_RODATA", RAM); + REGION_ALIAS ("REGION_RODATA_LOAD", RAM); + REGION_ALIAS ("REGION_DATA", RAM); + REGION_ALIAS ("REGION_DATA_LOAD", RAM); + REGION_ALIAS ("REGION_FAST_DATA", RAM); + REGION_ALIAS ("REGION_FAST_DATA_LOAD", RAM); + REGION_ALIAS ("REGION_RTEMSSTACK", RAM); + REGION_ALIAS ("REGION_WORK", RAM); + + INCLUDE linkcmds.base +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +enabled-by: true +install-path: ${BSP_LIBDIR} +links: [] +target: linkcmds +type: build diff --git a/spec/build/bsps/riscv/linkcmdsbase.yml b/spec/build/bsps/riscv/linkcmdsbase.yml new file mode 100644 index 0000000000..cbc769552e --- /dev/null +++ b/spec/build/bsps/riscv/linkcmdsbase.yml @@ -0,0 +1,401 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +build-type: config-file +content: | + /* Copyright (C) 2014-2018 Free Software Foundation, Inc. + Copying and distribution of this script, with or without modification, + are permitted in any medium without royalty provided the copyright + notice and this notice are preserved. */ + + /* + * Copyright (c) 2018 embedded brains GmbH. + * + * Copyright (c) 2015 University of York. + * Hesham ALMatary <hmka501@york.ac.uk> + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + + OUTPUT_ARCH(riscv) + ENTRY(_start) + ${LINKCMDS_START_DIRECTIVE}(start.o) + + bsp_section_robarrier_align = DEFINED (bsp_section_robarrier_align) ? bsp_section_robarrier_align : 1; + bsp_section_rwbarrier_align = DEFINED (bsp_section_rwbarrier_align) ? bsp_section_rwbarrier_align : 1; + + MEMORY { + UNEXPECTED_SECTIONS : ORIGIN = 0xffffffff, LENGTH = 0 + } + + SECTIONS { + .start : ${LINKCMDS_ALIGN_DIRECTIVE} { + bsp_section_start_begin = .; + KEEP (*(.bsp_start_text)) + KEEP (*(.bsp_start_data)) + bsp_section_start_end = .; + } > REGION_START AT > REGION_START + bsp_section_start_size = bsp_section_start_end - bsp_section_start_begin; + + .text : ${LINKCMDS_ALIGN_DIRECTIVE} { + bsp_section_text_begin = .; + *(.text.unlikely .text.*_unlikely .text.unlikely.*) + *(.text.exit .text.exit.*) + *(.text.startup .text.startup.*) + *(.text.hot .text.hot.*) + *(.text .stub .text.* .gnu.linkonce.t.*) + /* .gnu.warning sections are handled specially by elf32.em. */ + *(.gnu.warning) + } > REGION_TEXT AT > REGION_TEXT_LOAD + .init : ${LINKCMDS_ALIGN_DIRECTIVE} { + KEEP (*(SORT_NONE(.init))) + } > REGION_TEXT AT > REGION_TEXT_LOAD + .fini : ${LINKCMDS_ALIGN_DIRECTIVE} { + KEEP (*(SORT_NONE(.fini))) + bsp_section_text_end = .; + } > REGION_TEXT AT > REGION_TEXT_LOAD + bsp_section_text_size = bsp_section_text_end - bsp_section_text_begin; + bsp_section_text_load_begin = LOADADDR (.text); + bsp_section_text_load_end = bsp_section_text_load_begin + bsp_section_text_size; + + .robarrier : ${LINKCMDS_ALIGN_DIRECTIVE} { + . = ALIGN (bsp_section_robarrier_align); + } > REGION_RODATA AT > REGION_RODATA + + .rodata : ${LINKCMDS_ALIGN_DIRECTIVE} { + bsp_section_rodata_begin = .; + *(.rodata .rodata.* .gnu.linkonce.r.*) + } > REGION_RODATA AT > REGION_RODATA_LOAD + .rodata1 : ${LINKCMDS_ALIGN_DIRECTIVE} { + *(.rodata1) + } > REGION_RODATA AT > REGION_RODATA_LOAD + .sdata2 : ${LINKCMDS_ALIGN_DIRECTIVE} { + *(.sdata2 .sdata2.* .gnu.linkonce.s2.*) + } > REGION_RODATA AT > REGION_RODATA_LOAD + .sbss2 : ${LINKCMDS_ALIGN_DIRECTIVE} { + *(.sbss2 .sbss2.* .gnu.linkonce.sb2.*) + } > REGION_RODATA AT > REGION_RODATA_LOAD + .eh_frame_hdr : ${LINKCMDS_ALIGN_DIRECTIVE} { + *(.eh_frame_hdr) *(.eh_frame_entry .eh_frame_entry.*) + } > REGION_RODATA AT > REGION_RODATA_LOAD + .eh_frame : ${LINKCMDS_ALIGN_DIRECTIVE} { + KEEP (*(.eh_frame)) *(.eh_frame.*) + } > REGION_RODATA AT > REGION_RODATA_LOAD + .gcc_except_table : ${LINKCMDS_ALIGN_DIRECTIVE} { + *(.gcc_except_table .gcc_except_table.*) + } > REGION_RODATA AT > REGION_RODATA_LOAD + .gnu_extab : ${LINKCMDS_ALIGN_DIRECTIVE} { + *(.gnu_extab*) + } > REGION_RODATA AT > REGION_RODATA_LOAD + .tdata : ${LINKCMDS_ALIGN_DIRECTIVE} { + _TLS_Data_begin = .; + *(.tdata .tdata.* .gnu.linkonce.td.*) + _TLS_Data_end = .; + } > REGION_RODATA AT > REGION_RODATA_LOAD + .tbss : ${LINKCMDS_ALIGN_DIRECTIVE} { + _TLS_BSS_begin = .; + *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) + _TLS_BSS_end = .; + } > REGION_RODATA AT > REGION_RODATA_LOAD + _TLS_Data_size = _TLS_Data_end - _TLS_Data_begin; + _TLS_Data_begin = _TLS_Data_size != 0 ? _TLS_Data_begin : _TLS_BSS_begin; + _TLS_Data_end = _TLS_Data_size != 0 ? _TLS_Data_end : _TLS_BSS_begin; + _TLS_BSS_size = _TLS_BSS_end - _TLS_BSS_begin; + _TLS_Size = _TLS_BSS_end - _TLS_Data_begin; + _TLS_Alignment = MAX (ALIGNOF (.tdata), ALIGNOF (.tbss)); + .preinit_array : ${LINKCMDS_ALIGN_DIRECTIVE} { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } > REGION_RODATA AT > REGION_RODATA_LOAD + .init_array : ${LINKCMDS_ALIGN_DIRECTIVE} { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*))) + KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors)) + PROVIDE_HIDDEN (__init_array_end = .); + } > REGION_RODATA AT > REGION_RODATA_LOAD + .fini_array : ${LINKCMDS_ALIGN_DIRECTIVE} { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*))) + KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors)) + PROVIDE_HIDDEN (__fini_array_end = .); + } > REGION_RODATA AT > REGION_RODATA_LOAD + .ctors : ${LINKCMDS_ALIGN_DIRECTIVE} { + /* gcc uses crtbegin.o to find the start of + the constructors, so we make sure it is + first. Because this is a wildcard, it + doesn't matter if the user does not + actually link against crtbegin.o; the + linker won't look for a file to match a + wildcard. The wildcard also means that it + doesn't matter which directory crtbegin.o + is in. */ + KEEP (*crtbegin.o(.ctors)) + KEEP (*crtbegin?.o(.ctors)) + /* We don't want to include the .ctor section from + the crtend.o file until after the sorted ctors. + The .ctor section from the crtend file contains the + end of ctors marker and it must be last */ + KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + } > REGION_RODATA AT > REGION_RODATA_LOAD + .dtors : ${LINKCMDS_ALIGN_DIRECTIVE} { + KEEP (*crtbegin.o(.dtors)) + KEEP (*crtbegin?.o(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + } > REGION_RODATA AT > REGION_RODATA_LOAD + .data.rel.ro : ${LINKCMDS_ALIGN_DIRECTIVE} { + *(.data.rel.ro.local* .gnu.linkonce.d.rel.ro.local.*) + *(.data.rel.ro .data.rel.ro.* .gnu.linkonce.d.rel.ro.*) + } > REGION_RODATA AT > REGION_RODATA_LOAD + .jcr : ${LINKCMDS_ALIGN_DIRECTIVE} { + KEEP (*(.jcr)) + } > REGION_RODATA AT > REGION_RODATA_LOAD + .interp : ${LINKCMDS_ALIGN_DIRECTIVE} { + *(.interp) + } > REGION_RODATA AT > REGION_RODATA_LOAD + .note.gnu.build-id : { *(.note.gnu.build-id) + } > REGION_RODATA AT > REGION_RODATA_LOAD + .hash : ${LINKCMDS_ALIGN_DIRECTIVE} { + *(.hash) + } > REGION_RODATA AT > REGION_RODATA_LOAD + .gnu.hash : ${LINKCMDS_ALIGN_DIRECTIVE} { + *(.gnu.hash) + } > REGION_RODATA AT > REGION_RODATA_LOAD + .dynsym : ${LINKCMDS_ALIGN_DIRECTIVE} { + *(.dynsym) + } > REGION_RODATA AT > REGION_RODATA_LOAD + .dynstr : ${LINKCMDS_ALIGN_DIRECTIVE} { + *(.dynstr) + } > REGION_RODATA AT > REGION_RODATA_LOAD + .gnu.version : ${LINKCMDS_ALIGN_DIRECTIVE} { + *(.gnu.version) + } > REGION_RODATA AT > REGION_RODATA_LOAD + .gnu.version_d : ${LINKCMDS_ALIGN_DIRECTIVE} { + *(.gnu.version_d) + } > REGION_RODATA AT > REGION_RODATA_LOAD + .gnu.version_r : ${LINKCMDS_ALIGN_DIRECTIVE} { + *(.gnu.version_r) + } > REGION_RODATA AT > REGION_RODATA_LOAD + .rela.dyn : ${LINKCMDS_ALIGN_DIRECTIVE} { + *(.rela.init) + *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*) + *(.rela.fini) + *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*) + *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*) + *(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*) + *(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*) + *(.rela.ctors) + *(.rela.dtors) + *(.rela.got) + *(.rela.sdata .rela.sdata.* .rela.gnu.linkonce.s.*) + *(.rela.sbss .rela.sbss.* .rela.gnu.linkonce.sb.*) + *(.rela.sdata2 .rela.sdata2.* .rela.gnu.linkonce.s2.*) + *(.rela.sbss2 .rela.sbss2.* .rela.gnu.linkonce.sb2.*) + *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*) + PROVIDE_HIDDEN (__rela_iplt_start = .); + *(.rela.iplt) + PROVIDE_HIDDEN (__rela_iplt_end = .); + } > REGION_RODATA AT > REGION_RODATA_LOAD + .rela.plt : ${LINKCMDS_ALIGN_DIRECTIVE} { + *(.rela.plt) + } > REGION_RODATA AT > REGION_RODATA_LOAD + .plt : ${LINKCMDS_ALIGN_DIRECTIVE} { + *(.plt) + } > REGION_RODATA AT > REGION_RODATA_LOAD + .iplt : ${LINKCMDS_ALIGN_DIRECTIVE} { + *(.iplt) + } > REGION_RODATA AT > REGION_RODATA_LOAD + .dynamic : ${LINKCMDS_ALIGN_DIRECTIVE} { + *(.dynamic) + } > REGION_RODATA AT > REGION_RODATA_LOAD + .tm_clone_table : ${LINKCMDS_ALIGN_DIRECTIVE} { + *(.tm_clone_table) + } > REGION_RODATA AT > REGION_RODATA_LOAD + .got : ${LINKCMDS_ALIGN_DIRECTIVE} { + *(.got.plt) *(.igot.plt) *(.got) *(.igot) + } > REGION_RODATA AT > REGION_RODATA_LOAD + .rtemsroset : ${LINKCMDS_ALIGN_DIRECTIVE} { + /* Special FreeBSD linker set sections */ + __start_set_sysctl_set = .; + *(set_sysctl_*); + __stop_set_sysctl_set = .; + *(set_domain_*); + *(set_pseudo_*); + + KEEP (*(SORT(.rtemsroset.*))) + bsp_section_rodata_end = .; + } > REGION_RODATA AT > REGION_RODATA_LOAD + bsp_section_rodata_size = bsp_section_rodata_end - bsp_section_rodata_begin; + bsp_section_rodata_load_begin = LOADADDR (.rodata); + bsp_section_rodata_load_end = bsp_section_rodata_load_begin + bsp_section_rodata_size; + + .rwbarrier : ${LINKCMDS_ALIGN_DIRECTIVE} { + . = ALIGN (bsp_section_rwbarrier_align); + } > REGION_DATA AT > REGION_DATA + + .fast_text : ${LINKCMDS_ALIGN_DIRECTIVE} { + bsp_section_fast_text_begin = .; + *(.bsp_fast_text) + bsp_section_fast_text_end = .; + } > REGION_FAST_TEXT AT > REGION_FAST_TEXT_LOAD + bsp_section_fast_text_size = bsp_section_fast_text_end - bsp_section_fast_text_begin; + bsp_section_fast_text_load_begin = LOADADDR (.fast_text); + bsp_section_fast_text_load_end = bsp_section_fast_text_load_begin + bsp_section_fast_text_size; + + .fast_data : ${LINKCMDS_ALIGN_DIRECTIVE} { + bsp_section_fast_data_begin = .; + *(.bsp_fast_data) + bsp_section_fast_data_end = .; + } > REGION_FAST_DATA AT > REGION_FAST_DATA_LOAD + bsp_section_fast_data_size = bsp_section_fast_data_end - bsp_section_fast_data_begin; + bsp_section_fast_data_load_begin = LOADADDR (.fast_data); + bsp_section_fast_data_load_end = bsp_section_fast_data_load_begin + bsp_section_fast_data_size; + + .data : ${LINKCMDS_ALIGN_DIRECTIVE} { + bsp_section_data_begin = .; + *(.data .data.* .gnu.linkonce.d.*) + SORT(CONSTRUCTORS) + } > REGION_DATA AT > REGION_DATA_LOAD + .data1 : ${LINKCMDS_ALIGN_DIRECTIVE} { + *(.data1) + } > REGION_DATA AT > REGION_DATA_LOAD + .rtemsrwset : ${LINKCMDS_ALIGN_DIRECTIVE} { + KEEP (*(SORT(.rtemsrwset.*))) + } > REGION_DATA AT > REGION_DATA_LOAD + .htif ALIGN(4096) : ${LINKCMDS_ALIGN_DIRECTIVE} { + *(.htif) + } > REGION_DATA AT > REGION_DATA_LOAD + .sdata : ${LINKCMDS_ALIGN_DIRECTIVE} { + __global_pointer$$ = . + 0x800; + *(.srodata.cst16) *(.srodata.cst8) *(.srodata.cst4) *(.srodata.cst2) *(.srodata .srodata.*) + *(.sdata .sdata.* .gnu.linkonce.s.*) + bsp_section_data_end = .; + } > REGION_DATA AT > REGION_DATA_LOAD + bsp_section_data_size = bsp_section_data_end - bsp_section_data_begin; + bsp_section_data_load_begin = LOADADDR (.data); + bsp_section_data_load_end = bsp_section_data_load_begin + bsp_section_data_size; + + .sbss : ${LINKCMDS_ALIGN_DIRECTIVE} { + bsp_section_bss_begin = .; + *(.dynsbss) + *(.sbss .sbss.* .gnu.linkonce.sb.*) + *(.scommon) + } > REGION_DATA AT > REGION_DATA + .bss : ${LINKCMDS_ALIGN_DIRECTIVE} { + *(.dynbss) + *(.bss .bss.* .gnu.linkonce.b.*) + *(COMMON) + bsp_section_bss_end = .; + } > REGION_DATA AT > REGION_DATA + bsp_section_bss_size = bsp_section_bss_end - bsp_section_bss_begin; + + .rtemsstack (NOLOAD) : ${LINKCMDS_ALIGN_DIRECTIVE} { + bsp_section_rtemsstack_begin = .; + *(SORT(.rtemsstack.*)) + bsp_section_rtemsstack_end = .; + } > REGION_RTEMSSTACK AT > REGION_RTEMSSTACK + bsp_section_rtemsstack_size = bsp_section_rtemsstack_end - bsp_section_rtemsstack_begin; + + .work (NOLOAD) : ${LINKCMDS_ALIGN_DIRECTIVE} { + /* + * The work section will occupy the remaining REGION_WORK region and + * contains the RTEMS work space and heap. + */ + bsp_section_work_begin = .; + . += ORIGIN (REGION_WORK) + LENGTH (REGION_WORK) - ABSOLUTE (.); + bsp_section_work_end = .; + } > REGION_WORK AT > REGION_WORK + bsp_section_work_size = bsp_section_work_end - bsp_section_work_begin; + + /* FIXME */ + RamBase = ORIGIN (REGION_WORK); + RamSize = LENGTH (REGION_WORK); + RamEnd = RamBase + RamSize; + WorkAreaBase = bsp_section_work_begin; + HeapSize = 0; + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + /* DWARF debug sections. + Symbols in the DWARF debugging sections are relative to the beginning + of the section so we begin them at 0. */ + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line .debug_line.* .debug_line_end ) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* SGI/MIPS DWARF 2 extensions */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } + /* DWARF 3 */ + .debug_pubtypes 0 : { *(.debug_pubtypes) } + .debug_ranges 0 : { *(.debug_ranges) } + /* DWARF Extension. */ + .debug_macro 0 : { *(.debug_macro) } + .debug_addr 0 : { *(.debug_addr) } + .gnu.attributes 0 : { KEEP (*(.gnu.attributes)) } + /DISCARD/ : { *(.note.GNU-stack) *(.gnu_debuglink) *(.gnu.lto_*) } + .shstrtab 0 : { *(.shstrtab) } + .strtab 0 : { *(.strtab) } + .symtab 0 : { *(.symtab) } + .symtab_shndx 0 : { *(.symtab_shndx) } + __cap_relocs 0 : { *(__cap_relocs) } + + /* + * This is a RTEMS specific section to catch all unexpected input + * sections. In case you get an error like + * "section `.unexpected_sections' will not fit in region + * `UNEXPECTED_SECTIONS'" + * you have to figure out the offending input section and add it to the + * appropriate output section definition above. + */ + .unexpected_sections : { *(*) } > UNEXPECTED_SECTIONS + } +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +enabled-by: true +install-path: ${BSP_LIBDIR} +links: [] +target: linkcmds.base +type: build diff --git a/spec/build/bsps/riscv/optrambegin.yml b/spec/build/bsps/riscv/optrambegin.yml new file mode 100644 index 0000000000..cf5d909562 --- /dev/null +++ b/spec/build/bsps/riscv/optrambegin.yml @@ -0,0 +1,24 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-integer: null +- assert-uint32: null +- assert-aligned: 1048576 +- env-assign: null +- format-and-define: null +build-type: option +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +default: 2147483648 +default-by-variant: +- value: 2147483648 + variants: + - riscv/rv64.*medany +- value: 1879048192 + variants: + - riscv/rv64.* +description: '' +enabled-by: true +format: '{:#010x}' +links: [] +name: RISCV_RAM_REGION_BEGIN +type: build diff --git a/spec/build/bsps/riscv/optramsize.yml b/spec/build/bsps/riscv/optramsize.yml new file mode 100644 index 0000000000..bbc226cc13 --- /dev/null +++ b/spec/build/bsps/riscv/optramsize.yml @@ -0,0 +1,21 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-integer: null +- assert-uint32: null +- assert-aligned: 1048576 +- env-assign: null +- format-and-define: null +build-type: option +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +default: 67108864 +default-by-variant: +- value: 268435456 + variants: + - riscv/frdme310arty +description: '' +enabled-by: true +format: '{:#010x}' +links: [] +name: RISCV_RAM_REGION_SIZE +type: build diff --git a/spec/build/bsps/riscv/riscv/abi.yml b/spec/build/bsps/riscv/riscv/abi.yml new file mode 100644 index 0000000000..e975b87c4c --- /dev/null +++ b/spec/build/bsps/riscv/riscv/abi.yml @@ -0,0 +1,79 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-string: null +- split: null +- env-append: null +build-type: option +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +default: +- -march=rv32imac +- -mabi=ilp32 +default-by-variant: +- value: + - -march=rv64imafdc + - -mabi=lp64d + - -mcmodel=medany + variants: + - riscv/rv64imafdc_medany +- value: + - -march=rv64imafdc + - -mabi=lp64d + variants: + - riscv/rv64imafdc +- value: + - -march=rv64imafd + - -mabi=lp64d + - -mcmodel=medany + variants: + - riscv/rv64imafd_medany +- value: + - -march=rv64imafd + - -mabi=lp64d + variants: + - riscv/rv64imafd +- value: + - -march=rv64imac + - -mabi=lp64 + - -mcmodel=medany + variants: + - riscv/rv64imac_medany +- value: + - -march=rv64imac + - -mabi=lp64 + variants: + - riscv/rv64imac +- value: [] + variants: + - riscv/rv32imafdc +- value: + - -march=rv32imafd + - -mabi=ilp32d + variants: + - riscv/rv32imafd +- value: + - -march=rv32imafc + - -mabi=ilp32f + variants: + - riscv/rv32imafc +- value: + - -march=rv32im + - -mabi=ilp32 + variants: + - riscv/rv32im +- value: + - -march=rv32iac + - -mabi=ilp32 + variants: + - riscv/rv32iac +- value: + - -march=rv32i + - -mabi=ilp32 + variants: + - riscv/rv32i +description: | + ABI flags +enabled-by: true +links: [] +name: ABI_FLAGS +type: build diff --git a/spec/build/bsps/riscv/riscv/bspfrdme310arty.yml b/spec/build/bsps/riscv/riscv/bspfrdme310arty.yml new file mode 100644 index 0000000000..a13b12dc3c --- /dev/null +++ b/spec/build/bsps/riscv/riscv/bspfrdme310arty.yml @@ -0,0 +1,19 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +arch: riscv +bsp: frdme310arty +build-type: bsp +cflags: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +cppflags: [] +enabled-by: true +family: riscv +includes: [] +install: [] +links: +- role: build-dependency + uid: ../../opto2 +- role: build-dependency + uid: grp +source: [] +type: build diff --git a/spec/build/bsps/riscv/riscv/bsprv32i.yml b/spec/build/bsps/riscv/riscv/bsprv32i.yml new file mode 100644 index 0000000000..168839eb31 --- /dev/null +++ b/spec/build/bsps/riscv/riscv/bsprv32i.yml @@ -0,0 +1,19 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +arch: riscv +bsp: rv32i +build-type: bsp +cflags: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +cppflags: [] +enabled-by: true +family: riscv +includes: [] +install: [] +links: +- role: build-dependency + uid: ../../opto2 +- role: build-dependency + uid: grp +source: [] +type: build diff --git a/spec/build/bsps/riscv/riscv/bsprv32iac.yml b/spec/build/bsps/riscv/riscv/bsprv32iac.yml new file mode 100644 index 0000000000..ce226c6344 --- /dev/null +++ b/spec/build/bsps/riscv/riscv/bsprv32iac.yml @@ -0,0 +1,19 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +arch: riscv +bsp: rv32iac +build-type: bsp +cflags: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +cppflags: [] +enabled-by: true +family: riscv +includes: [] +install: [] +links: +- role: build-dependency + uid: ../../opto2 +- role: build-dependency + uid: grp +source: [] +type: build diff --git a/spec/build/bsps/riscv/riscv/bsprv32im.yml b/spec/build/bsps/riscv/riscv/bsprv32im.yml new file mode 100644 index 0000000000..a6c77b421b --- /dev/null +++ b/spec/build/bsps/riscv/riscv/bsprv32im.yml @@ -0,0 +1,19 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +arch: riscv +bsp: rv32im +build-type: bsp +cflags: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +cppflags: [] +enabled-by: true +family: riscv +includes: [] +install: [] +links: +- role: build-dependency + uid: ../../opto2 +- role: build-dependency + uid: grp +source: [] +type: build diff --git a/spec/build/bsps/riscv/riscv/bsprv32imac.yml b/spec/build/bsps/riscv/riscv/bsprv32imac.yml new file mode 100644 index 0000000000..25b9a4d00f --- /dev/null +++ b/spec/build/bsps/riscv/riscv/bsprv32imac.yml @@ -0,0 +1,19 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +arch: riscv +bsp: rv32imac +build-type: bsp +cflags: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +cppflags: [] +enabled-by: true +family: riscv +includes: [] +install: [] +links: +- role: build-dependency + uid: ../../opto2 +- role: build-dependency + uid: grp +source: [] +type: build diff --git a/spec/build/bsps/riscv/riscv/bsprv32imafc.yml b/spec/build/bsps/riscv/riscv/bsprv32imafc.yml new file mode 100644 index 0000000000..fa8ce6a1d1 --- /dev/null +++ b/spec/build/bsps/riscv/riscv/bsprv32imafc.yml @@ -0,0 +1,19 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +arch: riscv +bsp: rv32imafc +build-type: bsp +cflags: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +cppflags: [] +enabled-by: true +family: riscv +includes: [] +install: [] +links: +- role: build-dependency + uid: ../../opto2 +- role: build-dependency + uid: grp +source: [] +type: build diff --git a/spec/build/bsps/riscv/riscv/bsprv32imafd.yml b/spec/build/bsps/riscv/riscv/bsprv32imafd.yml new file mode 100644 index 0000000000..5ac45fdd2c --- /dev/null +++ b/spec/build/bsps/riscv/riscv/bsprv32imafd.yml @@ -0,0 +1,19 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +arch: riscv +bsp: rv32imafd +build-type: bsp +cflags: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +cppflags: [] +enabled-by: true +family: riscv +includes: [] +install: [] +links: +- role: build-dependency + uid: ../../opto2 +- role: build-dependency + uid: grp +source: [] +type: build diff --git a/spec/build/bsps/riscv/riscv/bsprv32imafdc.yml b/spec/build/bsps/riscv/riscv/bsprv32imafdc.yml new file mode 100644 index 0000000000..104a7a1391 --- /dev/null +++ b/spec/build/bsps/riscv/riscv/bsprv32imafdc.yml @@ -0,0 +1,19 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +arch: riscv +bsp: rv32imafdc +build-type: bsp +cflags: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +cppflags: [] +enabled-by: true +family: riscv +includes: [] +install: [] +links: +- role: build-dependency + uid: ../../opto2 +- role: build-dependency + uid: grp +source: [] +type: build diff --git a/spec/build/bsps/riscv/riscv/bsprv64imac.yml b/spec/build/bsps/riscv/riscv/bsprv64imac.yml new file mode 100644 index 0000000000..99dab47754 --- /dev/null +++ b/spec/build/bsps/riscv/riscv/bsprv64imac.yml @@ -0,0 +1,19 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +arch: riscv +bsp: rv64imac +build-type: bsp +cflags: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +cppflags: [] +enabled-by: true +family: riscv +includes: [] +install: [] +links: +- role: build-dependency + uid: ../../opto2 +- role: build-dependency + uid: grp +source: [] +type: build diff --git a/spec/build/bsps/riscv/riscv/bsprv64imacmedany.yml b/spec/build/bsps/riscv/riscv/bsprv64imacmedany.yml new file mode 100644 index 0000000000..c0db3e0720 --- /dev/null +++ b/spec/build/bsps/riscv/riscv/bsprv64imacmedany.yml @@ -0,0 +1,19 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +arch: riscv +bsp: rv64imac_medany +build-type: bsp +cflags: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +cppflags: [] +enabled-by: true +family: riscv +includes: [] +install: [] +links: +- role: build-dependency + uid: ../../opto2 +- role: build-dependency + uid: grp +source: [] +type: build diff --git a/spec/build/bsps/riscv/riscv/bsprv64imafd.yml b/spec/build/bsps/riscv/riscv/bsprv64imafd.yml new file mode 100644 index 0000000000..730a76a41d --- /dev/null +++ b/spec/build/bsps/riscv/riscv/bsprv64imafd.yml @@ -0,0 +1,19 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +arch: riscv +bsp: rv64imafd +build-type: bsp +cflags: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +cppflags: [] +enabled-by: true +family: riscv +includes: [] +install: [] +links: +- role: build-dependency + uid: ../../opto2 +- role: build-dependency + uid: grp +source: [] +type: build diff --git a/spec/build/bsps/riscv/riscv/bsprv64imafdc.yml b/spec/build/bsps/riscv/riscv/bsprv64imafdc.yml new file mode 100644 index 0000000000..32a0837941 --- /dev/null +++ b/spec/build/bsps/riscv/riscv/bsprv64imafdc.yml @@ -0,0 +1,19 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +arch: riscv +bsp: rv64imafdc +build-type: bsp +cflags: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +cppflags: [] +enabled-by: true +family: riscv +includes: [] +install: [] +links: +- role: build-dependency + uid: ../../opto2 +- role: build-dependency + uid: grp +source: [] +type: build diff --git a/spec/build/bsps/riscv/riscv/bsprv64imafdcmedany.yml b/spec/build/bsps/riscv/riscv/bsprv64imafdcmedany.yml new file mode 100644 index 0000000000..e4ecd4736a --- /dev/null +++ b/spec/build/bsps/riscv/riscv/bsprv64imafdcmedany.yml @@ -0,0 +1,19 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +arch: riscv +bsp: rv64imafdc_medany +build-type: bsp +cflags: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +cppflags: [] +enabled-by: true +family: riscv +includes: [] +install: [] +links: +- role: build-dependency + uid: ../../opto2 +- role: build-dependency + uid: grp +source: [] +type: build diff --git a/spec/build/bsps/riscv/riscv/bsprv64imafdmedany.yml b/spec/build/bsps/riscv/riscv/bsprv64imafdmedany.yml new file mode 100644 index 0000000000..9e01572c70 --- /dev/null +++ b/spec/build/bsps/riscv/riscv/bsprv64imafdmedany.yml @@ -0,0 +1,19 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +arch: riscv +bsp: rv64imafd_medany +build-type: bsp +cflags: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +cppflags: [] +enabled-by: true +family: riscv +includes: [] +install: [] +links: +- role: build-dependency + uid: ../../opto2 +- role: build-dependency + uid: grp +source: [] +type: build diff --git a/spec/build/bsps/riscv/riscv/grp.yml b/spec/build/bsps/riscv/riscv/grp.yml new file mode 100644 index 0000000000..396f8986ec --- /dev/null +++ b/spec/build/bsps/riscv/riscv/grp.yml @@ -0,0 +1,58 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +build-type: group +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +enabled-by: true +includes: [] +install: [] +ldflags: [] +links: +- role: build-dependency + uid: ../../obj +- role: build-dependency + uid: ../../objirq +- role: build-dependency + uid: ../../optclang +- role: build-dependency + uid: ../../optconsolebaud +- role: build-dependency + uid: ../../optgcc +- role: build-dependency + uid: ../grp +- role: build-dependency + uid: ../optrambegin +- role: build-dependency + uid: ../optramsize +- role: build-dependency + uid: abi +- role: build-dependency + uid: obj +- role: build-dependency + uid: objsmp +- role: build-dependency + uid: optextirqmax +- role: build-dependency + uid: optfdtcpyro +- role: build-dependency + uid: optfdtmxsz +- role: build-dependency + uid: optfdtro +- role: build-dependency + uid: optfdtuboot +- role: build-dependency + uid: optfrdme310arty +- role: build-dependency + uid: opthtif +- role: build-dependency + uid: optns16550max +- role: build-dependency + uid: ../linkcmds +- role: build-dependency + uid: ../linkcmdsbase +- role: build-dependency + uid: ../start +- role: build-dependency + uid: ../../bspopts +type: build +use-after: [] +use-before: [] diff --git a/spec/build/bsps/riscv/riscv/obj.yml b/spec/build/bsps/riscv/riscv/obj.yml new file mode 100644 index 0000000000..c16dc226c7 --- /dev/null +++ b/spec/build/bsps/riscv/riscv/obj.yml @@ -0,0 +1,41 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +build-type: objects +cflags: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +cppflags: [] +cxxflags: [] +enabled-by: true +includes: [] +install: +- destination: ${BSP_INCLUDEDIR} + source: + - bsps/riscv/riscv/include/bsp.h + - bsps/riscv/riscv/include/tm27.h +- destination: ${BSP_INCLUDEDIR}/bsp + source: + - bsps/riscv/riscv/include/bsp/fe310-uart.h + - bsps/riscv/riscv/include/bsp/irq.h + - bsps/riscv/riscv/include/bsp/riscv.h +- destination: ${BSP_INCLUDEDIR}/dev/serial + source: + - bsps/riscv/riscv/include/dev/serial/htif.h +links: [] +source: +- bsps/riscv/riscv/clock/clockdrv.c +- bsps/riscv/riscv/console/console-config.c +- bsps/riscv/riscv/console/fe310-uart.c +- bsps/riscv/riscv/console/htif.c +- bsps/riscv/riscv/irq/irq.c +- bsps/riscv/riscv/start/bsp_fatal_halt.c +- bsps/riscv/riscv/start/bspstart.c +- bsps/shared/cache/nocache.c +- bsps/shared/dev/btimer/btimer-cpucounter.c +- bsps/shared/dev/getentropy/getentropy-cpucounter.c +- bsps/shared/dev/serial/console-termios.c +- bsps/shared/irq/irq-default-handler.c +- bsps/shared/start/bsp-fdt.c +- bsps/shared/start/bspfatal-default.c +- bsps/shared/start/bspgetworkarea-default.c +- bsps/shared/start/bspreset-empty.c +type: build diff --git a/spec/build/bsps/riscv/riscv/objsmp.yml b/spec/build/bsps/riscv/riscv/objsmp.yml new file mode 100644 index 0000000000..46369f977e --- /dev/null +++ b/spec/build/bsps/riscv/riscv/objsmp.yml @@ -0,0 +1,15 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +build-type: objects +cflags: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +cppflags: [] +cxxflags: [] +enabled-by: +- RTEMS_SMP +includes: [] +install: [] +links: [] +source: +- bsps/riscv/riscv/start/bspsmp.c +type: build diff --git a/spec/build/bsps/riscv/riscv/optextirqmax.yml b/spec/build/bsps/riscv/riscv/optextirqmax.yml new file mode 100644 index 0000000000..ffa84748b6 --- /dev/null +++ b/spec/build/bsps/riscv/riscv/optextirqmax.yml @@ -0,0 +1,16 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-integer: null +- define: null +build-type: option +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +default: 64 +default-by-variant: [] +description: | + maximum number of external interrupts supported by the BSP (default 64) +enabled-by: true +format: '{}' +links: [] +name: RISCV_MAXIMUM_EXTERNAL_INTERRUPTS +type: build diff --git a/spec/build/bsps/riscv/riscv/optfdtcpyro.yml b/spec/build/bsps/riscv/riscv/optfdtcpyro.yml new file mode 100644 index 0000000000..c26b1ae051 --- /dev/null +++ b/spec/build/bsps/riscv/riscv/optfdtcpyro.yml @@ -0,0 +1,15 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-boolean: null +- define-condition: null +build-type: option +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +default: true +default-by-variant: [] +description: | + copy the FDT blob into the read-only load area via bsp_fdt_copy() +enabled-by: true +links: [] +name: BSP_FDT_BLOB_COPY_TO_READ_ONLY_LOAD_AREA +type: build diff --git a/spec/build/bsps/riscv/riscv/optfdtmxsz.yml b/spec/build/bsps/riscv/riscv/optfdtmxsz.yml new file mode 100644 index 0000000000..63a42f5a29 --- /dev/null +++ b/spec/build/bsps/riscv/riscv/optfdtmxsz.yml @@ -0,0 +1,16 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-integer: null +- define: null +build-type: option +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +default: 65536 +default-by-variant: [] +description: | + maximum size of the FDT blob in bytes +enabled-by: true +format: '{}' +links: [] +name: BSP_FDT_BLOB_SIZE_MAX +type: build diff --git a/spec/build/bsps/riscv/riscv/optfdtro.yml b/spec/build/bsps/riscv/riscv/optfdtro.yml new file mode 100644 index 0000000000..a61bb2924b --- /dev/null +++ b/spec/build/bsps/riscv/riscv/optfdtro.yml @@ -0,0 +1,15 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-boolean: null +- define-condition: null +build-type: option +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +default: true +default-by-variant: [] +description: | + place the FDT blob into the read-only data area +enabled-by: true +links: [] +name: BSP_FDT_BLOB_READ_ONLY +type: build diff --git a/spec/build/bsps/riscv/riscv/optfdtuboot.yml b/spec/build/bsps/riscv/riscv/optfdtuboot.yml new file mode 100644 index 0000000000..5805e912ff --- /dev/null +++ b/spec/build/bsps/riscv/riscv/optfdtuboot.yml @@ -0,0 +1,15 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-boolean: null +- define-condition: null +build-type: option +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +default: true +default-by-variant: [] +description: | + copy the U-Boot provided FDT to an internal storage +enabled-by: true +links: [] +name: BSP_START_COPY_FDT_FROM_U_BOOT +type: build diff --git a/spec/build/bsps/riscv/riscv/optfrdme310arty.yml b/spec/build/bsps/riscv/riscv/optfrdme310arty.yml new file mode 100644 index 0000000000..0623694cca --- /dev/null +++ b/spec/build/bsps/riscv/riscv/optfrdme310arty.yml @@ -0,0 +1,18 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-boolean: null +- define-condition: null +build-type: option +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +default: false +default-by-variant: +- value: true + variants: + - riscv/frdme310arty.* +description: | + enables support sifive Freedom E310 Arty board if defined to a non-zero value,otherwise it is disabled (disabled by default) +enabled-by: true +links: [] +name: RISCV_ENABLE_FRDME310ARTY_SUPPORT +type: build diff --git a/spec/build/bsps/riscv/riscv/opthtif.yml b/spec/build/bsps/riscv/riscv/opthtif.yml new file mode 100644 index 0000000000..9161716869 --- /dev/null +++ b/spec/build/bsps/riscv/riscv/opthtif.yml @@ -0,0 +1,15 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-boolean: null +- define-condition: null +build-type: option +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +default: false +default-by-variant: [] +description: | + enables the HTIF support if defined to a non-zero value, otherwise it is disabled (disabled by default) +enabled-by: true +links: [] +name: RISCV_ENABLE_HTIF_SUPPORT +type: build diff --git a/spec/build/bsps/riscv/riscv/optns16550max.yml b/spec/build/bsps/riscv/riscv/optns16550max.yml new file mode 100644 index 0000000000..7e385a57b7 --- /dev/null +++ b/spec/build/bsps/riscv/riscv/optns16550max.yml @@ -0,0 +1,19 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-integer: null +- define: null +build-type: option +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +default: 2 +default-by-variant: +- value: null + variants: + - riscv/frdme310arty.* +description: | + maximum number of NS16550 devices supported by the console driver (2 by default) +enabled-by: true +format: '{}' +links: [] +name: RISCV_CONSOLE_MAX_NS16550_DEVICES +type: build diff --git a/spec/build/bsps/riscv/start.yml b/spec/build/bsps/riscv/start.yml new file mode 100644 index 0000000000..3b27ba1169 --- /dev/null +++ b/spec/build/bsps/riscv/start.yml @@ -0,0 +1,14 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +asflags: [] +build-type: start-file +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +cppflags: [] +enabled-by: true +includes: [] +install-path: ${BSP_LIBDIR} +links: [] +source: +- bsps/riscv/shared/start/start.S +target: start.o +type: build |