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authorSebastian Huber <sebastian.huber@embedded-brains.de>2019-07-19 13:09:43 +0200
committerSebastian Huber <sebastian.huber@embedded-brains.de>2020-09-14 07:11:32 +0200
commitf3f0370f1054f4e49aa8f5ea70485d673e8e94b6 (patch)
tree11d44920353aea9bf4301eb267f8c831e622520e /spec/build/bsps
parent9f096f47243ab19db617ec990188dbef71166e41 (diff)
downloadrtems-f3f0370f1054f4e49aa8f5ea70485d673e8e94b6.tar.bz2
build: Alternative build system based on waf
Update #3818.
Diffstat (limited to 'spec/build/bsps')
-rw-r--r--spec/build/bsps/arm/altera-cyclone-v/abi.yml21
-rw-r--r--spec/build/bsps/arm/altera-cyclone-v/bspalteracyclonev.yml142
-rw-r--r--spec/build/bsps/arm/altera-cyclone-v/objsmp.yml16
-rw-r--r--spec/build/bsps/arm/altera-cyclone-v/opta9periphclk.yml15
-rw-r--r--spec/build/bsps/arm/altera-cyclone-v/optcachedata.yml15
-rw-r--r--spec/build/bsps/arm/altera-cyclone-v/optcacheinst.yml15
-rw-r--r--spec/build/bsps/arm/altera-cyclone-v/optclkfastidle.yml18
-rw-r--r--spec/build/bsps/arm/altera-cyclone-v/optconcfg.yml15
-rw-r--r--spec/build/bsps/arm/altera-cyclone-v/optconuart1.yml15
-rw-r--r--spec/build/bsps/arm/altera-cyclone-v/optfdtcpyro.yml15
-rw-r--r--spec/build/bsps/arm/altera-cyclone-v/optfdten.yml15
-rw-r--r--spec/build/bsps/arm/altera-cyclone-v/optfdtmxsz.yml16
-rw-r--r--spec/build/bsps/arm/altera-cyclone-v/optfdtro.yml15
-rw-r--r--spec/build/bsps/arm/altera-cyclone-v/optfdtuboot.yml15
-rw-r--r--spec/build/bsps/arm/altera-cyclone-v/opti2cspeed.yml16
-rw-r--r--spec/build/bsps/arm/altera-cyclone-v/optnoi2c.yml15
-rw-r--r--spec/build/bsps/arm/altera-cyclone-v/optresetvec.yml15
-rw-r--r--spec/build/bsps/arm/altera-cyclone-v/optuartbaud.yml16
-rw-r--r--spec/build/bsps/arm/altera-cyclone-v/optuartirq.yml15
-rw-r--r--spec/build/bsps/arm/atsam/abi.yml20
-rw-r--r--spec/build/bsps/arm/atsam/bspatsam.yml411
-rw-r--r--spec/build/bsps/arm/atsam/linkcmds.yml49
-rw-r--r--spec/build/bsps/arm/atsam/objnet.yml22
-rw-r--r--spec/build/bsps/arm/atsam/optchgclksram.yml15
-rw-r--r--spec/build/bsps/arm/atsam/optchip.yml54
-rw-r--r--spec/build/bsps/arm/atsam/optconbaud.yml16
-rw-r--r--spec/build/bsps/arm/atsam/optconidx.yml15
-rw-r--r--spec/build/bsps/arm/atsam/optconirq.yml15
-rw-r--r--spec/build/bsps/arm/atsam/optcontype.yml15
-rw-r--r--spec/build/bsps/arm/atsam/optmck.yml16
-rw-r--r--spec/build/bsps/arm/atsam/optnocachesz.yml17
-rw-r--r--spec/build/bsps/arm/atsam/optoscmain.yml16
-rw-r--r--spec/build/bsps/arm/atsam/optqspiflashsz.yml17
-rw-r--r--spec/build/bsps/arm/atsam/optsdram.yml29
-rw-r--r--spec/build/bsps/arm/atsam/opttcmsz.yml17
-rw-r--r--spec/build/bsps/arm/atsam/optusextal.yml15
-rw-r--r--spec/build/bsps/arm/atsam/tstatsamv.yml35
-rw-r--r--spec/build/bsps/arm/beagle/abi.yml17
-rw-r--r--spec/build/bsps/arm/beagle/bspboardorig.yml19
-rw-r--r--spec/build/bsps/arm/beagle/bspboardxm.yml19
-rw-r--r--spec/build/bsps/arm/beagle/bspboneblack.yml19
-rw-r--r--spec/build/bsps/arm/beagle/bspbonewhite.yml19
-rw-r--r--spec/build/bsps/arm/beagle/grp.yml44
-rw-r--r--spec/build/bsps/arm/beagle/obj.yml61
-rw-r--r--spec/build/bsps/arm/beagle/optam335x.yml18
-rw-r--r--spec/build/bsps/arm/beagle/optconbaud.yml16
-rw-r--r--spec/build/bsps/arm/beagle/optconpoll.yml15
-rw-r--r--spec/build/bsps/arm/beagle/optdebug.yml18
-rw-r--r--spec/build/bsps/arm/beagle/optdm3730.yml18
-rw-r--r--spec/build/bsps/arm/beagle/optfdtcpyro.yml15
-rw-r--r--spec/build/bsps/arm/beagle/optfdtmxsz.yml16
-rw-r--r--spec/build/bsps/arm/beagle/optfdtro.yml15
-rw-r--r--spec/build/bsps/arm/beagle/optfdtuboot.yml15
-rw-r--r--spec/build/bsps/arm/csb336/abi.yml17
-rw-r--r--spec/build/bsps/arm/csb336/bspcsb336.yml59
-rw-r--r--spec/build/bsps/arm/csb336/objnet.yml17
-rw-r--r--spec/build/bsps/arm/csb336/start.yml14
-rw-r--r--spec/build/bsps/arm/csb337/abi.yml17
-rw-r--r--spec/build/bsps/arm/csb337/bspcsb337.yml19
-rw-r--r--spec/build/bsps/arm/csb337/bspcsb637.yml19
-rw-r--r--spec/build/bsps/arm/csb337/bspkit637v6.yml19
-rw-r--r--spec/build/bsps/arm/csb337/grp.yml52
-rw-r--r--spec/build/bsps/arm/csb337/obj.yml57
-rw-r--r--spec/build/bsps/arm/csb337/objlcd.yml16
-rw-r--r--spec/build/bsps/arm/csb337/objnet.yml16
-rw-r--r--spec/build/bsps/arm/csb337/objumon.yml26
-rw-r--r--spec/build/bsps/arm/csb337/objumoncon.yml15
-rw-r--r--spec/build/bsps/arm/csb337/optcsb637.yml21
-rw-r--r--spec/build/bsps/arm/csb337/optenlcd.yml19
-rw-r--r--spec/build/bsps/arm/csb337/optenumon.yml16
-rw-r--r--spec/build/bsps/arm/csb337/optenumoncon.yml16
-rw-r--r--spec/build/bsps/arm/csb337/optenusart0.yml15
-rw-r--r--spec/build/bsps/arm/csb337/optenusart1.yml15
-rw-r--r--spec/build/bsps/arm/csb337/optenusart2.yml15
-rw-r--r--spec/build/bsps/arm/csb337/optenusart3.yml15
-rw-r--r--spec/build/bsps/arm/csb337/start.yml14
-rw-r--r--spec/build/bsps/arm/edb7312/abi.yml17
-rw-r--r--spec/build/bsps/arm/edb7312/bspedb7312.yml62
-rw-r--r--spec/build/bsps/arm/edb7312/objnet.yml16
-rw-r--r--spec/build/bsps/arm/edb7312/optskyeye.yml15
-rw-r--r--spec/build/bsps/arm/edb7312/start.yml14
-rw-r--r--spec/build/bsps/arm/grp.yml62
-rw-r--r--spec/build/bsps/arm/gumstix/abi.yml17
-rw-r--r--spec/build/bsps/arm/gumstix/bspgumstix.yml66
-rw-r--r--spec/build/bsps/arm/gumstix/objnet.yml16
-rw-r--r--spec/build/bsps/arm/gumstix/optskyeye.yml15
-rw-r--r--spec/build/bsps/arm/gumstix/start.yml14
-rw-r--r--spec/build/bsps/arm/imx/abi.yml21
-rw-r--r--spec/build/bsps/arm/imx/bspimx.yml104
-rw-r--r--spec/build/bsps/arm/imx/objsmp.yml16
-rw-r--r--spec/build/bsps/arm/imx/optcachedata.yml18
-rw-r--r--spec/build/bsps/arm/imx/optcacheinst.yml18
-rw-r--r--spec/build/bsps/arm/imx/optccmahb.yml16
-rw-r--r--spec/build/bsps/arm/imx/optcmmecspi.yml16
-rw-r--r--spec/build/bsps/arm/imx/optcmmipg.yml16
-rw-r--r--spec/build/bsps/arm/imx/optcmmsdhci.yml16
-rw-r--r--spec/build/bsps/arm/imx/optcmmuart.yml16
-rw-r--r--spec/build/bsps/arm/imx/optconirq.yml16
-rw-r--r--spec/build/bsps/arm/imx/optfdtcpyro.yml15
-rw-r--r--spec/build/bsps/arm/imx/optfdtmxsz.yml16
-rw-r--r--spec/build/bsps/arm/imx/optfdtro.yml15
-rw-r--r--spec/build/bsps/arm/imx/optfdtuboot.yml15
-rw-r--r--spec/build/bsps/arm/imx/optresetvec.yml15
-rw-r--r--spec/build/bsps/arm/lm3s69xx/abi.yml18
-rw-r--r--spec/build/bsps/arm/lm3s69xx/bsplm3s3749.yml21
-rw-r--r--spec/build/bsps/arm/lm3s69xx/bsplm3s6965.yml21
-rw-r--r--spec/build/bsps/arm/lm3s69xx/bsplm4f120.yml21
-rw-r--r--spec/build/bsps/arm/lm3s69xx/bspqemu.yml19
-rw-r--r--spec/build/bsps/arm/lm3s69xx/grp.yml56
-rw-r--r--spec/build/bsps/arm/lm3s69xx/obj.yml55
-rw-r--r--spec/build/bsps/arm/lm3s69xx/optenuart0.yml15
-rw-r--r--spec/build/bsps/arm/lm3s69xx/optenuart1.yml15
-rw-r--r--spec/build/bsps/arm/lm3s69xx/optenuart2.yml15
-rw-r--r--spec/build/bsps/arm/lm3s69xx/optgpioahb.yml21
-rw-r--r--spec/build/bsps/arm/lm3s69xx/optgpionum.yml25
-rw-r--r--spec/build/bsps/arm/lm3s69xx/optlm3s3749.yml18
-rw-r--r--spec/build/bsps/arm/lm3s69xx/optlm3s6965.yml18
-rw-r--r--spec/build/bsps/arm/lm3s69xx/optlm4f120.yml18
-rw-r--r--spec/build/bsps/arm/lm3s69xx/optssiblks.yml25
-rw-r--r--spec/build/bsps/arm/lm3s69xx/optssiclk.yml16
-rw-r--r--spec/build/bsps/arm/lm3s69xx/optsysclk.yml22
-rw-r--r--spec/build/bsps/arm/lm3s69xx/optuartbaud.yml16
-rw-r--r--spec/build/bsps/arm/lm3s69xx/optudma.yml21
-rw-r--r--spec/build/bsps/arm/lm3s69xx/optxtalcfg.yml25
-rw-r--r--spec/build/bsps/arm/lm3s69xx/tstlm3s3749.yml38
-rw-r--r--spec/build/bsps/arm/lm3s69xx/tstlm3s6965.yml22
-rw-r--r--spec/build/bsps/arm/lm3s69xx/tstlm4f120.yml39
-rw-r--r--spec/build/bsps/arm/lpc176x/abi.yml18
-rw-r--r--spec/build/bsps/arm/lpc176x/bsplpc1768mbed.yml21
-rw-r--r--spec/build/bsps/arm/lpc176x/bsplpc1768mbedahbram.yml21
-rw-r--r--spec/build/bsps/arm/lpc176x/bsplpc1768mbedahbrameth.yml21
-rw-r--r--spec/build/bsps/arm/lpc176x/grp.yml52
-rw-r--r--spec/build/bsps/arm/lpc176x/obj.yml80
-rw-r--r--spec/build/bsps/arm/lpc176x/optcclk.yml16
-rw-r--r--spec/build/bsps/arm/lpc176x/optconcfg.yml15
-rw-r--r--spec/build/bsps/arm/lpc176x/optdmachn.yml16
-rw-r--r--spec/build/bsps/arm/lpc176x/optlpc1768.yml15
-rw-r--r--spec/build/bsps/arm/lpc176x/optmintskstksz.yml16
-rw-r--r--spec/build/bsps/arm/lpc176x/optoscmain.yml16
-rw-r--r--spec/build/bsps/arm/lpc176x/optoscrtc.yml16
-rw-r--r--spec/build/bsps/arm/lpc176x/optpclkdiv.yml16
-rw-r--r--spec/build/bsps/arm/lpc176x/optstopgpdma.yml15
-rw-r--r--spec/build/bsps/arm/lpc176x/optstopusb.yml15
-rw-r--r--spec/build/bsps/arm/lpc176x/optuart1cfg.yml15
-rw-r--r--spec/build/bsps/arm/lpc176x/optuartbaud.yml16
-rw-r--r--spec/build/bsps/arm/lpc176x/tstlpc1768mbed.yml37
-rw-r--r--spec/build/bsps/arm/lpc176x/tstlpc1768mbedahbram.yml38
-rw-r--r--spec/build/bsps/arm/lpc176x/tstlpc1768mbedahbrameth.yml140
-rw-r--r--spec/build/bsps/arm/lpc24xx/abi.yml34
-rw-r--r--spec/build/bsps/arm/lpc24xx/bsplpc17xxearam.yml19
-rw-r--r--spec/build/bsps/arm/lpc24xx/bsplpc17xxearomint.yml21
-rw-r--r--spec/build/bsps/arm/lpc24xx/bsplpc17xxplx800ram.yml19
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-rw-r--r--spec/build/bsps/arm/lpc24xx/bsplpc2362.yml21
-rw-r--r--spec/build/bsps/arm/lpc24xx/bsplpc23xxtli800.yml21
-rw-r--r--spec/build/bsps/arm/lpc24xx/bsplpc24xxea.yml19
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-rw-r--r--spec/build/bsps/arm/lpc24xx/bsplpc40xxearomint.yml21
-rw-r--r--spec/build/bsps/arm/lpc24xx/bspncsram.yml19
-rw-r--r--spec/build/bsps/arm/lpc24xx/bspncsromext.yml19
-rw-r--r--spec/build/bsps/arm/lpc24xx/bspncsromint.yml21
-rw-r--r--spec/build/bsps/arm/lpc24xx/bspplx800ram.yml19
-rw-r--r--spec/build/bsps/arm/lpc24xx/bspplx800romint.yml21
-rw-r--r--spec/build/bsps/arm/lpc24xx/grp.yml84
-rw-r--r--spec/build/bsps/arm/lpc24xx/obj.yml90
-rw-r--r--spec/build/bsps/arm/lpc24xx/objnet.yml16
-rw-r--r--spec/build/bsps/arm/lpc24xx/optcclk.yml28
-rw-r--r--spec/build/bsps/arm/lpc24xx/optconcfg.yml15
-rw-r--r--spec/build/bsps/arm/lpc24xx/optdmachn.yml22
-rw-r--r--spec/build/bsps/arm/lpc24xx/optemcclkdiv.yml22
-rw-r--r--spec/build/bsps/arm/lpc24xx/optemcis42s32800b.yml21
-rw-r--r--spec/build/bsps/arm/lpc24xx/optemcis42s32800d7.yml18
-rw-r--r--spec/build/bsps/arm/lpc24xx/optemcm29w160e.yml18
-rw-r--r--spec/build/bsps/arm/lpc24xx/optemcm29w320e70.yml18
-rw-r--r--spec/build/bsps/arm/lpc24xx/optemcmt48lc4m16a2.yml18
-rw-r--r--spec/build/bsps/arm/lpc24xx/optemcsst39vf3201.yml15
-rw-r--r--spec/build/bsps/arm/lpc24xx/optemctest.yml15
-rw-r--r--spec/build/bsps/arm/lpc24xx/optemcw9825g2jb75i.yml15
-rw-r--r--spec/build/bsps/arm/lpc24xx/optethdownpin.yml15
-rw-r--r--spec/build/bsps/arm/lpc24xx/optethrmii.yml18
-rw-r--r--spec/build/bsps/arm/lpc24xx/optheapext.yml18
-rw-r--r--spec/build/bsps/arm/lpc24xx/optoscmain.yml19
-rw-r--r--spec/build/bsps/arm/lpc24xx/optoscrtc.yml16
-rw-r--r--spec/build/bsps/arm/lpc24xx/optotgi2c.yml22
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-rw-r--r--spec/build/bsps/arm/lpc24xx/optresetvec.yml19
-rw-r--r--spec/build/bsps/arm/lpc24xx/optstopeth.yml18
-rw-r--r--spec/build/bsps/arm/lpc24xx/optstopgpdma.yml15
-rw-r--r--spec/build/bsps/arm/lpc24xx/optstopusb.yml18
-rw-r--r--spec/build/bsps/arm/lpc24xx/optuart1cfg.yml18
-rw-r--r--spec/build/bsps/arm/lpc24xx/optuart2cfg.yml24
-rw-r--r--spec/build/bsps/arm/lpc24xx/optuart3cfg.yml21
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-rw-r--r--spec/build/bsps/arm/lpc24xx/tstlpc17xxearomint.yml15
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-rw-r--r--spec/build/bsps/powerpc/qoriq/optuart1en.yml18
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-rw-r--r--spec/build/bsps/powerpc/qoriq/optuartbrg1en.yml21
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-rw-r--r--spec/build/bsps/powerpc/qoriq/optuartirq.yml15
-rw-r--r--spec/build/bsps/powerpc/qoriq/start.yml14
-rw-r--r--spec/build/bsps/powerpc/ss555/abi.yml18
-rw-r--r--spec/build/bsps/powerpc/ss555/bspss555.yml81
-rw-r--r--spec/build/bsps/powerpc/ss555/optconminor.yml16
-rw-r--r--spec/build/bsps/powerpc/ss555/optprintkminor.yml16
-rw-r--r--spec/build/bsps/powerpc/ss555/optuartsiomode.yml15
-rw-r--r--spec/build/bsps/powerpc/ss555/optuartsterm.yml15
-rw-r--r--spec/build/bsps/powerpc/ss555/optwdgtimeout.yml16
-rw-r--r--spec/build/bsps/powerpc/ss555/start.yml14
-rw-r--r--spec/build/bsps/powerpc/start.yml14
-rw-r--r--spec/build/bsps/powerpc/t32mppc/abi.yml22
-rw-r--r--spec/build/bsps/powerpc/t32mppc/bspt32mppc.yml70
-rw-r--r--spec/build/bsps/powerpc/t32mppc/objsmp.yml15
-rw-r--r--spec/build/bsps/powerpc/t32mppc/optexcbooke.yml15
-rw-r--r--spec/build/bsps/powerpc/t32mppc/optexcfixdhdlr.yml15
-rw-r--r--spec/build/bsps/powerpc/t32mppc/start.yml14
-rw-r--r--spec/build/bsps/powerpc/tqm8xx/abi.yml23
-rw-r--r--spec/build/bsps/powerpc/tqm8xx/bsppghplus.yml19
-rw-r--r--spec/build/bsps/powerpc/tqm8xx/bspstk8xx.yml19
-rw-r--r--spec/build/bsps/powerpc/tqm8xx/grp.yml56
-rw-r--r--spec/build/bsps/powerpc/tqm8xx/obj.yml49
-rw-r--r--spec/build/bsps/powerpc/tqm8xx/objnet.yml17
-rw-r--r--spec/build/bsps/powerpc/tqm8xx/optconchn.yml16
-rw-r--r--spec/build/bsps/powerpc/tqm8xx/optconscc1.yml16
-rw-r--r--spec/build/bsps/powerpc/tqm8xx/optconscc2.yml16
-rw-r--r--spec/build/bsps/powerpc/tqm8xx/optconscc3.yml16
-rw-r--r--spec/build/bsps/powerpc/tqm8xx/optconscc4.yml16
-rw-r--r--spec/build/bsps/powerpc/tqm8xx/optconsmc1.yml22
-rw-r--r--spec/build/bsps/powerpc/tqm8xx/optconsmc2.yml19
-rw-r--r--spec/build/bsps/powerpc/tqm8xx/optnetfec.yml18
-rw-r--r--spec/build/bsps/powerpc/tqm8xx/optnetscc.yml18
-rw-r--r--spec/build/bsps/powerpc/tqm8xx/optprintkchn.yml16
-rw-r--r--spec/build/bsps/powerpc/tqm8xx/start.yml14
-rw-r--r--spec/build/bsps/powerpc/vecentry.yml14
-rw-r--r--spec/build/bsps/powerpc/virtex/abi.yml21
-rw-r--r--spec/build/bsps/powerpc/virtex/bspvirtex.yml86
-rw-r--r--spec/build/bsps/powerpc/virtex/linkcmds.yml45
-rw-r--r--spec/build/bsps/powerpc/virtex/objnet.yml16
-rw-r--r--spec/build/bsps/powerpc/virtex/optconirq.yml15
-rw-r--r--spec/build/bsps/powerpc/virtex/optfastramlen.yml18
-rw-r--r--spec/build/bsps/powerpc/virtex/optfastramorg.yml18
-rw-r--r--spec/build/bsps/powerpc/virtex/optramlen.yml18
-rw-r--r--spec/build/bsps/powerpc/virtex/optramorg.yml18
-rw-r--r--spec/build/bsps/powerpc/virtex/optresetlen.yml17
-rw-r--r--spec/build/bsps/powerpc/virtex/optresetorg.yml18
-rw-r--r--spec/build/bsps/powerpc/virtex/optxparam.yml16
-rw-r--r--spec/build/bsps/powerpc/virtex/start.yml14
-rw-r--r--spec/build/bsps/powerpc/virtex4/abi.yml18
-rw-r--r--spec/build/bsps/powerpc/virtex4/bspvirtex4.yml70
-rw-r--r--spec/build/bsps/powerpc/virtex4/optppccachedata.yml15
-rw-r--r--spec/build/bsps/powerpc/virtex4/optsprg.yml15
-rw-r--r--spec/build/bsps/powerpc/virtex4/optvecbase.yml16
-rw-r--r--spec/build/bsps/powerpc/virtex4/start.yml14
-rw-r--r--spec/build/bsps/powerpc/virtex5/abi.yml19
-rw-r--r--spec/build/bsps/powerpc/virtex5/bspvirtex5.yml71
-rw-r--r--spec/build/bsps/powerpc/virtex5/optppccachedata.yml15
-rw-r--r--spec/build/bsps/powerpc/virtex5/optsprg.yml15
-rw-r--r--spec/build/bsps/powerpc/virtex5/optvecbase.yml16
-rw-r--r--spec/build/bsps/powerpc/virtex5/start.yml14
-rw-r--r--spec/build/bsps/riscv/griscv/abi.yml38
-rw-r--r--spec/build/bsps/riscv/griscv/bspgriscv.yml19
-rw-r--r--spec/build/bsps/riscv/griscv/bspgrv32i.yml19
-rw-r--r--spec/build/bsps/riscv/griscv/bspgrv32im.yml19
-rw-r--r--spec/build/bsps/riscv/griscv/bspgrv32imac.yml19
-rw-r--r--spec/build/bsps/riscv/griscv/bspgrv32imafdc.yml19
-rw-r--r--spec/build/bsps/riscv/griscv/grp.yml46
-rw-r--r--spec/build/bsps/riscv/griscv/obj.yml36
-rw-r--r--spec/build/bsps/riscv/griscv/objsmp.yml15
-rw-r--r--spec/build/bsps/riscv/griscv/optextirqmax.yml16
-rw-r--r--spec/build/bsps/riscv/grp.yml15
-rw-r--r--spec/build/bsps/riscv/linkcmds.yml29
-rw-r--r--spec/build/bsps/riscv/linkcmdsbase.yml401
-rw-r--r--spec/build/bsps/riscv/optrambegin.yml24
-rw-r--r--spec/build/bsps/riscv/optramsize.yml21
-rw-r--r--spec/build/bsps/riscv/riscv/abi.yml79
-rw-r--r--spec/build/bsps/riscv/riscv/bspfrdme310arty.yml19
-rw-r--r--spec/build/bsps/riscv/riscv/bsprv32i.yml19
-rw-r--r--spec/build/bsps/riscv/riscv/bsprv32iac.yml19
-rw-r--r--spec/build/bsps/riscv/riscv/bsprv32im.yml19
-rw-r--r--spec/build/bsps/riscv/riscv/bsprv32imac.yml19
-rw-r--r--spec/build/bsps/riscv/riscv/bsprv32imafc.yml19
-rw-r--r--spec/build/bsps/riscv/riscv/bsprv32imafd.yml19
-rw-r--r--spec/build/bsps/riscv/riscv/bsprv32imafdc.yml19
-rw-r--r--spec/build/bsps/riscv/riscv/bsprv64imac.yml19
-rw-r--r--spec/build/bsps/riscv/riscv/bsprv64imacmedany.yml19
-rw-r--r--spec/build/bsps/riscv/riscv/bsprv64imafd.yml19
-rw-r--r--spec/build/bsps/riscv/riscv/bsprv64imafdc.yml19
-rw-r--r--spec/build/bsps/riscv/riscv/bsprv64imafdcmedany.yml19
-rw-r--r--spec/build/bsps/riscv/riscv/bsprv64imafdmedany.yml19
-rw-r--r--spec/build/bsps/riscv/riscv/grp.yml58
-rw-r--r--spec/build/bsps/riscv/riscv/obj.yml41
-rw-r--r--spec/build/bsps/riscv/riscv/objsmp.yml15
-rw-r--r--spec/build/bsps/riscv/riscv/optextirqmax.yml16
-rw-r--r--spec/build/bsps/riscv/riscv/optfdtcpyro.yml15
-rw-r--r--spec/build/bsps/riscv/riscv/optfdtmxsz.yml16
-rw-r--r--spec/build/bsps/riscv/riscv/optfdtro.yml15
-rw-r--r--spec/build/bsps/riscv/riscv/optfdtuboot.yml15
-rw-r--r--spec/build/bsps/riscv/riscv/optfrdme310arty.yml18
-rw-r--r--spec/build/bsps/riscv/riscv/opthtif.yml15
-rw-r--r--spec/build/bsps/riscv/riscv/optns16550max.yml19
-rw-r--r--spec/build/bsps/riscv/start.yml14
-rw-r--r--spec/build/bsps/sh/gensh1/abi.yml17
-rw-r--r--spec/build/bsps/sh/gensh1/bspgensh1.yml69
-rw-r--r--spec/build/bsps/sh/gensh1/optcpuclk.yml16
-rw-r--r--spec/build/bsps/sh/gensh1/optlowinit.yml15
-rw-r--r--spec/build/bsps/sh/gensh1/start.yml14
-rw-r--r--spec/build/bsps/sh/gensh1/tstgensh1.yml20
-rw-r--r--spec/build/bsps/sh/gensh2/abi.yml17
-rw-r--r--spec/build/bsps/sh/gensh2/bspgensh2.yml77
-rw-r--r--spec/build/bsps/sh/gensh2/optcpuclk.yml16
-rw-r--r--spec/build/bsps/sh/gensh2/optevb.yml15
-rw-r--r--spec/build/bsps/sh/gensh2/optlowinit.yml15
-rw-r--r--spec/build/bsps/sh/gensh2/start.yml14
-rw-r--r--spec/build/bsps/sh/gensh2/tstgensh2.yml20
-rw-r--r--spec/build/bsps/sh/gensh4/abi.yml18
-rw-r--r--spec/build/bsps/sh/gensh4/bspgensh4.yml72
-rw-r--r--spec/build/bsps/sh/gensh4/optcpuclk.yml16
-rw-r--r--spec/build/bsps/sh/gensh4/optcpydata.yml15
-rw-r--r--spec/build/bsps/sh/gensh4/optlowinit.yml15
-rw-r--r--spec/build/bsps/sh/gensh4/start.yml14
-rw-r--r--spec/build/bsps/sh/shsim/abi.yml31
-rw-r--r--spec/build/bsps/sh/shsim/bspsimsh1.yml21
-rw-r--r--spec/build/bsps/sh/shsim/bspsimsh2.yml21
-rw-r--r--spec/build/bsps/sh/shsim/bspsimsh2e.yml21
-rw-r--r--spec/build/bsps/sh/shsim/bspsimsh4.yml21
-rw-r--r--spec/build/bsps/sh/shsim/grp.yml28
-rw-r--r--spec/build/bsps/sh/shsim/obj.yml41
-rw-r--r--spec/build/bsps/sh/shsim/optcpuclk.yml16
-rw-r--r--spec/build/bsps/sh/shsim/optlowinit.yml15
-rw-r--r--spec/build/bsps/sh/shsim/start.yml14
-rw-r--r--spec/build/bsps/sh/shsim/tstsimsh1.yml24
-rw-r--r--spec/build/bsps/sh/shsim/tstsimsh2.yml24
-rw-r--r--spec/build/bsps/sh/shsim/tstsimsh2e.yml24
-rw-r--r--spec/build/bsps/sh/shsim/tstsimsh4.yml24
-rw-r--r--spec/build/bsps/sparc/erc32/abi.yml17
-rw-r--r--spec/build/bsps/sparc/erc32/bsperc32.yml76
-rw-r--r--spec/build/bsps/sparc/erc32/objnet.yml16
-rw-r--r--spec/build/bsps/sparc/erc32/objsmp.yml15
-rw-r--r--spec/build/bsps/sparc/erc32/optconirq.yml16
-rw-r--r--spec/build/bsps/sparc/erc32/optpwrdwnhlt.yml15
-rw-r--r--spec/build/bsps/sparc/grp.yml19
-rw-r--r--spec/build/bsps/sparc/leon2/abi.yml22
-rw-r--r--spec/build/bsps/sparc/leon2/bspat697f.yml19
-rw-r--r--spec/build/bsps/sparc/leon2/bspleon2.yml19
-rw-r--r--spec/build/bsps/sparc/leon2/grp.yml38
-rw-r--r--spec/build/bsps/sparc/leon2/obj.yml52
-rw-r--r--spec/build/bsps/sparc/leon2/objnet.yml17
-rw-r--r--spec/build/bsps/sparc/leon2/objsmp.yml16
-rw-r--r--spec/build/bsps/sparc/leon2/optconirq.yml16
-rw-r--r--spec/build/bsps/sparc/leon2/optpwrdwnhlt.yml15
-rw-r--r--spec/build/bsps/sparc/leon3/abi.yml33
-rw-r--r--spec/build/bsps/sparc/leon3/abiclang.yml36
-rw-r--r--spec/build/bsps/sparc/leon3/bspgr712rc.yml19
-rw-r--r--spec/build/bsps/sparc/leon3/bspgr740.yml19
-rw-r--r--spec/build/bsps/sparc/leon3/bspleon3.yml19
-rw-r--r--spec/build/bsps/sparc/leon3/bsput699.yml19
-rw-r--r--spec/build/bsps/sparc/leon3/bsput700.yml19
-rw-r--r--spec/build/bsps/sparc/leon3/grp.yml46
-rw-r--r--spec/build/bsps/sparc/leon3/obj.yml62
-rw-r--r--spec/build/bsps/sparc/leon3/objmpci.yml18
-rw-r--r--spec/build/bsps/sparc/leon3/objnet.yml17
-rw-r--r--spec/build/bsps/sparc/leon3/objnetnosmp.yml18
-rw-r--r--spec/build/bsps/sparc/leon3/objsmp.yml15
-rw-r--r--spec/build/bsps/sparc/leon3/optconirq.yml16
-rw-r--r--spec/build/bsps/sparc/leon3/optleon3smp.yml15
-rw-r--r--spec/build/bsps/sparc/leon3/optpwrdwnhlt.yml15
-rw-r--r--spec/build/bsps/sparc/start.yml14
-rw-r--r--spec/build/bsps/sparc64/grp.yml58
-rw-r--r--spec/build/bsps/sparc64/niagara/abi.yml18
-rw-r--r--spec/build/bsps/sparc64/niagara/bspniagara.yml63
-rw-r--r--spec/build/bsps/sparc64/start.yml14
-rw-r--r--spec/build/bsps/sparc64/usiii/abi.yml19
-rw-r--r--spec/build/bsps/sparc64/usiii/bspusiii.yml67
-rw-r--r--spec/build/bsps/sparc64/usiii/optclkfastidle.yml15
-rw-r--r--spec/build/bsps/tst.yml23
-rw-r--r--spec/build/bsps/tstnoiconv.yml15
-rw-r--r--spec/build/bsps/tstnointrcrit.yml35
-rw-r--r--spec/build/bsps/tstnojffs2.yml21
-rw-r--r--spec/build/bsps/tstnolibdl.yml22
-rw-r--r--spec/build/bsps/tstnorfs.yml22
-rw-r--r--spec/build/bsps/tstreqtick.yml59
-rw-r--r--spec/build/bsps/tstsmallmem.yml128
-rw-r--r--spec/build/bsps/v850/gdbv850sim/abi.yml37
-rw-r--r--spec/build/bsps/v850/gdbv850sim/bspv850e1sim.yml21
-rw-r--r--spec/build/bsps/v850/gdbv850sim/bspv850e2sim.yml21
-rw-r--r--spec/build/bsps/v850/gdbv850sim/bspv850e2v3sim.yml21
-rw-r--r--spec/build/bsps/v850/gdbv850sim/bspv850esim.yml21
-rw-r--r--spec/build/bsps/v850/gdbv850sim/bspv850essim.yml21
-rw-r--r--spec/build/bsps/v850/gdbv850sim/bspv850sim.yml21
-rw-r--r--spec/build/bsps/v850/gdbv850sim/grp.yml24
-rw-r--r--spec/build/bsps/v850/gdbv850sim/obj.yml37
-rw-r--r--spec/build/bsps/v850/gdbv850sim/start.yml14
-rw-r--r--spec/build/bsps/x86_64/amd64/abi.yml19
-rw-r--r--spec/build/bsps/x86_64/amd64/bspamd64.yml57
-rw-r--r--spec/build/bsps/x86_64/amd64/start.yml14
-rw-r--r--spec/build/bsps/x86_64/grp.yml18
1008 files changed, 25297 insertions, 0 deletions
diff --git a/spec/build/bsps/arm/altera-cyclone-v/abi.yml b/spec/build/bsps/arm/altera-cyclone-v/abi.yml
new file mode 100644
index 0000000000..a3a710c97d
--- /dev/null
+++ b/spec/build/bsps/arm/altera-cyclone-v/abi.yml
@@ -0,0 +1,21 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-string: null
+- split: null
+- env-append: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default:
+- -march=armv7-a
+- -mthumb
+- -mfpu=neon
+- -mfloat-abi=hard
+- -mtune=cortex-a9
+default-by-variant: []
+description: |
+ ABI flags
+enabled-by: true
+links: []
+name: ABI_FLAGS
+type: build
diff --git a/spec/build/bsps/arm/altera-cyclone-v/bspalteracyclonev.yml b/spec/build/bsps/arm/altera-cyclone-v/bspalteracyclonev.yml
new file mode 100644
index 0000000000..abe3d7f490
--- /dev/null
+++ b/spec/build/bsps/arm/altera-cyclone-v/bspalteracyclonev.yml
@@ -0,0 +1,142 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: altcycv_devkit
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: altera-cyclone-v
+includes: []
+install:
+- destination: ${BSP_INCLUDEDIR}
+ source:
+ - bsps/arm/altera-cyclone-v/include/bsp.h
+ - bsps/arm/altera-cyclone-v/include/tm27.h
+- destination: ${BSP_INCLUDEDIR}/bsp
+ source:
+ - bsps/arm/altera-cyclone-v/include/bsp/alt_16550_uart.h
+ - bsps/arm/altera-cyclone-v/include/bsp/alt_address_space.h
+ - bsps/arm/altera-cyclone-v/include/bsp/alt_cache.h
+ - bsps/arm/altera-cyclone-v/include/bsp/alt_clock_group.h
+ - bsps/arm/altera-cyclone-v/include/bsp/alt_clock_manager.h
+ - bsps/arm/altera-cyclone-v/include/bsp/alt_dma.h
+ - bsps/arm/altera-cyclone-v/include/bsp/alt_dma_common.h
+ - bsps/arm/altera-cyclone-v/include/bsp/alt_dma_program.h
+ - bsps/arm/altera-cyclone-v/include/bsp/alt_generalpurpose_io.h
+ - bsps/arm/altera-cyclone-v/include/bsp/alt_hwlibs_ver.h
+ - bsps/arm/altera-cyclone-v/include/bsp/alt_i2c.h
+ - bsps/arm/altera-cyclone-v/include/bsp/alt_interrupt_common.h
+ - bsps/arm/altera-cyclone-v/include/bsp/alt_mpu_registers.h
+ - bsps/arm/altera-cyclone-v/include/bsp/alt_qspi_private.h
+ - bsps/arm/altera-cyclone-v/include/bsp/alt_reset_manager.h
+ - bsps/arm/altera-cyclone-v/include/bsp/hwlib.h
+ - bsps/arm/altera-cyclone-v/include/bsp/i2cdrv.h
+ - bsps/arm/altera-cyclone-v/include/bsp/irq.h
+- destination: ${BSP_INCLUDEDIR}/bsp/socal
+ source:
+ - bsps/arm/altera-cyclone-v/include/bsp/socal/alt_acpidmap.h
+ - bsps/arm/altera-cyclone-v/include/bsp/socal/alt_clkmgr.h
+ - bsps/arm/altera-cyclone-v/include/bsp/socal/alt_dmanonsecure.h
+ - bsps/arm/altera-cyclone-v/include/bsp/socal/alt_dmasecure.h
+ - bsps/arm/altera-cyclone-v/include/bsp/socal/alt_gpio.h
+ - bsps/arm/altera-cyclone-v/include/bsp/socal/alt_i2c.h
+ - bsps/arm/altera-cyclone-v/include/bsp/socal/alt_l3.h
+ - bsps/arm/altera-cyclone-v/include/bsp/socal/alt_qspi.h
+ - bsps/arm/altera-cyclone-v/include/bsp/socal/alt_qspidata.h
+ - bsps/arm/altera-cyclone-v/include/bsp/socal/alt_rstmgr.h
+ - bsps/arm/altera-cyclone-v/include/bsp/socal/alt_sdr.h
+ - bsps/arm/altera-cyclone-v/include/bsp/socal/alt_sysmgr.h
+ - bsps/arm/altera-cyclone-v/include/bsp/socal/alt_uart.h
+ - bsps/arm/altera-cyclone-v/include/bsp/socal/hps.h
+ - bsps/arm/altera-cyclone-v/include/bsp/socal/socal.h
+- destination: ${BSP_LIBDIR}
+ source:
+ - bsps/arm/altera-cyclone-v/start/linkcmds
+ - bsps/arm/altera-cyclone-v/start/linkcmds.altcycv
+links:
+- role: build-dependency
+ uid: abi
+- role: build-dependency
+ uid: objsmp
+- role: build-dependency
+ uid: opta9periphclk
+- role: build-dependency
+ uid: optcachedata
+- role: build-dependency
+ uid: optcacheinst
+- role: build-dependency
+ uid: optclkfastidle
+- role: build-dependency
+ uid: optconcfg
+- role: build-dependency
+ uid: optconuart1
+- role: build-dependency
+ uid: optfdtcpyro
+- role: build-dependency
+ uid: optfdten
+- role: build-dependency
+ uid: optfdtmxsz
+- role: build-dependency
+ uid: optfdtro
+- role: build-dependency
+ uid: optfdtuboot
+- role: build-dependency
+ uid: opti2cspeed
+- role: build-dependency
+ uid: optnoi2c
+- role: build-dependency
+ uid: optresetvec
+- role: build-dependency
+ uid: optuartbaud
+- role: build-dependency
+ uid: optuartirq
+- role: build-dependency
+ uid: ../grp
+- role: build-dependency
+ uid: ../start
+- role: build-dependency
+ uid: ../../obj
+- role: build-dependency
+ uid: ../../objirq
+- role: build-dependency
+ uid: ../../opto2
+- role: build-dependency
+ uid: ../../bspopts
+source:
+- bsps/arm/altera-cyclone-v/console/console-config.c
+- bsps/arm/altera-cyclone-v/contrib/hwlib/src/hwmgr/alt_16550_uart.c
+- bsps/arm/altera-cyclone-v/contrib/hwlib/src/hwmgr/alt_address_space.c
+- bsps/arm/altera-cyclone-v/contrib/hwlib/src/hwmgr/alt_clock_manager.c
+- bsps/arm/altera-cyclone-v/contrib/hwlib/src/hwmgr/alt_dma.c
+- bsps/arm/altera-cyclone-v/contrib/hwlib/src/hwmgr/alt_dma_program.c
+- bsps/arm/altera-cyclone-v/contrib/hwlib/src/hwmgr/alt_generalpurpose_io.c
+- bsps/arm/altera-cyclone-v/contrib/hwlib/src/hwmgr/alt_i2c.c
+- bsps/arm/altera-cyclone-v/contrib/hwlib/src/hwmgr/alt_qspi.c
+- bsps/arm/altera-cyclone-v/contrib/hwlib/src/hwmgr/alt_reset_manager.c
+- bsps/arm/altera-cyclone-v/i2c/i2cdrv-config.c
+- bsps/arm/altera-cyclone-v/i2c/i2cdrv.c
+- bsps/arm/altera-cyclone-v/rtc/rtc.c
+- bsps/arm/altera-cyclone-v/start/bspclean.c
+- bsps/arm/altera-cyclone-v/start/bspgetworkarea.c
+- bsps/arm/altera-cyclone-v/start/bspreset.c
+- bsps/arm/altera-cyclone-v/start/bspstart.c
+- bsps/arm/altera-cyclone-v/start/bspstarthooks.c
+- bsps/arm/altera-cyclone-v/start/mmu-config.c
+- bsps/arm/shared/cache/cache-l2c-310.c
+- bsps/arm/shared/clock/clock-a9mpcore.c
+- bsps/arm/shared/cp15/arm-cp15-set-exception-handler.c
+- bsps/arm/shared/cp15/arm-cp15-set-ttb-entries.c
+- bsps/arm/shared/irq/irq-gic.c
+- bsps/arm/shared/start/bsp-start-memcpy.S
+- bsps/shared/dev/btimer/btimer-stub.c
+- bsps/shared/dev/getentropy/getentropy-cpucounter.c
+- bsps/shared/dev/rtc/rtc-support.c
+- bsps/shared/dev/serial/console-termios-init.c
+- bsps/shared/dev/serial/console-termios.c
+- bsps/shared/irq/irq-default-handler.c
+- bsps/shared/start/bsp-fdt.c
+- bsps/shared/start/sbrk.c
+- bsps/shared/start/stackalloc.c
+type: build
diff --git a/spec/build/bsps/arm/altera-cyclone-v/objsmp.yml b/spec/build/bsps/arm/altera-cyclone-v/objsmp.yml
new file mode 100644
index 0000000000..bf0c99d21f
--- /dev/null
+++ b/spec/build/bsps/arm/altera-cyclone-v/objsmp.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: objects
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+cxxflags: []
+enabled-by:
+- RTEMS_SMP
+includes: []
+install: []
+links: []
+source:
+- bsps/arm/altera-cyclone-v/start/bspsmp.c
+- bsps/arm/shared/start/arm-a9mpcore-smp.c
+type: build
diff --git a/spec/build/bsps/arm/altera-cyclone-v/opta9periphclk.yml b/spec/build/bsps/arm/altera-cyclone-v/opta9periphclk.yml
new file mode 100644
index 0000000000..e67ddc129b
--- /dev/null
+++ b/spec/build/bsps/arm/altera-cyclone-v/opta9periphclk.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant: []
+description: |
+ define to set ARM Cortex-A9 MPCore PERIPHCLK clock frequency in Hz, otherwise alt_clk_freq_get() is used
+enabled-by: true
+links: []
+name: BSP_ARM_A9MPCORE_PERIPHCLK
+type: build
diff --git a/spec/build/bsps/arm/altera-cyclone-v/optcachedata.yml b/spec/build/bsps/arm/altera-cyclone-v/optcachedata.yml
new file mode 100644
index 0000000000..77dac09116
--- /dev/null
+++ b/spec/build/bsps/arm/altera-cyclone-v/optcachedata.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+ enable data cache
+enabled-by: true
+links: []
+name: BSP_DATA_CACHE_ENABLED
+type: build
diff --git a/spec/build/bsps/arm/altera-cyclone-v/optcacheinst.yml b/spec/build/bsps/arm/altera-cyclone-v/optcacheinst.yml
new file mode 100644
index 0000000000..a59db43f31
--- /dev/null
+++ b/spec/build/bsps/arm/altera-cyclone-v/optcacheinst.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+ enable instruction cache
+enabled-by: true
+links: []
+name: BSP_INSTRUCTION_CACHE_ENABLED
+type: build
diff --git a/spec/build/bsps/arm/altera-cyclone-v/optclkfastidle.yml b/spec/build/bsps/arm/altera-cyclone-v/optclkfastidle.yml
new file mode 100644
index 0000000000..b800b20428
--- /dev/null
+++ b/spec/build/bsps/arm/altera-cyclone-v/optclkfastidle.yml
@@ -0,0 +1,18 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant:
+- value: true
+ variants:
+ - arm/.*qemu
+description: |
+ This sets a mode where the time runs as fast as possible when a clock ISR occurs while the IDLE thread is executing. This can significantly reduce simulation times.
+enabled-by: true
+links: []
+name: CLOCK_DRIVER_USE_FAST_IDLE
+type: build
diff --git a/spec/build/bsps/arm/altera-cyclone-v/optconcfg.yml b/spec/build/bsps/arm/altera-cyclone-v/optconcfg.yml
new file mode 100644
index 0000000000..635697cc8a
--- /dev/null
+++ b/spec/build/bsps/arm/altera-cyclone-v/optconcfg.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+ configuration for console (UART 0)
+enabled-by: true
+links: []
+name: CYCLONE_V_CONFIG_CONSOLE
+type: build
diff --git a/spec/build/bsps/arm/altera-cyclone-v/optconuart1.yml b/spec/build/bsps/arm/altera-cyclone-v/optconuart1.yml
new file mode 100644
index 0000000000..f5c588a330
--- /dev/null
+++ b/spec/build/bsps/arm/altera-cyclone-v/optconuart1.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+ configuration for UART 1
+enabled-by: true
+links: []
+name: CYCLONE_V_CONFIG_UART_1
+type: build
diff --git a/spec/build/bsps/arm/altera-cyclone-v/optfdtcpyro.yml b/spec/build/bsps/arm/altera-cyclone-v/optfdtcpyro.yml
new file mode 100644
index 0000000000..c26b1ae051
--- /dev/null
+++ b/spec/build/bsps/arm/altera-cyclone-v/optfdtcpyro.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+ copy the FDT blob into the read-only load area via bsp_fdt_copy()
+enabled-by: true
+links: []
+name: BSP_FDT_BLOB_COPY_TO_READ_ONLY_LOAD_AREA
+type: build
diff --git a/spec/build/bsps/arm/altera-cyclone-v/optfdten.yml b/spec/build/bsps/arm/altera-cyclone-v/optfdten.yml
new file mode 100644
index 0000000000..f2fc473967
--- /dev/null
+++ b/spec/build/bsps/arm/altera-cyclone-v/optfdten.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+ define if FDT is supported
+enabled-by: true
+links: []
+name: BSP_FDT_IS_SUPPORTED
+type: build
diff --git a/spec/build/bsps/arm/altera-cyclone-v/optfdtmxsz.yml b/spec/build/bsps/arm/altera-cyclone-v/optfdtmxsz.yml
new file mode 100644
index 0000000000..14af766230
--- /dev/null
+++ b/spec/build/bsps/arm/altera-cyclone-v/optfdtmxsz.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 262144
+default-by-variant: []
+description: |
+ maximum size of the FDT blob in bytes
+enabled-by: true
+format: '{}'
+links: []
+name: BSP_FDT_BLOB_SIZE_MAX
+type: build
diff --git a/spec/build/bsps/arm/altera-cyclone-v/optfdtro.yml b/spec/build/bsps/arm/altera-cyclone-v/optfdtro.yml
new file mode 100644
index 0000000000..a61bb2924b
--- /dev/null
+++ b/spec/build/bsps/arm/altera-cyclone-v/optfdtro.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+ place the FDT blob into the read-only data area
+enabled-by: true
+links: []
+name: BSP_FDT_BLOB_READ_ONLY
+type: build
diff --git a/spec/build/bsps/arm/altera-cyclone-v/optfdtuboot.yml b/spec/build/bsps/arm/altera-cyclone-v/optfdtuboot.yml
new file mode 100644
index 0000000000..5805e912ff
--- /dev/null
+++ b/spec/build/bsps/arm/altera-cyclone-v/optfdtuboot.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+ copy the U-Boot provided FDT to an internal storage
+enabled-by: true
+links: []
+name: BSP_START_COPY_FDT_FROM_U_BOOT
+type: build
diff --git a/spec/build/bsps/arm/altera-cyclone-v/opti2cspeed.yml b/spec/build/bsps/arm/altera-cyclone-v/opti2cspeed.yml
new file mode 100644
index 0000000000..ee8097aa3b
--- /dev/null
+++ b/spec/build/bsps/arm/altera-cyclone-v/opti2cspeed.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 100000
+default-by-variant: []
+description: |
+ speed for I2C0 in HZ
+enabled-by: true
+format: '{}'
+links: []
+name: CYCLONE_V_I2C0_SPEED
+type: build
diff --git a/spec/build/bsps/arm/altera-cyclone-v/optnoi2c.yml b/spec/build/bsps/arm/altera-cyclone-v/optnoi2c.yml
new file mode 100644
index 0000000000..2d36d5f930
--- /dev/null
+++ b/spec/build/bsps/arm/altera-cyclone-v/optnoi2c.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+ Number of configured I2C buses. Note that each bus has to be configured in an apropriate i2cdrv_config array.
+enabled-by: true
+links: []
+name: CYCLONE_V_NO_I2C
+type: build
diff --git a/spec/build/bsps/arm/altera-cyclone-v/optresetvec.yml b/spec/build/bsps/arm/altera-cyclone-v/optresetvec.yml
new file mode 100644
index 0000000000..efd1ea2b2a
--- /dev/null
+++ b/spec/build/bsps/arm/altera-cyclone-v/optresetvec.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant: []
+description: |
+ reset vector address for BSP start
+enabled-by: true
+links: []
+name: BSP_START_RESET_VECTOR
+type: build
diff --git a/spec/build/bsps/arm/altera-cyclone-v/optuartbaud.yml b/spec/build/bsps/arm/altera-cyclone-v/optuartbaud.yml
new file mode 100644
index 0000000000..b5f577ffc3
--- /dev/null
+++ b/spec/build/bsps/arm/altera-cyclone-v/optuartbaud.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 115200
+default-by-variant: []
+description: |
+ baud for UARTs
+enabled-by: true
+format: '{}'
+links: []
+name: CYCLONE_V_UART_BAUD
+type: build
diff --git a/spec/build/bsps/arm/altera-cyclone-v/optuartirq.yml b/spec/build/bsps/arm/altera-cyclone-v/optuartirq.yml
new file mode 100644
index 0000000000..152668b2d9
--- /dev/null
+++ b/spec/build/bsps/arm/altera-cyclone-v/optuartirq.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+ enable usage of interrupts for the UART modules
+enabled-by: true
+links: []
+name: BSP_USE_UART_INTERRUPTS
+type: build
diff --git a/spec/build/bsps/arm/atsam/abi.yml b/spec/build/bsps/arm/atsam/abi.yml
new file mode 100644
index 0000000000..7a95742c36
--- /dev/null
+++ b/spec/build/bsps/arm/atsam/abi.yml
@@ -0,0 +1,20 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-string: null
+- split: null
+- env-append: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default:
+- -mthumb
+- -mcpu=cortex-m7
+- -mfpu=fpv5-d16
+- -mfloat-abi=hard
+default-by-variant: []
+description: |
+ ABI flags
+enabled-by: true
+links: []
+name: ABI_FLAGS
+type: build
diff --git a/spec/build/bsps/arm/atsam/bspatsam.yml b/spec/build/bsps/arm/atsam/bspatsam.yml
new file mode 100644
index 0000000000..f0aaa17cf7
--- /dev/null
+++ b/spec/build/bsps/arm/atsam/bspatsam.yml
@@ -0,0 +1,411 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: atsamv
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: atsam
+includes:
+- bsps/arm/atsam/contrib/libraries/libboard
+- bsps/arm/atsam/contrib/libraries/libboard/include
+- bsps/arm/atsam/contrib/libraries/libchip
+- bsps/arm/atsam/contrib/libraries/libchip/include
+- bsps/arm/atsam/include/libchip
+- bsps/arm/atsam/include/libchip/include
+install:
+- destination: ${BSP_INCLUDEDIR}
+ source:
+ - bsps/arm/atsam/include/bsp.h
+ - bsps/arm/atsam/include/tm27.h
+- destination: ${BSP_INCLUDEDIR}/bsp
+ source:
+ - bsps/arm/atsam/include/bsp/atsam-clock-config.h
+ - bsps/arm/atsam/include/bsp/atsam-i2c.h
+ - bsps/arm/atsam/include/bsp/atsam-spi.h
+ - bsps/arm/atsam/include/bsp/i2c.h
+ - bsps/arm/atsam/include/bsp/iocopy.h
+ - bsps/arm/atsam/include/bsp/irq.h
+ - bsps/arm/atsam/include/bsp/pin-config.h
+ - bsps/arm/atsam/include/bsp/power.h
+ - bsps/arm/atsam/include/bsp/sc16is752.h
+ - bsps/arm/atsam/include/bsp/spi.h
+- destination: ${BSP_INCLUDEDIR}/libchip
+ source:
+ - bsps/arm/atsam/include/libchip/chip.h
+ - bsps/arm/atsam/include/libchip/compiler.h
+- destination: ${BSP_INCLUDEDIR}/libchip/include
+ source:
+ - bsps/arm/atsam/include/libchip/include/acc.h
+ - bsps/arm/atsam/include/libchip/include/adc.h
+ - bsps/arm/atsam/include/libchip/include/aes.h
+ - bsps/arm/atsam/include/libchip/include/afe_dma.h
+ - bsps/arm/atsam/include/libchip/include/afec.h
+ - bsps/arm/atsam/include/libchip/include/chip.h
+ - bsps/arm/atsam/include/libchip/include/dac_dma.h
+ - bsps/arm/atsam/include/libchip/include/efc.h
+ - bsps/arm/atsam/include/libchip/include/exceptions.h
+ - bsps/arm/atsam/include/libchip/include/flashd.h
+ - bsps/arm/atsam/include/libchip/include/gmac.h
+ - bsps/arm/atsam/include/libchip/include/gmacd.h
+ - bsps/arm/atsam/include/libchip/include/hsmci.h
+ - bsps/arm/atsam/include/libchip/include/icm.h
+ - bsps/arm/atsam/include/libchip/include/isi.h
+ - bsps/arm/atsam/include/libchip/include/iso7816_4.h
+ - bsps/arm/atsam/include/libchip/include/mcan.h
+ - bsps/arm/atsam/include/libchip/include/mcid.h
+ - bsps/arm/atsam/include/libchip/include/mediaLB.h
+ - bsps/arm/atsam/include/libchip/include/mpu.h
+ - bsps/arm/atsam/include/libchip/include/pio.h
+ - bsps/arm/atsam/include/libchip/include/pio_capture.h
+ - bsps/arm/atsam/include/libchip/include/pio_it.h
+ - bsps/arm/atsam/include/libchip/include/pmc.h
+ - bsps/arm/atsam/include/libchip/include/pwmc.h
+ - bsps/arm/atsam/include/libchip/include/qspi.h
+ - bsps/arm/atsam/include/libchip/include/qspi_dma.h
+ - bsps/arm/atsam/include/libchip/include/rstc.h
+ - bsps/arm/atsam/include/libchip/include/rtc.h
+ - bsps/arm/atsam/include/libchip/include/rtt.h
+ - bsps/arm/atsam/include/libchip/include/sdramc.h
+ - bsps/arm/atsam/include/libchip/include/smc.h
+ - bsps/arm/atsam/include/libchip/include/spi.h
+ - bsps/arm/atsam/include/libchip/include/spi_dma.h
+ - bsps/arm/atsam/include/libchip/include/ssc.h
+ - bsps/arm/atsam/include/libchip/include/supc.h
+ - bsps/arm/atsam/include/libchip/include/tc.h
+ - bsps/arm/atsam/include/libchip/include/timetick.h
+ - bsps/arm/atsam/include/libchip/include/trace.h
+ - bsps/arm/atsam/include/libchip/include/trng.h
+ - bsps/arm/atsam/include/libchip/include/twi.h
+ - bsps/arm/atsam/include/libchip/include/twid.h
+ - bsps/arm/atsam/include/libchip/include/uart.h
+ - bsps/arm/atsam/include/libchip/include/uart_dma.h
+ - bsps/arm/atsam/include/libchip/include/usart.h
+ - bsps/arm/atsam/include/libchip/include/usart_dma.h
+ - bsps/arm/atsam/include/libchip/include/usbhs.h
+ - bsps/arm/atsam/include/libchip/include/video.h
+ - bsps/arm/atsam/include/libchip/include/wdt.h
+ - bsps/arm/atsam/include/libchip/include/xdma_hardware_interface.h
+ - bsps/arm/atsam/include/libchip/include/xdmac.h
+ - bsps/arm/atsam/include/libchip/include/xdmad.h
+- destination: ${BSP_INCLUDEDIR}/libchip/include/same70
+ source:
+ - bsps/arm/atsam/include/libchip/include/same70/same70.h
+ - bsps/arm/atsam/include/libchip/include/same70/same70j19.h
+ - bsps/arm/atsam/include/libchip/include/same70/same70j20.h
+ - bsps/arm/atsam/include/libchip/include/same70/same70j21.h
+ - bsps/arm/atsam/include/libchip/include/same70/same70n19.h
+ - bsps/arm/atsam/include/libchip/include/same70/same70n20.h
+ - bsps/arm/atsam/include/libchip/include/same70/same70n21.h
+ - bsps/arm/atsam/include/libchip/include/same70/same70q19.h
+ - bsps/arm/atsam/include/libchip/include/same70/same70q20.h
+ - bsps/arm/atsam/include/libchip/include/same70/same70q21.h
+ - bsps/arm/atsam/include/libchip/include/same70/system_same70.h
+- destination: ${BSP_INCLUDEDIR}/libchip/include/same70/component
+ source:
+ - bsps/arm/atsam/include/libchip/include/same70/component/component_acc.h
+ - bsps/arm/atsam/include/libchip/include/same70/component/component_aes.h
+ - bsps/arm/atsam/include/libchip/include/same70/component/component_afec.h
+ - bsps/arm/atsam/include/libchip/include/same70/component/component_chipid.h
+ - bsps/arm/atsam/include/libchip/include/same70/component/component_dacc.h
+ - bsps/arm/atsam/include/libchip/include/same70/component/component_efc.h
+ - bsps/arm/atsam/include/libchip/include/same70/component/component_gmac.h
+ - bsps/arm/atsam/include/libchip/include/same70/component/component_gpbr.h
+ - bsps/arm/atsam/include/libchip/include/same70/component/component_hsmci.h
+ - bsps/arm/atsam/include/libchip/include/same70/component/component_icm.h
+ - bsps/arm/atsam/include/libchip/include/same70/component/component_isi.h
+ - bsps/arm/atsam/include/libchip/include/same70/component/component_matrix.h
+ - bsps/arm/atsam/include/libchip/include/same70/component/component_mcan.h
+ - bsps/arm/atsam/include/libchip/include/same70/component/component_pio.h
+ - bsps/arm/atsam/include/libchip/include/same70/component/component_pmc.h
+ - bsps/arm/atsam/include/libchip/include/same70/component/component_pwm.h
+ - bsps/arm/atsam/include/libchip/include/same70/component/component_qspi.h
+ - bsps/arm/atsam/include/libchip/include/same70/component/component_rstc.h
+ - bsps/arm/atsam/include/libchip/include/same70/component/component_rswdt.h
+ - bsps/arm/atsam/include/libchip/include/same70/component/component_rtc.h
+ - bsps/arm/atsam/include/libchip/include/same70/component/component_rtt.h
+ - bsps/arm/atsam/include/libchip/include/same70/component/component_sdramc.h
+ - bsps/arm/atsam/include/libchip/include/same70/component/component_smc.h
+ - bsps/arm/atsam/include/libchip/include/same70/component/component_spi.h
+ - bsps/arm/atsam/include/libchip/include/same70/component/component_ssc.h
+ - bsps/arm/atsam/include/libchip/include/same70/component/component_supc.h
+ - bsps/arm/atsam/include/libchip/include/same70/component/component_tc.h
+ - bsps/arm/atsam/include/libchip/include/same70/component/component_trng.h
+ - bsps/arm/atsam/include/libchip/include/same70/component/component_twihs.h
+ - bsps/arm/atsam/include/libchip/include/same70/component/component_uart.h
+ - bsps/arm/atsam/include/libchip/include/same70/component/component_usart.h
+ - bsps/arm/atsam/include/libchip/include/same70/component/component_usbhs.h
+ - bsps/arm/atsam/include/libchip/include/same70/component/component_utmi.h
+ - bsps/arm/atsam/include/libchip/include/same70/component/component_wdt.h
+ - bsps/arm/atsam/include/libchip/include/same70/component/component_xdmac.h
+- destination: ${BSP_INCLUDEDIR}/libchip/include/same70/pio
+ source:
+ - bsps/arm/atsam/include/libchip/include/same70/pio/pio_same70j19.h
+ - bsps/arm/atsam/include/libchip/include/same70/pio/pio_same70j20.h
+ - bsps/arm/atsam/include/libchip/include/same70/pio/pio_same70j21.h
+ - bsps/arm/atsam/include/libchip/include/same70/pio/pio_same70n19.h
+ - bsps/arm/atsam/include/libchip/include/same70/pio/pio_same70n20.h
+ - bsps/arm/atsam/include/libchip/include/same70/pio/pio_same70n21.h
+ - bsps/arm/atsam/include/libchip/include/same70/pio/pio_same70q19.h
+ - bsps/arm/atsam/include/libchip/include/same70/pio/pio_same70q20.h
+ - bsps/arm/atsam/include/libchip/include/same70/pio/pio_same70q21.h
+- destination: ${BSP_INCLUDEDIR}/libchip/include/sams70
+ source:
+ - bsps/arm/atsam/include/libchip/include/sams70/sams70.h
+ - bsps/arm/atsam/include/libchip/include/sams70/sams70j19.h
+ - bsps/arm/atsam/include/libchip/include/sams70/sams70j20.h
+ - bsps/arm/atsam/include/libchip/include/sams70/sams70j21.h
+ - bsps/arm/atsam/include/libchip/include/sams70/sams70n19.h
+ - bsps/arm/atsam/include/libchip/include/sams70/sams70n20.h
+ - bsps/arm/atsam/include/libchip/include/sams70/sams70n21.h
+ - bsps/arm/atsam/include/libchip/include/sams70/sams70q19.h
+ - bsps/arm/atsam/include/libchip/include/sams70/sams70q20.h
+ - bsps/arm/atsam/include/libchip/include/sams70/sams70q21.h
+ - bsps/arm/atsam/include/libchip/include/sams70/system_sams70.h
+- destination: ${BSP_INCLUDEDIR}/libchip/include/sams70/component
+ source:
+ - bsps/arm/atsam/include/libchip/include/sams70/component/component_acc.h
+ - bsps/arm/atsam/include/libchip/include/sams70/component/component_aes.h
+ - bsps/arm/atsam/include/libchip/include/sams70/component/component_afec.h
+ - bsps/arm/atsam/include/libchip/include/sams70/component/component_chipid.h
+ - bsps/arm/atsam/include/libchip/include/sams70/component/component_dacc.h
+ - bsps/arm/atsam/include/libchip/include/sams70/component/component_efc.h
+ - bsps/arm/atsam/include/libchip/include/sams70/component/component_gpbr.h
+ - bsps/arm/atsam/include/libchip/include/sams70/component/component_hsmci.h
+ - bsps/arm/atsam/include/libchip/include/sams70/component/component_icm.h
+ - bsps/arm/atsam/include/libchip/include/sams70/component/component_isi.h
+ - bsps/arm/atsam/include/libchip/include/sams70/component/component_matrix.h
+ - bsps/arm/atsam/include/libchip/include/sams70/component/component_pio.h
+ - bsps/arm/atsam/include/libchip/include/sams70/component/component_pmc.h
+ - bsps/arm/atsam/include/libchip/include/sams70/component/component_pwm.h
+ - bsps/arm/atsam/include/libchip/include/sams70/component/component_qspi.h
+ - bsps/arm/atsam/include/libchip/include/sams70/component/component_rstc.h
+ - bsps/arm/atsam/include/libchip/include/sams70/component/component_rswdt.h
+ - bsps/arm/atsam/include/libchip/include/sams70/component/component_rtc.h
+ - bsps/arm/atsam/include/libchip/include/sams70/component/component_rtt.h
+ - bsps/arm/atsam/include/libchip/include/sams70/component/component_sdramc.h
+ - bsps/arm/atsam/include/libchip/include/sams70/component/component_smc.h
+ - bsps/arm/atsam/include/libchip/include/sams70/component/component_spi.h
+ - bsps/arm/atsam/include/libchip/include/sams70/component/component_ssc.h
+ - bsps/arm/atsam/include/libchip/include/sams70/component/component_supc.h
+ - bsps/arm/atsam/include/libchip/include/sams70/component/component_tc.h
+ - bsps/arm/atsam/include/libchip/include/sams70/component/component_trng.h
+ - bsps/arm/atsam/include/libchip/include/sams70/component/component_twihs.h
+ - bsps/arm/atsam/include/libchip/include/sams70/component/component_uart.h
+ - bsps/arm/atsam/include/libchip/include/sams70/component/component_usart.h
+ - bsps/arm/atsam/include/libchip/include/sams70/component/component_usbhs.h
+ - bsps/arm/atsam/include/libchip/include/sams70/component/component_utmi.h
+ - bsps/arm/atsam/include/libchip/include/sams70/component/component_wdt.h
+ - bsps/arm/atsam/include/libchip/include/sams70/component/component_xdmac.h
+- destination: ${BSP_INCLUDEDIR}/libchip/include/sams70/pio
+ source:
+ - bsps/arm/atsam/include/libchip/include/sams70/pio/pio_sams70j19.h
+ - bsps/arm/atsam/include/libchip/include/sams70/pio/pio_sams70j20.h
+ - bsps/arm/atsam/include/libchip/include/sams70/pio/pio_sams70j21.h
+ - bsps/arm/atsam/include/libchip/include/sams70/pio/pio_sams70n19.h
+ - bsps/arm/atsam/include/libchip/include/sams70/pio/pio_sams70n20.h
+ - bsps/arm/atsam/include/libchip/include/sams70/pio/pio_sams70n21.h
+ - bsps/arm/atsam/include/libchip/include/sams70/pio/pio_sams70q19.h
+ - bsps/arm/atsam/include/libchip/include/sams70/pio/pio_sams70q20.h
+ - bsps/arm/atsam/include/libchip/include/sams70/pio/pio_sams70q21.h
+- destination: ${BSP_INCLUDEDIR}/libchip/include/samv71
+ source:
+ - bsps/arm/atsam/include/libchip/include/samv71/samv71.h
+ - bsps/arm/atsam/include/libchip/include/samv71/samv71j19.h
+ - bsps/arm/atsam/include/libchip/include/samv71/samv71j20.h
+ - bsps/arm/atsam/include/libchip/include/samv71/samv71j21.h
+ - bsps/arm/atsam/include/libchip/include/samv71/samv71n19.h
+ - bsps/arm/atsam/include/libchip/include/samv71/samv71n20.h
+ - bsps/arm/atsam/include/libchip/include/samv71/samv71n21.h
+ - bsps/arm/atsam/include/libchip/include/samv71/samv71q19.h
+ - bsps/arm/atsam/include/libchip/include/samv71/samv71q20.h
+ - bsps/arm/atsam/include/libchip/include/samv71/samv71q21.h
+ - bsps/arm/atsam/include/libchip/include/samv71/system_samv71.h
+- destination: ${BSP_INCLUDEDIR}/libchip/include/samv71/component
+ source:
+ - bsps/arm/atsam/include/libchip/include/samv71/component/component_acc.h
+ - bsps/arm/atsam/include/libchip/include/samv71/component/component_aes.h
+ - bsps/arm/atsam/include/libchip/include/samv71/component/component_afec.h
+ - bsps/arm/atsam/include/libchip/include/samv71/component/component_chipid.h
+ - bsps/arm/atsam/include/libchip/include/samv71/component/component_dacc.h
+ - bsps/arm/atsam/include/libchip/include/samv71/component/component_efc.h
+ - bsps/arm/atsam/include/libchip/include/samv71/component/component_gmac.h
+ - bsps/arm/atsam/include/libchip/include/samv71/component/component_gpbr.h
+ - bsps/arm/atsam/include/libchip/include/samv71/component/component_hsmci.h
+ - bsps/arm/atsam/include/libchip/include/samv71/component/component_icm.h
+ - bsps/arm/atsam/include/libchip/include/samv71/component/component_isi.h
+ - bsps/arm/atsam/include/libchip/include/samv71/component/component_matrix.h
+ - bsps/arm/atsam/include/libchip/include/samv71/component/component_mcan.h
+ - bsps/arm/atsam/include/libchip/include/samv71/component/component_mlb.h
+ - bsps/arm/atsam/include/libchip/include/samv71/component/component_pio.h
+ - bsps/arm/atsam/include/libchip/include/samv71/component/component_pmc.h
+ - bsps/arm/atsam/include/libchip/include/samv71/component/component_pwm.h
+ - bsps/arm/atsam/include/libchip/include/samv71/component/component_qspi.h
+ - bsps/arm/atsam/include/libchip/include/samv71/component/component_rstc.h
+ - bsps/arm/atsam/include/libchip/include/samv71/component/component_rswdt.h
+ - bsps/arm/atsam/include/libchip/include/samv71/component/component_rtc.h
+ - bsps/arm/atsam/include/libchip/include/samv71/component/component_rtt.h
+ - bsps/arm/atsam/include/libchip/include/samv71/component/component_sdramc.h
+ - bsps/arm/atsam/include/libchip/include/samv71/component/component_smc.h
+ - bsps/arm/atsam/include/libchip/include/samv71/component/component_spi.h
+ - bsps/arm/atsam/include/libchip/include/samv71/component/component_ssc.h
+ - bsps/arm/atsam/include/libchip/include/samv71/component/component_supc.h
+ - bsps/arm/atsam/include/libchip/include/samv71/component/component_tc.h
+ - bsps/arm/atsam/include/libchip/include/samv71/component/component_trng.h
+ - bsps/arm/atsam/include/libchip/include/samv71/component/component_twihs.h
+ - bsps/arm/atsam/include/libchip/include/samv71/component/component_uart.h
+ - bsps/arm/atsam/include/libchip/include/samv71/component/component_usart.h
+ - bsps/arm/atsam/include/libchip/include/samv71/component/component_usbhs.h
+ - bsps/arm/atsam/include/libchip/include/samv71/component/component_utmi.h
+ - bsps/arm/atsam/include/libchip/include/samv71/component/component_wdt.h
+ - bsps/arm/atsam/include/libchip/include/samv71/component/component_xdmac.h
+- destination: ${BSP_INCLUDEDIR}/libchip/include/samv71/pio
+ source:
+ - bsps/arm/atsam/include/libchip/include/samv71/pio/pio_samv71j19.h
+ - bsps/arm/atsam/include/libchip/include/samv71/pio/pio_samv71j20.h
+ - bsps/arm/atsam/include/libchip/include/samv71/pio/pio_samv71j21.h
+ - bsps/arm/atsam/include/libchip/include/samv71/pio/pio_samv71n19.h
+ - bsps/arm/atsam/include/libchip/include/samv71/pio/pio_samv71n20.h
+ - bsps/arm/atsam/include/libchip/include/samv71/pio/pio_samv71n21.h
+ - bsps/arm/atsam/include/libchip/include/samv71/pio/pio_samv71q19.h
+ - bsps/arm/atsam/include/libchip/include/samv71/pio/pio_samv71q20.h
+ - bsps/arm/atsam/include/libchip/include/samv71/pio/pio_samv71q21.h
+- destination: ${BSP_LIBDIR}
+ source:
+ - bsps/arm/atsam/start/linkcmds
+ - bsps/arm/atsam/start/linkcmds.intsram
+ - bsps/arm/atsam/start/linkcmds.qspiflash
+ - bsps/arm/atsam/start/linkcmds.sdram
+links:
+- role: build-dependency
+ uid: abi
+- role: build-dependency
+ uid: objnet
+- role: build-dependency
+ uid: optchgclksram
+- role: build-dependency
+ uid: optchip
+- role: build-dependency
+ uid: optconbaud
+- role: build-dependency
+ uid: optconidx
+- role: build-dependency
+ uid: optconirq
+- role: build-dependency
+ uid: optcontype
+- role: build-dependency
+ uid: optmck
+- role: build-dependency
+ uid: optnocachesz
+- role: build-dependency
+ uid: optoscmain
+- role: build-dependency
+ uid: optqspiflashsz
+- role: build-dependency
+ uid: optsdram
+- role: build-dependency
+ uid: opttcmsz
+- role: build-dependency
+ uid: optusextal
+- role: build-dependency
+ uid: tstatsamv
+- role: build-dependency
+ uid: ../grp
+- role: build-dependency
+ uid: ../start
+- role: build-dependency
+ uid: ../../obj
+- role: build-dependency
+ uid: ../../objirq
+- role: build-dependency
+ uid: ../../opto2
+- role: build-dependency
+ uid: linkcmds
+- role: build-dependency
+ uid: ../../bspopts
+source:
+- bsps/arm/atsam/clock/systick-freq.c
+- bsps/arm/atsam/console/console.c
+- bsps/arm/atsam/console/debug-console.c
+- bsps/arm/atsam/contrib/libraries/libboard/resources_v71/system_samv71.c
+- bsps/arm/atsam/contrib/libraries/libboard/source/board_lowlevel.c
+- bsps/arm/atsam/contrib/libraries/libboard/source/board_memories.c
+- bsps/arm/atsam/contrib/libraries/libboard/source/dbg_console.c
+- bsps/arm/atsam/contrib/libraries/libchip/source/acc.c
+- bsps/arm/atsam/contrib/libraries/libchip/source/aes.c
+- bsps/arm/atsam/contrib/libraries/libchip/source/afe_dma.c
+- bsps/arm/atsam/contrib/libraries/libchip/source/afec.c
+- bsps/arm/atsam/contrib/libraries/libchip/source/dac_dma.c
+- bsps/arm/atsam/contrib/libraries/libchip/source/efc.c
+- bsps/arm/atsam/contrib/libraries/libchip/source/exceptions.c
+- bsps/arm/atsam/contrib/libraries/libchip/source/flashd.c
+- bsps/arm/atsam/contrib/libraries/libchip/source/gmac.c
+- bsps/arm/atsam/contrib/libraries/libchip/source/gmacd.c
+- bsps/arm/atsam/contrib/libraries/libchip/source/hsmci.c
+- bsps/arm/atsam/contrib/libraries/libchip/source/icm.c
+- bsps/arm/atsam/contrib/libraries/libchip/source/isi.c
+- bsps/arm/atsam/contrib/libraries/libchip/source/mcan.c
+- bsps/arm/atsam/contrib/libraries/libchip/source/mediaLB.c
+- bsps/arm/atsam/contrib/libraries/libchip/source/mpu.c
+- bsps/arm/atsam/contrib/libraries/libchip/source/pio.c
+- bsps/arm/atsam/contrib/libraries/libchip/source/pio_capture.c
+- bsps/arm/atsam/contrib/libraries/libchip/source/pio_it.c
+- bsps/arm/atsam/contrib/libraries/libchip/source/pmc.c
+- bsps/arm/atsam/contrib/libraries/libchip/source/pwmc.c
+- bsps/arm/atsam/contrib/libraries/libchip/source/qspi.c
+- bsps/arm/atsam/contrib/libraries/libchip/source/qspi_dma.c
+- bsps/arm/atsam/contrib/libraries/libchip/source/rstc.c
+- bsps/arm/atsam/contrib/libraries/libchip/source/rtc.c
+- bsps/arm/atsam/contrib/libraries/libchip/source/rtt.c
+- bsps/arm/atsam/contrib/libraries/libchip/source/sdramc.c
+- bsps/arm/atsam/contrib/libraries/libchip/source/spi.c
+- bsps/arm/atsam/contrib/libraries/libchip/source/spi_dma.c
+- bsps/arm/atsam/contrib/libraries/libchip/source/ssc.c
+- bsps/arm/atsam/contrib/libraries/libchip/source/supc.c
+- bsps/arm/atsam/contrib/libraries/libchip/source/tc.c
+- bsps/arm/atsam/contrib/libraries/libchip/source/trng.c
+- bsps/arm/atsam/contrib/libraries/libchip/source/twi.c
+- bsps/arm/atsam/contrib/libraries/libchip/source/twid.c
+- bsps/arm/atsam/contrib/libraries/libchip/source/uart.c
+- bsps/arm/atsam/contrib/libraries/libchip/source/uart_dma.c
+- bsps/arm/atsam/contrib/libraries/libchip/source/usart.c
+- bsps/arm/atsam/contrib/libraries/libchip/source/usart_dma.c
+- bsps/arm/atsam/contrib/libraries/libchip/source/wdt.c
+- bsps/arm/atsam/contrib/libraries/libchip/source/xdma_hardware_interface.c
+- bsps/arm/atsam/contrib/libraries/libchip/source/xdmad.c
+- bsps/arm/atsam/i2c/atsam_i2c_bus.c
+- bsps/arm/atsam/i2c/atsam_i2c_init.c
+- bsps/arm/atsam/rtc/rtc-config.c
+- bsps/arm/atsam/spi/atsam_spi_bus.c
+- bsps/arm/atsam/spi/atsam_spi_init.c
+- bsps/arm/atsam/spi/sc16is752.c
+- bsps/arm/atsam/start/bspstart.c
+- bsps/arm/atsam/start/bspstarthooks.c
+- bsps/arm/atsam/start/getentropy-trng.c
+- bsps/arm/atsam/start/iocopy.c
+- bsps/arm/atsam/start/pin-config.c
+- bsps/arm/atsam/start/pmc-config.c
+- bsps/arm/atsam/start/power-clock.c
+- bsps/arm/atsam/start/power-rtc.c
+- bsps/arm/atsam/start/power-wait.c
+- bsps/arm/atsam/start/power.c
+- bsps/arm/atsam/start/restart.c
+- bsps/arm/atsam/start/sdram-config.c
+- bsps/arm/shared/cache/cache-v7m.c
+- bsps/arm/shared/clock/clock-armv7m.c
+- bsps/arm/shared/cpucounter/cpucounter-armv7m.c
+- bsps/arm/shared/irq/irq-armv7m.c
+- bsps/arm/shared/irq/irq-dispatch-armv7m.c
+- bsps/arm/shared/start/bsp-start-memcpy.S
+- bsps/arm/shared/start/bspreset-armv7m.c
+- bsps/shared/dev/btimer/btimer-stub.c
+- bsps/shared/dev/rtc/rtc-support.c
+- bsps/shared/dev/serial/console-termios.c
+- bsps/shared/irq/irq-default-handler.c
+- bsps/shared/start/bspfatal-default.c
+- bsps/shared/start/bspgetworkarea-default.c
+- bsps/shared/start/sbrk.c
+- bsps/shared/start/stackalloc.c
+type: build
diff --git a/spec/build/bsps/arm/atsam/linkcmds.yml b/spec/build/bsps/arm/atsam/linkcmds.yml
new file mode 100644
index 0000000000..fe6211f82f
--- /dev/null
+++ b/spec/build/bsps/arm/atsam/linkcmds.yml
@@ -0,0 +1,49 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: config-file
+content: |
+ MEMORY {
+ ITCM : ORIGIN = 0x00000000, LENGTH = ${ATSAM_MEMORY_TCM_SIZE}
+ INTFLASH : ORIGIN = 0x00400000, LENGTH = ${ATSAM_MEMORY_INTFLASH_SIZE}
+ DTCM : ORIGIN = 0x20000000, LENGTH = ${ATSAM_MEMORY_TCM_SIZE}
+ INTSRAM : ORIGIN = 0x20400000, LENGTH = ${ATSAM_MEMORY_INTSRAM_SIZE} - 2 * ${ATSAM_MEMORY_TCM_SIZE} - ${ATSAM_MEMORY_NOCACHE_SIZE}
+ NOCACHE : ORIGIN = 0x20400000 + ${ATSAM_MEMORY_INTSRAM_SIZE} - 2 * ${ATSAM_MEMORY_TCM_SIZE} - ${ATSAM_MEMORY_NOCACHE_SIZE}, LENGTH = ${ATSAM_MEMORY_NOCACHE_SIZE}
+ SDRAM : ORIGIN = 0x70000000, LENGTH = ${ATSAM_MEMORY_SDRAM_SIZE}
+ QSPIFLASH : ORIGIN = 0x80000000, LENGTH = ${ATSAM_MEMORY_QSPIFLASH_SIZE}
+ }
+
+ /* Must be used only for MPU definitions */
+
+ atsam_memory_itcm_begin = ORIGIN (ITCM);
+ atsam_memory_itcm_end = ORIGIN (ITCM) + LENGTH (ITCM);
+ atsam_memory_itcm_size = LENGTH (ITCM);
+
+ atsam_memory_intflash_begin = ORIGIN (INTFLASH);
+ atsam_memory_intflash_end = ORIGIN (INTFLASH) + LENGTH (INTFLASH);
+ atsam_memory_intflash_size = LENGTH (INTFLASH);
+
+ atsam_memory_dtcm_begin = ORIGIN (DTCM);
+ atsam_memory_dtcm_end = ORIGIN (DTCM) + LENGTH (DTCM);
+ atsam_memory_dtcm_size = LENGTH (DTCM);
+
+ atsam_memory_intsram_begin = ORIGIN (INTSRAM);
+ atsam_memory_intsram_end = ORIGIN (INTSRAM) + LENGTH (INTSRAM);
+ atsam_memory_intsram_size = LENGTH (INTSRAM);
+
+ atsam_memory_nocache_begin = ORIGIN (NOCACHE);
+ atsam_memory_nocache_end = ORIGIN (NOCACHE) + LENGTH (NOCACHE);
+ atsam_memory_nocache_size = LENGTH (NOCACHE);
+
+ atsam_memory_sdram_begin = ORIGIN (SDRAM);
+ atsam_memory_sdram_end = ORIGIN (SDRAM) + LENGTH (SDRAM);
+ atsam_memory_sdram_size = LENGTH (SDRAM);
+
+ atsam_memory_qspiflash_begin = ORIGIN (QSPIFLASH);
+ atsam_memory_qspiflash_end = ORIGIN (QSPIFLASH) + LENGTH (QSPIFLASH);
+ atsam_memory_qspiflash_size = LENGTH (QSPIFLASH);
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+enabled-by: true
+install-path: ${BSP_LIBDIR}
+links: []
+target: linkcmds.memory
+type: build
diff --git a/spec/build/bsps/arm/atsam/objnet.yml b/spec/build/bsps/arm/atsam/objnet.yml
new file mode 100644
index 0000000000..7aeceb47d9
--- /dev/null
+++ b/spec/build/bsps/arm/atsam/objnet.yml
@@ -0,0 +1,22 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: objects
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+cxxflags: []
+enabled-by:
+- RTEMS_NETWORKING
+includes:
+- bsps/arm/atsam/contrib/libraries/libboard
+- bsps/arm/atsam/contrib/libraries/libboard/include
+- bsps/arm/atsam/contrib/libraries/libchip
+- bsps/arm/atsam/contrib/libraries/libchip/include
+- bsps/arm/atsam/include/libchip
+- bsps/arm/atsam/include/libchip/include
+- cpukit/libnetworking
+install: []
+links: []
+source:
+- bsps/arm/atsam/net/if_atsam.c
+type: build
diff --git a/spec/build/bsps/arm/atsam/optchgclksram.yml b/spec/build/bsps/arm/atsam/optchgclksram.yml
new file mode 100644
index 0000000000..58dca377d7
--- /dev/null
+++ b/spec/build/bsps/arm/atsam/optchgclksram.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant: []
+description: |
+ Move the functions that set up the clock into the SRAM. This allows to change the clock frequency even if the application is started from SDRAM. Requires a TCM_SIZE > 0.
+enabled-by: true
+links: []
+name: ATSAM_CHANGE_CLOCK_FROM_SRAM
+type: build
diff --git a/spec/build/bsps/arm/atsam/optchip.yml b/spec/build/bsps/arm/atsam/optchip.yml
new file mode 100644
index 0000000000..16998e6c2a
--- /dev/null
+++ b/spec/build/bsps/arm/atsam/optchip.yml
@@ -0,0 +1,54 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-string: null
+- script: |
+ c = ("__SAMV71Q21__", 0x00200000, 0x00060000)
+ chips = {
+ "same70j19": ("__SAME70J19__", 0x00080000, 0x00040000),
+ "same70j20": ("__SAME70J20__", 0x00100000, 0x00060000),
+ "same70j21": ("__SAME70J21__", 0x00200000, 0x00060000),
+ "same70n19": ("__SAME70N19__", 0x00080000, 0x00040000),
+ "same70n20": ("__SAME70N20__", 0x00100000, 0x00060000),
+ "same70n21": ("__SAME70N21__", 0x00200000, 0x00060000),
+ "same70q19": ("__SAME70Q19__", 0x00080000, 0x00040000),
+ "same70q20": ("__SAME70Q20__", 0x00100000, 0x00060000),
+ "same70q21": ("__SAME70Q21__", 0x00200000, 0x00060000),
+ "sams70j19": ("__SAMS70J19__", 0x00080000, 0x00040000),
+ "sams70j20": ("__SAMS70J20__", 0x00100000, 0x00060000),
+ "sams70j21": ("__SAMS70J21__", 0x00200000, 0x00060000),
+ "sams70n19": ("__SAMS70N19__", 0x00080000, 0x00040000),
+ "sams70n20": ("__SAMS70N20__", 0x00100000, 0x00060000),
+ "sams70n21": ("__SAMS70N21__", 0x00200000, 0x00060000),
+ "sams70q19": ("__SAMS70Q19__", 0x00080000, 0x00040000),
+ "sams70q20": ("__SAMS70Q20__", 0x00100000, 0x00060000),
+ "sams70q21": ("__SAMS70Q21__", 0x00200000, 0x00060000),
+ "samv71j19": ("__SAMV71J19__", 0x00080000, 0x00040000),
+ "samv71j20": ("__SAMV71J20__", 0x00100000, 0x00060000),
+ "samv71j21": ("__SAMV71J21__", 0x00200000, 0x00060000),
+ "samv71n19": ("__SAMV71N19__", 0x00080000, 0x00040000),
+ "samv71n20": ("__SAMV71N20__", 0x00100000, 0x00060000),
+ "samv71n21": ("__SAMV71N21__", 0x00200000, 0x00060000),
+ "samv71q19": ("__SAMV71Q19__", 0x00080000, 0x00040000),
+ "samv71q20": ("__SAMV71Q20__", 0x00100000, 0x00060000),
+ "samv71q21": c,
+ }
+ if value:
+ try:
+ c = chips[value]
+ except:
+ conf.fatal("Unkown chip variant '{}'".format(value))
+ conf.define_cond(c[0], True)
+ conf.env["ATSAM_MEMORY_INTFLASH_SIZE"] = c[1]
+ conf.env["ATSAM_MEMORY_INTSRAM_SIZE"] = c[2]
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: samv71q21
+default-by-variant: []
+description: |
+ Chip variant
+enabled-by: true
+format: '{}'
+links: []
+name: ATSAM_CHIP
+type: build
diff --git a/spec/build/bsps/arm/atsam/optconbaud.yml b/spec/build/bsps/arm/atsam/optconbaud.yml
new file mode 100644
index 0000000000..b0e34e7505
--- /dev/null
+++ b/spec/build/bsps/arm/atsam/optconbaud.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 115200
+default-by-variant: []
+description: |
+ initial baud for console devices (default 115200)
+enabled-by: true
+format: '{}'
+links: []
+name: ATSAM_CONSOLE_BAUD
+type: build
diff --git a/spec/build/bsps/arm/atsam/optconidx.yml b/spec/build/bsps/arm/atsam/optconidx.yml
new file mode 100644
index 0000000000..42fb3b142a
--- /dev/null
+++ b/spec/build/bsps/arm/atsam/optconidx.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+ device index for /dev/console (default 1, e.g. USART1)
+enabled-by: true
+links: []
+name: ATSAM_CONSOLE_DEVICE_INDEX
+type: build
diff --git a/spec/build/bsps/arm/atsam/optconirq.yml b/spec/build/bsps/arm/atsam/optconirq.yml
new file mode 100644
index 0000000000..a410e05060
--- /dev/null
+++ b/spec/build/bsps/arm/atsam/optconirq.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+ use interrupt driven mode for console devices (used by default)
+enabled-by: true
+links: []
+name: ATSAM_CONSOLE_USE_INTERRUPTS
+type: build
diff --git a/spec/build/bsps/arm/atsam/optcontype.yml b/spec/build/bsps/arm/atsam/optcontype.yml
new file mode 100644
index 0000000000..eddbee1063
--- /dev/null
+++ b/spec/build/bsps/arm/atsam/optcontype.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant: []
+description: |
+ device type for /dev/console, use 0 for USART and 1 for UART (default USART)
+enabled-by: true
+links: []
+name: ATSAM_CONSOLE_DEVICE_TYPE
+type: build
diff --git a/spec/build/bsps/arm/atsam/optmck.yml b/spec/build/bsps/arm/atsam/optmck.yml
new file mode 100644
index 0000000000..d216542285
--- /dev/null
+++ b/spec/build/bsps/arm/atsam/optmck.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 123000000
+default-by-variant: []
+description: |
+ Frequency of the MCK in Hz. Set to 0 to force application defined speed. See start/pmc-config.c for available clock configurations.
+enabled-by: true
+format: '{}'
+links: []
+name: ATSAM_MCK
+type: build
diff --git a/spec/build/bsps/arm/atsam/optnocachesz.yml b/spec/build/bsps/arm/atsam/optnocachesz.yml
new file mode 100644
index 0000000000..433633d3b0
--- /dev/null
+++ b/spec/build/bsps/arm/atsam/optnocachesz.yml
@@ -0,0 +1,17 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- format-and-define: null
+- env-assign: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 4096
+default-by-variant: []
+description: |
+ size of NOCACHE section in bytes
+enabled-by: true
+format: '{:#010x}'
+links: []
+name: ATSAM_MEMORY_NOCACHE_SIZE
+type: build
diff --git a/spec/build/bsps/arm/atsam/optoscmain.yml b/spec/build/bsps/arm/atsam/optoscmain.yml
new file mode 100644
index 0000000000..4cafffea37
--- /dev/null
+++ b/spec/build/bsps/arm/atsam/optoscmain.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 12000000
+default-by-variant: []
+description: |
+ Main oscillator frequency in Hz (default 12MHz)
+enabled-by: true
+format: '{}'
+links: []
+name: BOARD_MAINOSC
+type: build
diff --git a/spec/build/bsps/arm/atsam/optqspiflashsz.yml b/spec/build/bsps/arm/atsam/optqspiflashsz.yml
new file mode 100644
index 0000000000..a9a71b049f
--- /dev/null
+++ b/spec/build/bsps/arm/atsam/optqspiflashsz.yml
@@ -0,0 +1,17 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- format-and-define: null
+- env-assign: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 2097152
+default-by-variant: []
+description: |
+ size of QSPI flash in bytes
+enabled-by: true
+format: '{:#010x}'
+links: []
+name: ATSAM_MEMORY_QSPIFLASH_SIZE
+type: build
diff --git a/spec/build/bsps/arm/atsam/optsdram.yml b/spec/build/bsps/arm/atsam/optsdram.yml
new file mode 100644
index 0000000000..c07edd9ba5
--- /dev/null
+++ b/spec/build/bsps/arm/atsam/optsdram.yml
@@ -0,0 +1,29 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-string: null
+- script: |
+ s = ("ATSAM_SDRAM_IS42S16100E_7BLI", 0x00200000)
+ sdram = {
+ "is42s16100e-7bli": s,
+ "is42s16320f-7bl": ("ATSAM_SDRAM_IS42S16320F_7BL", 0x04000000),
+ "mt48lc16m16a2p-6a": ("ATSAM_SDRAM_MT48LC16M16A2P_6A", 0x02000000),
+ }
+ if value:
+ try:
+ s = sdram[value]
+ except:
+ conf.fatal("Unkown SDRAM variant '{}'".format(value))
+ conf.define_cond(s[0], True)
+ conf.env["ATSAM_MEMORY_SDRAM_SIZE"] = s[1]
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: is42s16100e-7bli
+default-by-variant: []
+description: |
+ SDRAM variant
+enabled-by: true
+format: '{}'
+links: []
+name: ATSAM_SDRAM
+type: build
diff --git a/spec/build/bsps/arm/atsam/opttcmsz.yml b/spec/build/bsps/arm/atsam/opttcmsz.yml
new file mode 100644
index 0000000000..7e8b1121e8
--- /dev/null
+++ b/spec/build/bsps/arm/atsam/opttcmsz.yml
@@ -0,0 +1,17 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- format-and-define: null
+- env-assign: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 0
+default-by-variant: []
+description: |
+ size of tightly coupled memories (TCM) in bytes
+enabled-by: true
+format: '{:#010x}'
+links: []
+name: ATSAM_MEMORY_TCM_SIZE
+type: build
diff --git a/spec/build/bsps/arm/atsam/optusextal.yml b/spec/build/bsps/arm/atsam/optusextal.yml
new file mode 100644
index 0000000000..6353956d15
--- /dev/null
+++ b/spec/build/bsps/arm/atsam/optusextal.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+ Use the external crystal as source for the slow clock instead of the internal RC oscillator. Note that on the ATSAM the NRST pin seems to depend on the slow clock as well as all watchdogs. If ATSAM_SLOWCLOCK_USE_XTAL is set to 1 without a external crystal connected, the controller might hang in the switching process without a working NRST pin.
+enabled-by: true
+links: []
+name: ATSAM_SLOWCLOCK_USE_XTAL
+type: build
diff --git a/spec/build/bsps/arm/atsam/tstatsamv.yml b/spec/build/bsps/arm/atsam/tstatsamv.yml
new file mode 100644
index 0000000000..41d28657e9
--- /dev/null
+++ b/spec/build/bsps/arm/atsam/tstatsamv.yml
@@ -0,0 +1,35 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- set-test-state:
+ fileio: exclude
+ flashdisk01: exclude
+ fsdosfsname01: exclude
+ ftp01: exclude
+ jffs2fserror: exclude
+ jffs2fslink: exclude
+ jffs2fspatheval: exclude
+ jffs2fspermission: exclude
+ jffs2fsrdwr: exclude
+ jffs2fsscandir01: exclude
+ jffs2fssymlink: exclude
+ jffs2fstime: exclude
+ linpack: exclude
+ mghttpd01: exclude
+ pppd: exclude
+ psxconfig01: exclude
+ record02: exclude
+ sp16: exclude
+ sp25: exclude
+ sp48: exclude
+ spregionerr01: exclude
+ spstkalloc02: exclude
+ tmfine01: exclude
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: null
+default-by-variant: []
+description: ''
+enabled-by: true
+links: []
+type: build
diff --git a/spec/build/bsps/arm/beagle/abi.yml b/spec/build/bsps/arm/beagle/abi.yml
new file mode 100644
index 0000000000..80b94605e7
--- /dev/null
+++ b/spec/build/bsps/arm/beagle/abi.yml
@@ -0,0 +1,17 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-string: null
+- split: null
+- env-append: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default:
+- -mcpu=cortex-a8
+default-by-variant: []
+description: |
+ ABI flags
+enabled-by: true
+links: []
+name: ABI_FLAGS
+type: build
diff --git a/spec/build/bsps/arm/beagle/bspboardorig.yml b/spec/build/bsps/arm/beagle/bspboardorig.yml
new file mode 100644
index 0000000000..92eb7001fd
--- /dev/null
+++ b/spec/build/bsps/arm/beagle/bspboardorig.yml
@@ -0,0 +1,19 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: beagleboardorig
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: beagle
+includes: []
+install: []
+links:
+- role: build-dependency
+ uid: grp
+- role: build-dependency
+ uid: ../../opto2
+source: []
+type: build
diff --git a/spec/build/bsps/arm/beagle/bspboardxm.yml b/spec/build/bsps/arm/beagle/bspboardxm.yml
new file mode 100644
index 0000000000..b0869cfbce
--- /dev/null
+++ b/spec/build/bsps/arm/beagle/bspboardxm.yml
@@ -0,0 +1,19 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: beagleboardxm
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: beagle
+includes: []
+install: []
+links:
+- role: build-dependency
+ uid: grp
+- role: build-dependency
+ uid: ../../opto2
+source: []
+type: build
diff --git a/spec/build/bsps/arm/beagle/bspboneblack.yml b/spec/build/bsps/arm/beagle/bspboneblack.yml
new file mode 100644
index 0000000000..7818fdebfa
--- /dev/null
+++ b/spec/build/bsps/arm/beagle/bspboneblack.yml
@@ -0,0 +1,19 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: beagleboneblack
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: beagle
+includes: []
+install: []
+links:
+- role: build-dependency
+ uid: grp
+- role: build-dependency
+ uid: ../../opto2
+source: []
+type: build
diff --git a/spec/build/bsps/arm/beagle/bspbonewhite.yml b/spec/build/bsps/arm/beagle/bspbonewhite.yml
new file mode 100644
index 0000000000..85ae13cea5
--- /dev/null
+++ b/spec/build/bsps/arm/beagle/bspbonewhite.yml
@@ -0,0 +1,19 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: beaglebonewhite
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: beagle
+includes: []
+install: []
+links:
+- role: build-dependency
+ uid: grp
+- role: build-dependency
+ uid: ../../opto2
+source: []
+type: build
diff --git a/spec/build/bsps/arm/beagle/grp.yml b/spec/build/bsps/arm/beagle/grp.yml
new file mode 100644
index 0000000000..1375913fd0
--- /dev/null
+++ b/spec/build/bsps/arm/beagle/grp.yml
@@ -0,0 +1,44 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: group
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+enabled-by: true
+includes: []
+install: []
+ldflags: []
+links:
+- role: build-dependency
+ uid: abi
+- role: build-dependency
+ uid: obj
+- role: build-dependency
+ uid: optam335x
+- role: build-dependency
+ uid: optconbaud
+- role: build-dependency
+ uid: optconpoll
+- role: build-dependency
+ uid: optdebug
+- role: build-dependency
+ uid: optdm3730
+- role: build-dependency
+ uid: optfdtcpyro
+- role: build-dependency
+ uid: optfdtmxsz
+- role: build-dependency
+ uid: optfdtro
+- role: build-dependency
+ uid: optfdtuboot
+- role: build-dependency
+ uid: ../grp
+- role: build-dependency
+ uid: ../start
+- role: build-dependency
+ uid: ../../obj
+- role: build-dependency
+ uid: ../../objirq
+- role: build-dependency
+ uid: ../../bspopts
+type: build
+use-after: []
+use-before: []
diff --git a/spec/build/bsps/arm/beagle/obj.yml b/spec/build/bsps/arm/beagle/obj.yml
new file mode 100644
index 0000000000..87c0ad873d
--- /dev/null
+++ b/spec/build/bsps/arm/beagle/obj.yml
@@ -0,0 +1,61 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: objects
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+cxxflags: []
+enabled-by: true
+includes: []
+install:
+- destination: ${BSP_INCLUDEDIR}
+ source:
+ - bsps/arm/beagle/include/bsp.h
+ - bsps/arm/beagle/include/tm27.h
+- destination: ${BSP_INCLUDEDIR}/bsp
+ source:
+ - bsps/arm/beagle/include/bsp/bbb-gpio.h
+ - bsps/arm/beagle/include/bsp/bbb-pwm.h
+ - bsps/arm/beagle/include/bsp/beagleboneblack.h
+ - bsps/arm/beagle/include/bsp/i2c.h
+ - bsps/arm/beagle/include/bsp/irq.h
+ - bsps/arm/beagle/include/bsp/spi.h
+- destination: ${BSP_LIBDIR}
+ source:
+ - bsps/arm/beagle/start/linkcmds
+links: []
+source:
+- bsps/arm/beagle/clock/clock.c
+- bsps/arm/beagle/console/console-config.c
+- bsps/arm/beagle/gpio/bbb-gpio.c
+- bsps/arm/beagle/i2c/bbb-i2c.c
+- bsps/arm/beagle/irq/irq.c
+- bsps/arm/beagle/pwm/pwm.c
+- bsps/arm/beagle/rtc/rtc.c
+- bsps/arm/beagle/spi/spi.c
+- bsps/arm/beagle/start/bspdebug.c
+- bsps/arm/beagle/start/bspreset.c
+- bsps/arm/beagle/start/bspstart.c
+- bsps/arm/beagle/start/bspstarthooks.c
+- bsps/arm/beagle/start/bspstartmmu.c
+- bsps/arm/shared/cache/cache-cp15.c
+- bsps/arm/shared/cache/cache-v7ar-disable-data.S
+- bsps/arm/shared/cp15/arm-cp15-set-exception-handler.c
+- bsps/arm/shared/cp15/arm-cp15-set-ttb-entries.c
+- bsps/arm/shared/start/bsp-start-memcpy.S
+- bsps/shared/dev/btimer/btimer-stub.c
+- bsps/shared/dev/cpucounter/cpucounterfrequency.c
+- bsps/shared/dev/cpucounter/cpucounterread.c
+- bsps/shared/dev/getentropy/getentropy-cpucounter.c
+- bsps/shared/dev/gpio/gpio-support.c
+- bsps/shared/dev/rtc/rtc-support.c
+- bsps/shared/dev/serial/legacy-console-control.c
+- bsps/shared/dev/serial/legacy-console-select.c
+- bsps/shared/dev/serial/legacy-console.c
+- bsps/shared/irq/irq-default-handler.c
+- bsps/shared/start/bsp-fdt.c
+- bsps/shared/start/bspfatal-default.c
+- bsps/shared/start/bspgetworkarea-default.c
+- bsps/shared/start/sbrk.c
+- bsps/shared/start/stackalloc.c
+type: build
diff --git a/spec/build/bsps/arm/beagle/optam335x.yml b/spec/build/bsps/arm/beagle/optam335x.yml
new file mode 100644
index 0000000000..2453aae088
--- /dev/null
+++ b/spec/build/bsps/arm/beagle/optam335x.yml
@@ -0,0 +1,18 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant:
+- value: true
+ variants:
+ - arm/beaglebone.*
+description: |
+ true if SOC is AM335X
+enabled-by: true
+links: []
+name: IS_AM335X
+type: build
diff --git a/spec/build/bsps/arm/beagle/optconbaud.yml b/spec/build/bsps/arm/beagle/optconbaud.yml
new file mode 100644
index 0000000000..9c3eaff15b
--- /dev/null
+++ b/spec/build/bsps/arm/beagle/optconbaud.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 115200
+default-by-variant: []
+description: |
+ initial baud for console UART
+enabled-by: true
+format: '{}'
+links: []
+name: CONSOLE_BAUD
+type: build
diff --git a/spec/build/bsps/arm/beagle/optconpoll.yml b/spec/build/bsps/arm/beagle/optconpoll.yml
new file mode 100644
index 0000000000..1717792bb8
--- /dev/null
+++ b/spec/build/bsps/arm/beagle/optconpoll.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant: []
+description: |
+ polled console i/o (e.g. to run testsuite)
+enabled-by: true
+links: []
+name: CONSOLE_POLLED
+type: build
diff --git a/spec/build/bsps/arm/beagle/optdebug.yml b/spec/build/bsps/arm/beagle/optdebug.yml
new file mode 100644
index 0000000000..54f6c55f9a
--- /dev/null
+++ b/spec/build/bsps/arm/beagle/optdebug.yml
@@ -0,0 +1,18 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant:
+- value: false
+ variants:
+ - arm/beaglebone.*
+description: |
+ Enable BBB debug
+enabled-by: true
+links: []
+name: BBB_DEBUG
+type: build
diff --git a/spec/build/bsps/arm/beagle/optdm3730.yml b/spec/build/bsps/arm/beagle/optdm3730.yml
new file mode 100644
index 0000000000..3dd60260f3
--- /dev/null
+++ b/spec/build/bsps/arm/beagle/optdm3730.yml
@@ -0,0 +1,18 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant:
+- value: true
+ variants:
+ - arm/beagleboard.*
+description: |
+ true if SOC is DM3730
+enabled-by: true
+links: []
+name: IS_DM3730
+type: build
diff --git a/spec/build/bsps/arm/beagle/optfdtcpyro.yml b/spec/build/bsps/arm/beagle/optfdtcpyro.yml
new file mode 100644
index 0000000000..c26b1ae051
--- /dev/null
+++ b/spec/build/bsps/arm/beagle/optfdtcpyro.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+ copy the FDT blob into the read-only load area via bsp_fdt_copy()
+enabled-by: true
+links: []
+name: BSP_FDT_BLOB_COPY_TO_READ_ONLY_LOAD_AREA
+type: build
diff --git a/spec/build/bsps/arm/beagle/optfdtmxsz.yml b/spec/build/bsps/arm/beagle/optfdtmxsz.yml
new file mode 100644
index 0000000000..14af766230
--- /dev/null
+++ b/spec/build/bsps/arm/beagle/optfdtmxsz.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 262144
+default-by-variant: []
+description: |
+ maximum size of the FDT blob in bytes
+enabled-by: true
+format: '{}'
+links: []
+name: BSP_FDT_BLOB_SIZE_MAX
+type: build
diff --git a/spec/build/bsps/arm/beagle/optfdtro.yml b/spec/build/bsps/arm/beagle/optfdtro.yml
new file mode 100644
index 0000000000..a61bb2924b
--- /dev/null
+++ b/spec/build/bsps/arm/beagle/optfdtro.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+ place the FDT blob into the read-only data area
+enabled-by: true
+links: []
+name: BSP_FDT_BLOB_READ_ONLY
+type: build
diff --git a/spec/build/bsps/arm/beagle/optfdtuboot.yml b/spec/build/bsps/arm/beagle/optfdtuboot.yml
new file mode 100644
index 0000000000..5805e912ff
--- /dev/null
+++ b/spec/build/bsps/arm/beagle/optfdtuboot.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+ copy the U-Boot provided FDT to an internal storage
+enabled-by: true
+links: []
+name: BSP_START_COPY_FDT_FROM_U_BOOT
+type: build
diff --git a/spec/build/bsps/arm/csb336/abi.yml b/spec/build/bsps/arm/csb336/abi.yml
new file mode 100644
index 0000000000..ccf0bc7ea2
--- /dev/null
+++ b/spec/build/bsps/arm/csb336/abi.yml
@@ -0,0 +1,17 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-string: null
+- split: null
+- env-append: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default:
+- -mcpu=arm920
+default-by-variant: []
+description: |
+ ABI flags
+enabled-by: true
+links: []
+name: ABI_FLAGS
+type: build
diff --git a/spec/build/bsps/arm/csb336/bspcsb336.yml b/spec/build/bsps/arm/csb336/bspcsb336.yml
new file mode 100644
index 0000000000..2842b0d5ac
--- /dev/null
+++ b/spec/build/bsps/arm/csb336/bspcsb336.yml
@@ -0,0 +1,59 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: csb336
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: csb336
+includes: []
+install:
+- destination: ${BSP_INCLUDEDIR}
+ source:
+ - bsps/arm/csb336/include/bsp.h
+ - bsps/arm/csb336/include/mc9328mxl.h
+ - bsps/arm/csb336/include/tm27.h
+- destination: ${BSP_INCLUDEDIR}/bsp
+ source:
+ - bsps/arm/csb336/include/bsp/irq.h
+- destination: ${BSP_LIBDIR}
+ source:
+ - bsps/arm/csb336/start/linkcmds
+ - bsps/arm/csb336/start/linkcmds
+links:
+- role: build-dependency
+ uid: abi
+- role: build-dependency
+ uid: objnet
+- role: build-dependency
+ uid: start
+- role: build-dependency
+ uid: ../grp
+- role: build-dependency
+ uid: ../../obj
+- role: build-dependency
+ uid: ../../objirq
+- role: build-dependency
+ uid: ../../opto2
+- role: build-dependency
+ uid: ../../bspopts
+source:
+- bsps/arm/csb336/btimer/btimer.c
+- bsps/arm/csb336/clock/clockdrv.c
+- bsps/arm/csb336/console/uart.c
+- bsps/arm/csb336/irq/irq.c
+- bsps/arm/csb336/start/bspstart.c
+- bsps/arm/csb336/start/memmap.c
+- bsps/arm/shared/cache/cache-cp15.c
+- bsps/arm/shared/cp15/arm920-mmu.c
+- bsps/shared/dev/cpucounter/cpucounterfrequency.c
+- bsps/shared/dev/cpucounter/cpucounterread.c
+- bsps/shared/dev/getentropy/getentropy-cpucounter.c
+- bsps/shared/irq/irq-default-handler.c
+- bsps/shared/start/bspfatal-default.c
+- bsps/shared/start/bspgetworkarea-default.c
+- bsps/shared/start/bspreset-empty.c
+- bsps/shared/start/sbrk.c
+type: build
diff --git a/spec/build/bsps/arm/csb336/objnet.yml b/spec/build/bsps/arm/csb336/objnet.yml
new file mode 100644
index 0000000000..2888ae50e2
--- /dev/null
+++ b/spec/build/bsps/arm/csb336/objnet.yml
@@ -0,0 +1,17 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: objects
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+cxxflags: []
+enabled-by:
+- RTEMS_NETWORKING
+includes:
+- cpukit/libnetworking
+install: []
+links: []
+source:
+- bsps/arm/csb336/net/lan91c11x.c
+- bsps/arm/csb336/net/network.c
+type: build
diff --git a/spec/build/bsps/arm/csb336/start.yml b/spec/build/bsps/arm/csb336/start.yml
new file mode 100644
index 0000000000..7791d5b557
--- /dev/null
+++ b/spec/build/bsps/arm/csb336/start.yml
@@ -0,0 +1,14 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+asflags: []
+build-type: start-file
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+includes: []
+install-path: ${BSP_LIBDIR}
+links: []
+source:
+- bsps/arm/csb336/start/start.S
+target: start.o
+type: build
diff --git a/spec/build/bsps/arm/csb337/abi.yml b/spec/build/bsps/arm/csb337/abi.yml
new file mode 100644
index 0000000000..ccf0bc7ea2
--- /dev/null
+++ b/spec/build/bsps/arm/csb337/abi.yml
@@ -0,0 +1,17 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-string: null
+- split: null
+- env-append: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default:
+- -mcpu=arm920
+default-by-variant: []
+description: |
+ ABI flags
+enabled-by: true
+links: []
+name: ABI_FLAGS
+type: build
diff --git a/spec/build/bsps/arm/csb337/bspcsb337.yml b/spec/build/bsps/arm/csb337/bspcsb337.yml
new file mode 100644
index 0000000000..5665a29ef2
--- /dev/null
+++ b/spec/build/bsps/arm/csb337/bspcsb337.yml
@@ -0,0 +1,19 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: csb337
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: csb337
+includes: []
+install: []
+links:
+- role: build-dependency
+ uid: grp
+- role: build-dependency
+ uid: ../../opto2
+source: []
+type: build
diff --git a/spec/build/bsps/arm/csb337/bspcsb637.yml b/spec/build/bsps/arm/csb337/bspcsb637.yml
new file mode 100644
index 0000000000..dd8a4e1659
--- /dev/null
+++ b/spec/build/bsps/arm/csb337/bspcsb637.yml
@@ -0,0 +1,19 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: csb637
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: csb337
+includes: []
+install: []
+links:
+- role: build-dependency
+ uid: grp
+- role: build-dependency
+ uid: ../../opto2
+source: []
+type: build
diff --git a/spec/build/bsps/arm/csb337/bspkit637v6.yml b/spec/build/bsps/arm/csb337/bspkit637v6.yml
new file mode 100644
index 0000000000..375c264880
--- /dev/null
+++ b/spec/build/bsps/arm/csb337/bspkit637v6.yml
@@ -0,0 +1,19 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: kit637_v6
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: csb337
+includes: []
+install: []
+links:
+- role: build-dependency
+ uid: grp
+- role: build-dependency
+ uid: ../../opto2
+source: []
+type: build
diff --git a/spec/build/bsps/arm/csb337/grp.yml b/spec/build/bsps/arm/csb337/grp.yml
new file mode 100644
index 0000000000..ac5fc9279f
--- /dev/null
+++ b/spec/build/bsps/arm/csb337/grp.yml
@@ -0,0 +1,52 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: group
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+enabled-by: true
+includes: []
+install: []
+ldflags: []
+links:
+- role: build-dependency
+ uid: abi
+- role: build-dependency
+ uid: obj
+- role: build-dependency
+ uid: objlcd
+- role: build-dependency
+ uid: objnet
+- role: build-dependency
+ uid: objumon
+- role: build-dependency
+ uid: objumoncon
+- role: build-dependency
+ uid: optcsb637
+- role: build-dependency
+ uid: optenlcd
+- role: build-dependency
+ uid: optenumon
+- role: build-dependency
+ uid: optenumoncon
+- role: build-dependency
+ uid: optenusart0
+- role: build-dependency
+ uid: optenusart1
+- role: build-dependency
+ uid: optenusart2
+- role: build-dependency
+ uid: optenusart3
+- role: build-dependency
+ uid: start
+- role: build-dependency
+ uid: ../grp
+- role: build-dependency
+ uid: ../../linkcmds
+- role: build-dependency
+ uid: ../../obj
+- role: build-dependency
+ uid: ../../objirq
+- role: build-dependency
+ uid: ../../bspopts
+type: build
+use-after: []
+use-before: []
diff --git a/spec/build/bsps/arm/csb337/obj.yml b/spec/build/bsps/arm/csb337/obj.yml
new file mode 100644
index 0000000000..c541cfc207
--- /dev/null
+++ b/spec/build/bsps/arm/csb337/obj.yml
@@ -0,0 +1,57 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: objects
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+cxxflags: []
+enabled-by: true
+includes: []
+install:
+- destination: ${BSP_INCLUDEDIR}
+ source:
+ - bsps/arm/csb337/include/at91rm9200.h
+ - bsps/arm/csb337/include/at91rm9200_dbgu.h
+ - bsps/arm/csb337/include/at91rm9200_emac.h
+ - bsps/arm/csb337/include/at91rm9200_gpio.h
+ - bsps/arm/csb337/include/at91rm9200_mem.h
+ - bsps/arm/csb337/include/at91rm9200_pmc.h
+ - bsps/arm/csb337/include/at91rm9200_usart.h
+ - bsps/arm/csb337/include/bits.h
+ - bsps/arm/csb337/include/bsp.h
+ - bsps/arm/csb337/include/font8x16.h
+ - bsps/arm/csb337/include/sed1356.h
+ - bsps/arm/csb337/include/sed1356_16bit.h
+ - bsps/arm/csb337/include/tm27.h
+- destination: ${BSP_INCLUDEDIR}/bsp
+ source:
+ - bsps/arm/csb337/include/bsp/irq.h
+- destination: ${BSP_LIBDIR}
+ source:
+ - bsps/arm/csb337/start/linkcmds.csb337
+ - bsps/arm/csb337/start/linkcmds.csb637
+links: []
+source:
+- bsps/arm/csb337/btimer/btimer.c
+- bsps/arm/csb337/clock/clock.c
+- bsps/arm/csb337/console/dbgu.c
+- bsps/arm/csb337/console/uarts.c
+- bsps/arm/csb337/console/usart.c
+- bsps/arm/csb337/irq/irq.c
+- bsps/arm/csb337/start/bspreset.c
+- bsps/arm/csb337/start/bspstart.c
+- bsps/arm/csb337/start/memmap.c
+- bsps/arm/csb337/start/pmc.c
+- bsps/arm/shared/cache/cache-cp15.c
+- bsps/arm/shared/cp15/arm920-mmu.c
+- bsps/shared/dev/cpucounter/cpucounterfrequency.c
+- bsps/shared/dev/cpucounter/cpucounterread.c
+- bsps/shared/dev/getentropy/getentropy-cpucounter.c
+- bsps/shared/dev/serial/legacy-console-control.c
+- bsps/shared/dev/serial/legacy-console-select.c
+- bsps/shared/dev/serial/legacy-console.c
+- bsps/shared/irq/irq-default-handler.c
+- bsps/shared/start/bspfatal-default.c
+- bsps/shared/start/bspgetworkarea-default.c
+- bsps/shared/start/sbrk.c
+type: build
diff --git a/spec/build/bsps/arm/csb337/objlcd.yml b/spec/build/bsps/arm/csb337/objlcd.yml
new file mode 100644
index 0000000000..6db16816cd
--- /dev/null
+++ b/spec/build/bsps/arm/csb337/objlcd.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: objects
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+cxxflags: []
+enabled-by:
+- ENABLE_LCD
+includes: []
+install: []
+links: []
+source:
+- bsps/arm/csb337/console/fbcons.c
+- bsps/arm/csb337/console/sed1356.c
+type: build
diff --git a/spec/build/bsps/arm/csb337/objnet.yml b/spec/build/bsps/arm/csb337/objnet.yml
new file mode 100644
index 0000000000..60849d530d
--- /dev/null
+++ b/spec/build/bsps/arm/csb337/objnet.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: objects
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+cxxflags: []
+enabled-by:
+- RTEMS_NETWORKING
+includes:
+- cpukit/libnetworking
+install: []
+links: []
+source:
+- bsps/arm/csb337/net/network.c
+type: build
diff --git a/spec/build/bsps/arm/csb337/objumon.yml b/spec/build/bsps/arm/csb337/objumon.yml
new file mode 100644
index 0000000000..e7d8c38a96
--- /dev/null
+++ b/spec/build/bsps/arm/csb337/objumon.yml
@@ -0,0 +1,26 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: objects
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+cxxflags: []
+enabled-by:
+- ENABLE_UMON
+includes: []
+install:
+- destination: ${BSP_INCLUDEDIR}/rtems
+ source:
+ - bsps/include/rtems/umon.h
+- destination: ${BSP_INCLUDEDIR}/umon
+ source:
+ - bsps/include/umon/cli.h
+ - bsps/include/umon/monlib.h
+ - bsps/include/umon/tfs.h
+links: []
+source:
+- bsps/arm/csb337/start/umonsupp.c
+- bsps/arm/csb337/umon/monlib.c
+- bsps/arm/csb337/umon/tfsDriver.c
+- bsps/arm/csb337/umon/umonrtemsglue.c
+type: build
diff --git a/spec/build/bsps/arm/csb337/objumoncon.yml b/spec/build/bsps/arm/csb337/objumoncon.yml
new file mode 100644
index 0000000000..93e42a8058
--- /dev/null
+++ b/spec/build/bsps/arm/csb337/objumoncon.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: objects
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+cxxflags: []
+enabled-by:
+- ENABLE_UMON_CONSOLE
+includes: []
+install: []
+links: []
+source:
+- bsps/arm/csb337/umon/umoncons.c
+type: build
diff --git a/spec/build/bsps/arm/csb337/optcsb637.yml b/spec/build/bsps/arm/csb337/optcsb637.yml
new file mode 100644
index 0000000000..5db48e1f0a
--- /dev/null
+++ b/spec/build/bsps/arm/csb337/optcsb637.yml
@@ -0,0 +1,21 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant:
+- value: true
+ variants:
+ - arm/kit637_v6
+- value: true
+ variants:
+ - arm/csb637
+description: |
+ If defined, this indicates that the BSP is being built for the csb637 variant.
+enabled-by: true
+links: []
+name: csb637
+type: build
diff --git a/spec/build/bsps/arm/csb337/optenlcd.yml b/spec/build/bsps/arm/csb337/optenlcd.yml
new file mode 100644
index 0000000000..40617f7c2f
--- /dev/null
+++ b/spec/build/bsps/arm/csb337/optenlcd.yml
@@ -0,0 +1,19 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+- env-enable: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant:
+- value: false
+ variants:
+ - arm/kit637_v6
+description: |
+ If defined, enable use of the SED1356 controller and LCD.
+enabled-by: true
+links: []
+name: ENABLE_LCD
+type: build
diff --git a/spec/build/bsps/arm/csb337/optenumon.yml b/spec/build/bsps/arm/csb337/optenumon.yml
new file mode 100644
index 0000000000..8286e0fa4b
--- /dev/null
+++ b/spec/build/bsps/arm/csb337/optenumon.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+- env-enable: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+ If defined, enable use of the uMon console.
+enabled-by: true
+links: []
+name: ENABLE_UMON
+type: build
diff --git a/spec/build/bsps/arm/csb337/optenumoncon.yml b/spec/build/bsps/arm/csb337/optenumoncon.yml
new file mode 100644
index 0000000000..e2ca577184
--- /dev/null
+++ b/spec/build/bsps/arm/csb337/optenumoncon.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+- env-enable: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+ If defined, enable use of the MicroMonitor console device.
+enabled-by: true
+links: []
+name: ENABLE_UMON_CONSOLE
+type: build
diff --git a/spec/build/bsps/arm/csb337/optenusart0.yml b/spec/build/bsps/arm/csb337/optenusart0.yml
new file mode 100644
index 0000000000..cd968f8dbc
--- /dev/null
+++ b/spec/build/bsps/arm/csb337/optenusart0.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+ If defined, enable use of the USART 0.
+enabled-by: true
+links: []
+name: ENABLE_USART0
+type: build
diff --git a/spec/build/bsps/arm/csb337/optenusart1.yml b/spec/build/bsps/arm/csb337/optenusart1.yml
new file mode 100644
index 0000000000..963d2a9742
--- /dev/null
+++ b/spec/build/bsps/arm/csb337/optenusart1.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+ If defined, enable use of the USART 1.
+enabled-by: true
+links: []
+name: ENABLE_USART1
+type: build
diff --git a/spec/build/bsps/arm/csb337/optenusart2.yml b/spec/build/bsps/arm/csb337/optenusart2.yml
new file mode 100644
index 0000000000..d4ae1fe756
--- /dev/null
+++ b/spec/build/bsps/arm/csb337/optenusart2.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+ If defined, enable use of the USART 2.
+enabled-by: true
+links: []
+name: ENABLE_USART2
+type: build
diff --git a/spec/build/bsps/arm/csb337/optenusart3.yml b/spec/build/bsps/arm/csb337/optenusart3.yml
new file mode 100644
index 0000000000..200824f3e3
--- /dev/null
+++ b/spec/build/bsps/arm/csb337/optenusart3.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+ If defined, enable use of the USART 3.
+enabled-by: true
+links: []
+name: ENABLE_USART3
+type: build
diff --git a/spec/build/bsps/arm/csb337/start.yml b/spec/build/bsps/arm/csb337/start.yml
new file mode 100644
index 0000000000..7dd6661d98
--- /dev/null
+++ b/spec/build/bsps/arm/csb337/start.yml
@@ -0,0 +1,14 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+asflags: []
+build-type: start-file
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+includes: []
+install-path: ${BSP_LIBDIR}
+links: []
+source:
+- bsps/arm/csb337/start/start.S
+target: start.o
+type: build
diff --git a/spec/build/bsps/arm/edb7312/abi.yml b/spec/build/bsps/arm/edb7312/abi.yml
new file mode 100644
index 0000000000..ab6ef203fa
--- /dev/null
+++ b/spec/build/bsps/arm/edb7312/abi.yml
@@ -0,0 +1,17 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-string: null
+- split: null
+- env-append: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default:
+- -mcpu=arm7tdmi
+default-by-variant: []
+description: |
+ ABI flags
+enabled-by: true
+links: []
+name: ABI_FLAGS
+type: build
diff --git a/spec/build/bsps/arm/edb7312/bspedb7312.yml b/spec/build/bsps/arm/edb7312/bspedb7312.yml
new file mode 100644
index 0000000000..aa73f7a51b
--- /dev/null
+++ b/spec/build/bsps/arm/edb7312/bspedb7312.yml
@@ -0,0 +1,62 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: edb7312
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: edb7312
+includes: []
+install:
+- destination: ${BSP_INCLUDEDIR}
+ source:
+ - bsps/arm/edb7312/include/bsp.h
+ - bsps/arm/edb7312/include/ep7312.h
+ - bsps/arm/edb7312/include/tm27.h
+- destination: ${BSP_INCLUDEDIR}/bsp
+ source:
+ - bsps/arm/edb7312/include/bsp/irq.h
+- destination: ${BSP_LIBDIR}
+ source:
+ - bsps/arm/edb7312/start/linkcmds
+links:
+- role: build-dependency
+ uid: abi
+- role: build-dependency
+ uid: objnet
+- role: build-dependency
+ uid: optskyeye
+- role: build-dependency
+ uid: start
+- role: build-dependency
+ uid: ../grp
+- role: build-dependency
+ uid: ../../obj
+- role: build-dependency
+ uid: ../../objirq
+- role: build-dependency
+ uid: ../../opto2
+- role: build-dependency
+ uid: ../../bspopts
+source:
+- bsps/arm/edb7312/btimer/btimer.c
+- bsps/arm/edb7312/clock/clockdrv.c
+- bsps/arm/edb7312/console/uart.c
+- bsps/arm/edb7312/irq/bsp_irq_asm.S
+- bsps/arm/edb7312/irq/irq.c
+- bsps/arm/edb7312/start/bspreset.c
+- bsps/arm/edb7312/start/bspstart.c
+- bsps/shared/cache/nocache.c
+- bsps/shared/dev/cpucounter/cpucounterfrequency.c
+- bsps/shared/dev/cpucounter/cpucounterread.c
+- bsps/shared/dev/getentropy/getentropy-cpucounter.c
+- bsps/shared/dev/serial/legacy-console-control.c
+- bsps/shared/dev/serial/legacy-console-select.c
+- bsps/shared/dev/serial/legacy-console.c
+- bsps/shared/irq/irq-default-handler.c
+- bsps/shared/start/bspfatal-default.c
+- bsps/shared/start/bspgetworkarea-default.c
+- bsps/shared/start/sbrk.c
+type: build
diff --git a/spec/build/bsps/arm/edb7312/objnet.yml b/spec/build/bsps/arm/edb7312/objnet.yml
new file mode 100644
index 0000000000..7c7d6080cf
--- /dev/null
+++ b/spec/build/bsps/arm/edb7312/objnet.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: objects
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+cxxflags: []
+enabled-by:
+- RTEMS_NETWORKING
+includes:
+- cpukit/libnetworking
+install: []
+links: []
+source:
+- bsps/arm/edb7312/net/network.c
+type: build
diff --git a/spec/build/bsps/arm/edb7312/optskyeye.yml b/spec/build/bsps/arm/edb7312/optskyeye.yml
new file mode 100644
index 0000000000..be55a98c3a
--- /dev/null
+++ b/spec/build/bsps/arm/edb7312/optskyeye.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant: []
+description: |
+ If defined, enable options which optimize executingon the Skyeye simulator. Speed up the clock ticks while the idle task is running so time spent in the idle task is minimized. This significantly reduces the wall time required to execute the RTEMS test suites.
+enabled-by: true
+links: []
+name: ON_SKYEYE
+type: build
diff --git a/spec/build/bsps/arm/edb7312/start.yml b/spec/build/bsps/arm/edb7312/start.yml
new file mode 100644
index 0000000000..b1270224f1
--- /dev/null
+++ b/spec/build/bsps/arm/edb7312/start.yml
@@ -0,0 +1,14 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+asflags: []
+build-type: start-file
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+includes: []
+install-path: ${BSP_LIBDIR}
+links: []
+source:
+- bsps/arm/edb7312/start/start.S
+target: start.o
+type: build
diff --git a/spec/build/bsps/arm/grp.yml b/spec/build/bsps/arm/grp.yml
new file mode 100644
index 0000000000..2bf0b82423
--- /dev/null
+++ b/spec/build/bsps/arm/grp.yml
@@ -0,0 +1,62 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: group
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+enabled-by: true
+includes: []
+install:
+- destination: ${BSP_INCLUDEDIR}
+ source:
+ - bsps/arm/include/cmsis_gcc.h
+ - bsps/arm/include/core_cm7.h
+ - bsps/arm/include/core_cmFunc.h
+ - bsps/arm/include/core_cmInstr.h
+ - bsps/arm/include/core_cmSimd.h
+ - bsps/arm/include/uart.h
+- destination: ${BSP_INCLUDEDIR}/bsp
+ source:
+ - bsps/arm/include/bsp/arm-a8core-start.h
+ - bsps/arm/include/bsp/arm-a9mpcore-clock.h
+ - bsps/arm/include/bsp/arm-a9mpcore-irq.h
+ - bsps/arm/include/bsp/arm-a9mpcore-regs.h
+ - bsps/arm/include/bsp/arm-a9mpcore-start.h
+ - bsps/arm/include/bsp/arm-cp15-start.h
+ - bsps/arm/include/bsp/arm-errata.h
+ - bsps/arm/include/bsp/arm-gic-irq.h
+ - bsps/arm/include/bsp/arm-gic-regs.h
+ - bsps/arm/include/bsp/arm-gic-tm27.h
+ - bsps/arm/include/bsp/arm-gic.h
+ - bsps/arm/include/bsp/arm-pl011-regs.h
+ - bsps/arm/include/bsp/arm-pl011.h
+ - bsps/arm/include/bsp/arm-pl050-regs.h
+ - bsps/arm/include/bsp/arm-pl050.h
+ - bsps/arm/include/bsp/arm-pl111-fb.h
+ - bsps/arm/include/bsp/arm-pl111-regs.h
+ - bsps/arm/include/bsp/arm-release-id.h
+ - bsps/arm/include/bsp/armv7m-irq.h
+ - bsps/arm/include/bsp/clock-armv7m.h
+ - bsps/arm/include/bsp/linker-symbols.h
+ - bsps/arm/include/bsp/lpc-dma.h
+ - bsps/arm/include/bsp/lpc-emc.h
+ - bsps/arm/include/bsp/lpc-i2s.h
+ - bsps/arm/include/bsp/lpc-lcd.h
+ - bsps/arm/include/bsp/lpc-timer.h
+ - bsps/arm/include/bsp/start.h
+ - bsps/arm/include/bsp/zynq-uart-regs.h
+ - bsps/arm/include/bsp/zynq-uart.h
+- destination: ${BSP_INCLUDEDIR}/libcpu
+ source:
+ - bsps/arm/include/libcpu/am335x.h
+ - bsps/arm/include/libcpu/mmu.h
+ - bsps/arm/include/libcpu/omap3.h
+ - bsps/arm/include/libcpu/omap_timer.h
+- destination: ${BSP_LIBDIR}
+ source:
+ - bsps/arm/shared/start/linkcmds.armv4
+ - bsps/arm/shared/start/linkcmds.armv7m
+ - bsps/arm/shared/start/linkcmds.base
+ldflags: []
+links: []
+type: build
+use-after: []
+use-before: []
diff --git a/spec/build/bsps/arm/gumstix/abi.yml b/spec/build/bsps/arm/gumstix/abi.yml
new file mode 100644
index 0000000000..41a3903894
--- /dev/null
+++ b/spec/build/bsps/arm/gumstix/abi.yml
@@ -0,0 +1,17 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-string: null
+- split: null
+- env-append: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default:
+- -mcpu=xscale
+default-by-variant: []
+description: |
+ ABI flags
+enabled-by: true
+links: []
+name: ABI_FLAGS
+type: build
diff --git a/spec/build/bsps/arm/gumstix/bspgumstix.yml b/spec/build/bsps/arm/gumstix/bspgumstix.yml
new file mode 100644
index 0000000000..49b809561f
--- /dev/null
+++ b/spec/build/bsps/arm/gumstix/bspgumstix.yml
@@ -0,0 +1,66 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: gumstix
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: gumstix
+includes: []
+install:
+- destination: ${BSP_INCLUDEDIR}
+ source:
+ - bsps/arm/gumstix/include/bsp.h
+ - bsps/arm/gumstix/include/ffuart.h
+ - bsps/arm/gumstix/include/pxa255.h
+ - bsps/arm/gumstix/include/tm27.h
+- destination: ${BSP_INCLUDEDIR}/bsp
+ source:
+ - bsps/arm/gumstix/include/bsp/irq.h
+- destination: ${BSP_LIBDIR}
+ source:
+ - bsps/arm/gumstix/start/linkcmds
+links:
+- role: build-dependency
+ uid: ../grp
+- role: build-dependency
+ uid: abi
+- role: build-dependency
+ uid: objnet
+- role: build-dependency
+ uid: optskyeye
+- role: build-dependency
+ uid: start
+- role: build-dependency
+ uid: ../../obj
+- role: build-dependency
+ uid: ../../objirq
+- role: build-dependency
+ uid: ../../opto2
+- role: build-dependency
+ uid: ../../bspopts
+source:
+- bsps/arm/gumstix/btimer/btimer.c
+- bsps/arm/gumstix/clock/clock.c
+- bsps/arm/gumstix/console/ffuart.c
+- bsps/arm/gumstix/console/uarts.c
+- bsps/arm/gumstix/fb/fb.c
+- bsps/arm/gumstix/irq/irq.c
+- bsps/arm/gumstix/start/bspreset.c
+- bsps/arm/gumstix/start/bspstart.c
+- bsps/arm/gumstix/start/memmap.c
+- bsps/arm/shared/cp15/arm920-mmu.c
+- bsps/shared/cache/nocache.c
+- bsps/shared/dev/cpucounter/cpucounterfrequency.c
+- bsps/shared/dev/cpucounter/cpucounterread.c
+- bsps/shared/dev/getentropy/getentropy-cpucounter.c
+- bsps/shared/dev/serial/legacy-console-control.c
+- bsps/shared/dev/serial/legacy-console-select.c
+- bsps/shared/dev/serial/legacy-console.c
+- bsps/shared/irq/irq-default-handler.c
+- bsps/shared/start/bspfatal-default.c
+- bsps/shared/start/bspgetworkarea-default.c
+- bsps/shared/start/sbrk.c
+type: build
diff --git a/spec/build/bsps/arm/gumstix/objnet.yml b/spec/build/bsps/arm/gumstix/objnet.yml
new file mode 100644
index 0000000000..01ca5bea2d
--- /dev/null
+++ b/spec/build/bsps/arm/gumstix/objnet.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: objects
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+cxxflags: []
+enabled-by:
+- RTEMS_NETWORKING
+includes:
+- cpukit/libnetworking
+install: []
+links: []
+source:
+- bsps/arm/gumstix/net/rtl8019.c
+type: build
diff --git a/spec/build/bsps/arm/gumstix/optskyeye.yml b/spec/build/bsps/arm/gumstix/optskyeye.yml
new file mode 100644
index 0000000000..be55a98c3a
--- /dev/null
+++ b/spec/build/bsps/arm/gumstix/optskyeye.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant: []
+description: |
+ If defined, enable options which optimize executingon the Skyeye simulator. Speed up the clock ticks while the idle task is running so time spent in the idle task is minimized. This significantly reduces the wall time required to execute the RTEMS test suites.
+enabled-by: true
+links: []
+name: ON_SKYEYE
+type: build
diff --git a/spec/build/bsps/arm/gumstix/start.yml b/spec/build/bsps/arm/gumstix/start.yml
new file mode 100644
index 0000000000..e663028666
--- /dev/null
+++ b/spec/build/bsps/arm/gumstix/start.yml
@@ -0,0 +1,14 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+asflags: []
+build-type: start-file
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+includes: []
+install-path: ${BSP_LIBDIR}
+links: []
+source:
+- bsps/arm/gumstix/start/start.S
+target: start.o
+type: build
diff --git a/spec/build/bsps/arm/imx/abi.yml b/spec/build/bsps/arm/imx/abi.yml
new file mode 100644
index 0000000000..169a5e6584
--- /dev/null
+++ b/spec/build/bsps/arm/imx/abi.yml
@@ -0,0 +1,21 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-string: null
+- split: null
+- env-append: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default:
+- -march=armv7-a
+- -mthumb
+- -mfpu=neon
+- -mfloat-abi=hard
+- -mtune=cortex-a7
+default-by-variant: []
+description: |
+ ABI flags
+enabled-by: true
+links: []
+name: ABI_FLAGS
+type: build
diff --git a/spec/build/bsps/arm/imx/bspimx.yml b/spec/build/bsps/arm/imx/bspimx.yml
new file mode 100644
index 0000000000..0d32669a4a
--- /dev/null
+++ b/spec/build/bsps/arm/imx/bspimx.yml
@@ -0,0 +1,104 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: imx7
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: imx
+includes: []
+install:
+- destination: ${BSP_INCLUDEDIR}
+ source:
+ - bsps/arm/imx/include/bsp.h
+ - bsps/arm/imx/include/tm27.h
+- destination: ${BSP_INCLUDEDIR}/arm/freescale/imx
+ source:
+ - bsps/arm/imx/include/arm/freescale/imx/imx_ccmvar.h
+ - bsps/arm/imx/include/arm/freescale/imx/imx_ecspireg.h
+ - bsps/arm/imx/include/arm/freescale/imx/imx_gpcreg.h
+ - bsps/arm/imx/include/arm/freescale/imx/imx_i2creg.h
+ - bsps/arm/imx/include/arm/freescale/imx/imx_iomuxreg.h
+ - bsps/arm/imx/include/arm/freescale/imx/imx_iomuxvar.h
+ - bsps/arm/imx/include/arm/freescale/imx/imx_srcreg.h
+ - bsps/arm/imx/include/arm/freescale/imx/imx_uartreg.h
+ - bsps/arm/imx/include/arm/freescale/imx/imx_wdogreg.h
+- destination: ${BSP_INCLUDEDIR}/bsp
+ source:
+ - bsps/arm/imx/include/bsp/imx-gpio.h
+ - bsps/arm/imx/include/bsp/irq.h
+- destination: ${BSP_LIBDIR}
+ source:
+ - bsps/arm/imx/start/linkcmds
+ - bsps/arm/imx/start/linkcmds
+links:
+- role: build-dependency
+ uid: ../grp
+- role: build-dependency
+ uid: abi
+- role: build-dependency
+ uid: objsmp
+- role: build-dependency
+ uid: optcachedata
+- role: build-dependency
+ uid: optcacheinst
+- role: build-dependency
+ uid: optccmahb
+- role: build-dependency
+ uid: optcmmecspi
+- role: build-dependency
+ uid: optcmmipg
+- role: build-dependency
+ uid: optcmmsdhci
+- role: build-dependency
+ uid: optcmmuart
+- role: build-dependency
+ uid: optconirq
+- role: build-dependency
+ uid: optfdtcpyro
+- role: build-dependency
+ uid: optfdtmxsz
+- role: build-dependency
+ uid: optfdtro
+- role: build-dependency
+ uid: optfdtuboot
+- role: build-dependency
+ uid: optresetvec
+- role: build-dependency
+ uid: ../start
+- role: build-dependency
+ uid: ../../obj
+- role: build-dependency
+ uid: ../../objirq
+- role: build-dependency
+ uid: ../../opto2
+- role: build-dependency
+ uid: ../../bspopts
+source:
+- bsps/arm/imx/console/console-config.c
+- bsps/arm/imx/gpio/imx-gpio.c
+- bsps/arm/imx/i2c/imx-i2c.c
+- bsps/arm/imx/spi/imx-ecspi.c
+- bsps/arm/imx/start/bspreset.c
+- bsps/arm/imx/start/bspstart.c
+- bsps/arm/imx/start/bspstarthooks.c
+- bsps/arm/imx/start/ccm.c
+- bsps/arm/imx/start/imx_iomux.c
+- bsps/arm/shared/cache/cache-cp15.c
+- bsps/arm/shared/cache/cache-v7ar-disable-data.S
+- bsps/arm/shared/clock/clock-generic-timer.c
+- bsps/arm/shared/cp15/arm-cp15-set-exception-handler.c
+- bsps/arm/shared/cp15/arm-cp15-set-ttb-entries.c
+- bsps/arm/shared/irq/irq-gic.c
+- bsps/arm/shared/start/bsp-start-memcpy.S
+- bsps/shared/dev/btimer/btimer-stub.c
+- bsps/shared/dev/getentropy/getentropy-cpucounter.c
+- bsps/shared/dev/serial/console-termios.c
+- bsps/shared/irq/irq-default-handler.c
+- bsps/shared/start/bsp-fdt.c
+- bsps/shared/start/bspfatal-default.c
+- bsps/shared/start/sbrk.c
+- bsps/shared/start/stackalloc.c
+type: build
diff --git a/spec/build/bsps/arm/imx/objsmp.yml b/spec/build/bsps/arm/imx/objsmp.yml
new file mode 100644
index 0000000000..80dd811ddc
--- /dev/null
+++ b/spec/build/bsps/arm/imx/objsmp.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: objects
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+cxxflags: []
+enabled-by:
+- RTEMS_SMP
+includes: []
+install: []
+links: []
+source:
+- bsps/arm/imx/start/bspsmp.c
+- bsps/arm/shared/start/arm-a9mpcore-smp.c
+type: build
diff --git a/spec/build/bsps/arm/imx/optcachedata.yml b/spec/build/bsps/arm/imx/optcachedata.yml
new file mode 100644
index 0000000000..1664b0fc31
--- /dev/null
+++ b/spec/build/bsps/arm/imx/optcachedata.yml
@@ -0,0 +1,18 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant:
+- value: false
+ variants:
+ - arm/.*qemu
+description: |
+ enable data cache
+enabled-by: true
+links: []
+name: BSP_DATA_CACHE_ENABLED
+type: build
diff --git a/spec/build/bsps/arm/imx/optcacheinst.yml b/spec/build/bsps/arm/imx/optcacheinst.yml
new file mode 100644
index 0000000000..b191133af9
--- /dev/null
+++ b/spec/build/bsps/arm/imx/optcacheinst.yml
@@ -0,0 +1,18 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant:
+- value: false
+ variants:
+ - arm/.*qemu
+description: |
+ enable instruction cache
+enabled-by: true
+links: []
+name: BSP_INSTRUCTION_CACHE_ENABLED
+type: build
diff --git a/spec/build/bsps/arm/imx/optccmahb.yml b/spec/build/bsps/arm/imx/optccmahb.yml
new file mode 100644
index 0000000000..a515a44204
--- /dev/null
+++ b/spec/build/bsps/arm/imx/optccmahb.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 135000000
+default-by-variant: []
+description: |
+ AHB clock frequency in Hz
+enabled-by: true
+format: '{}'
+links: []
+name: IMX_CCM_AHB_HZ
+type: build
diff --git a/spec/build/bsps/arm/imx/optcmmecspi.yml b/spec/build/bsps/arm/imx/optcmmecspi.yml
new file mode 100644
index 0000000000..1f32305aef
--- /dev/null
+++ b/spec/build/bsps/arm/imx/optcmmecspi.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 67500000
+default-by-variant: []
+description: |
+ ECSPI clock frequency in Hz
+enabled-by: true
+format: '{}'
+links: []
+name: IMX_CCM_ECSPI_HZ
+type: build
diff --git a/spec/build/bsps/arm/imx/optcmmipg.yml b/spec/build/bsps/arm/imx/optcmmipg.yml
new file mode 100644
index 0000000000..8c62921ef6
--- /dev/null
+++ b/spec/build/bsps/arm/imx/optcmmipg.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 67500000
+default-by-variant: []
+description: |
+ IPG clock frequency in Hz
+enabled-by: true
+format: '{}'
+links: []
+name: IMX_CCM_IPG_HZ
+type: build
diff --git a/spec/build/bsps/arm/imx/optcmmsdhci.yml b/spec/build/bsps/arm/imx/optcmmsdhci.yml
new file mode 100644
index 0000000000..fa06f8111a
--- /dev/null
+++ b/spec/build/bsps/arm/imx/optcmmsdhci.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 196363000
+default-by-variant: []
+description: |
+ SDHCI clock frequency in Hz
+enabled-by: true
+format: '{}'
+links: []
+name: IMX_CCM_SDHCI_HZ
+type: build
diff --git a/spec/build/bsps/arm/imx/optcmmuart.yml b/spec/build/bsps/arm/imx/optcmmuart.yml
new file mode 100644
index 0000000000..ab69c87323
--- /dev/null
+++ b/spec/build/bsps/arm/imx/optcmmuart.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 24000000
+default-by-variant: []
+description: |
+ UART clock frequency in Hz
+enabled-by: true
+format: '{}'
+links: []
+name: IMX_CCM_UART_HZ
+type: build
diff --git a/spec/build/bsps/arm/imx/optconirq.yml b/spec/build/bsps/arm/imx/optconirq.yml
new file mode 100644
index 0000000000..d94a5d20d9
--- /dev/null
+++ b/spec/build/bsps/arm/imx/optconirq.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 1
+default-by-variant: []
+description: |
+ use interrupt driven mode for console devices (used by default)
+enabled-by: true
+format: '{}'
+links: []
+name: CONSOLE_USE_INTERRUPTS
+type: build
diff --git a/spec/build/bsps/arm/imx/optfdtcpyro.yml b/spec/build/bsps/arm/imx/optfdtcpyro.yml
new file mode 100644
index 0000000000..c26b1ae051
--- /dev/null
+++ b/spec/build/bsps/arm/imx/optfdtcpyro.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+ copy the FDT blob into the read-only load area via bsp_fdt_copy()
+enabled-by: true
+links: []
+name: BSP_FDT_BLOB_COPY_TO_READ_ONLY_LOAD_AREA
+type: build
diff --git a/spec/build/bsps/arm/imx/optfdtmxsz.yml b/spec/build/bsps/arm/imx/optfdtmxsz.yml
new file mode 100644
index 0000000000..14af766230
--- /dev/null
+++ b/spec/build/bsps/arm/imx/optfdtmxsz.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 262144
+default-by-variant: []
+description: |
+ maximum size of the FDT blob in bytes
+enabled-by: true
+format: '{}'
+links: []
+name: BSP_FDT_BLOB_SIZE_MAX
+type: build
diff --git a/spec/build/bsps/arm/imx/optfdtro.yml b/spec/build/bsps/arm/imx/optfdtro.yml
new file mode 100644
index 0000000000..a61bb2924b
--- /dev/null
+++ b/spec/build/bsps/arm/imx/optfdtro.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+ place the FDT blob into the read-only data area
+enabled-by: true
+links: []
+name: BSP_FDT_BLOB_READ_ONLY
+type: build
diff --git a/spec/build/bsps/arm/imx/optfdtuboot.yml b/spec/build/bsps/arm/imx/optfdtuboot.yml
new file mode 100644
index 0000000000..5805e912ff
--- /dev/null
+++ b/spec/build/bsps/arm/imx/optfdtuboot.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+ copy the U-Boot provided FDT to an internal storage
+enabled-by: true
+links: []
+name: BSP_START_COPY_FDT_FROM_U_BOOT
+type: build
diff --git a/spec/build/bsps/arm/imx/optresetvec.yml b/spec/build/bsps/arm/imx/optresetvec.yml
new file mode 100644
index 0000000000..efd1ea2b2a
--- /dev/null
+++ b/spec/build/bsps/arm/imx/optresetvec.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant: []
+description: |
+ reset vector address for BSP start
+enabled-by: true
+links: []
+name: BSP_START_RESET_VECTOR
+type: build
diff --git a/spec/build/bsps/arm/lm3s69xx/abi.yml b/spec/build/bsps/arm/lm3s69xx/abi.yml
new file mode 100644
index 0000000000..77d5db8cf7
--- /dev/null
+++ b/spec/build/bsps/arm/lm3s69xx/abi.yml
@@ -0,0 +1,18 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-string: null
+- split: null
+- env-append: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default:
+- -mthumb
+- -mcpu=cortex-m3
+default-by-variant: []
+description: |
+ ABI flags
+enabled-by: true
+links: []
+name: ABI_FLAGS
+type: build
diff --git a/spec/build/bsps/arm/lm3s69xx/bsplm3s3749.yml b/spec/build/bsps/arm/lm3s69xx/bsplm3s3749.yml
new file mode 100644
index 0000000000..f9006ac2cd
--- /dev/null
+++ b/spec/build/bsps/arm/lm3s69xx/bsplm3s3749.yml
@@ -0,0 +1,21 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: lm3s3749
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: lm3s69xx
+includes: []
+install: []
+links:
+- role: build-dependency
+ uid: grp
+- role: build-dependency
+ uid: tstlm3s3749
+- role: build-dependency
+ uid: ../../opto2
+source: []
+type: build
diff --git a/spec/build/bsps/arm/lm3s69xx/bsplm3s6965.yml b/spec/build/bsps/arm/lm3s69xx/bsplm3s6965.yml
new file mode 100644
index 0000000000..aa7627d33f
--- /dev/null
+++ b/spec/build/bsps/arm/lm3s69xx/bsplm3s6965.yml
@@ -0,0 +1,21 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: lm3s6965
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: lm3s69xx
+includes: []
+install: []
+links:
+- role: build-dependency
+ uid: grp
+- role: build-dependency
+ uid: tstlm3s6965
+- role: build-dependency
+ uid: ../../opto2
+source: []
+type: build
diff --git a/spec/build/bsps/arm/lm3s69xx/bsplm4f120.yml b/spec/build/bsps/arm/lm3s69xx/bsplm4f120.yml
new file mode 100644
index 0000000000..cbfe6707d5
--- /dev/null
+++ b/spec/build/bsps/arm/lm3s69xx/bsplm4f120.yml
@@ -0,0 +1,21 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: lm4f120
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: lm3s69xx
+includes: []
+install: []
+links:
+- role: build-dependency
+ uid: grp
+- role: build-dependency
+ uid: tstlm4f120
+- role: build-dependency
+ uid: ../../opto2
+source: []
+type: build
diff --git a/spec/build/bsps/arm/lm3s69xx/bspqemu.yml b/spec/build/bsps/arm/lm3s69xx/bspqemu.yml
new file mode 100644
index 0000000000..ca15af5b37
--- /dev/null
+++ b/spec/build/bsps/arm/lm3s69xx/bspqemu.yml
@@ -0,0 +1,19 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: lm3s6965_qemu
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: lm3s69xx
+includes: []
+install: []
+links:
+- role: build-dependency
+ uid: grp
+- role: build-dependency
+ uid: ../../opto2
+source: []
+type: build
diff --git a/spec/build/bsps/arm/lm3s69xx/grp.yml b/spec/build/bsps/arm/lm3s69xx/grp.yml
new file mode 100644
index 0000000000..2ab26fe919
--- /dev/null
+++ b/spec/build/bsps/arm/lm3s69xx/grp.yml
@@ -0,0 +1,56 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: group
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+enabled-by: true
+includes: []
+install: []
+ldflags: []
+links:
+- role: build-dependency
+ uid: ../grp
+- role: build-dependency
+ uid: abi
+- role: build-dependency
+ uid: obj
+- role: build-dependency
+ uid: optenuart0
+- role: build-dependency
+ uid: optenuart1
+- role: build-dependency
+ uid: optenuart2
+- role: build-dependency
+ uid: optgpioahb
+- role: build-dependency
+ uid: optgpionum
+- role: build-dependency
+ uid: optlm3s3749
+- role: build-dependency
+ uid: optlm3s6965
+- role: build-dependency
+ uid: optlm4f120
+- role: build-dependency
+ uid: optssiblks
+- role: build-dependency
+ uid: optssiclk
+- role: build-dependency
+ uid: optsysclk
+- role: build-dependency
+ uid: optuartbaud
+- role: build-dependency
+ uid: optudma
+- role: build-dependency
+ uid: optxtalcfg
+- role: build-dependency
+ uid: ../start
+- role: build-dependency
+ uid: ../../linkcmds
+- role: build-dependency
+ uid: ../../obj
+- role: build-dependency
+ uid: ../../objirq
+- role: build-dependency
+ uid: ../../bspopts
+type: build
+use-after: []
+use-before: []
diff --git a/spec/build/bsps/arm/lm3s69xx/obj.yml b/spec/build/bsps/arm/lm3s69xx/obj.yml
new file mode 100644
index 0000000000..5e01ce7a61
--- /dev/null
+++ b/spec/build/bsps/arm/lm3s69xx/obj.yml
@@ -0,0 +1,55 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: objects
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+cxxflags: []
+enabled-by: true
+includes: []
+install:
+- destination: ${BSP_INCLUDEDIR}
+ source:
+ - bsps/arm/lm3s69xx/include/bsp.h
+ - bsps/arm/lm3s69xx/include/tm27.h
+- destination: ${BSP_INCLUDEDIR}/bsp
+ source:
+ - bsps/arm/lm3s69xx/include/bsp/io.h
+ - bsps/arm/lm3s69xx/include/bsp/irq.h
+ - bsps/arm/lm3s69xx/include/bsp/lm3s69xx.h
+ - bsps/arm/lm3s69xx/include/bsp/ssi.h
+ - bsps/arm/lm3s69xx/include/bsp/syscon.h
+ - bsps/arm/lm3s69xx/include/bsp/uart.h
+- destination: ${BSP_LIBDIR}
+ source:
+ - bsps/arm/lm3s69xx/start/linkcmds.lm3s3749
+ - bsps/arm/lm3s69xx/start/linkcmds.lm3s6965
+ - bsps/arm/lm3s69xx/start/linkcmds.lm3s6965_qemu
+links: []
+source:
+- bsps/arm/lm3s69xx/console/console-config.c
+- bsps/arm/lm3s69xx/console/uart.c
+- bsps/arm/lm3s69xx/i2c/ssi.c
+- bsps/arm/lm3s69xx/start/bspstart.c
+- bsps/arm/lm3s69xx/start/bspstarthook.c
+- bsps/arm/lm3s69xx/start/io.c
+- bsps/arm/lm3s69xx/start/syscon.c
+- bsps/arm/shared/clock/clock-armv7m.c
+- bsps/arm/shared/irq/irq-armv7m.c
+- bsps/arm/shared/irq/irq-dispatch-armv7m.c
+- bsps/arm/shared/start/bsp-start-memcpy.S
+- bsps/arm/shared/start/bspreset-armv7m.c
+- bsps/shared/cache/nocache.c
+- bsps/shared/dev/btimer/btimer-stub.c
+- bsps/shared/dev/cpucounter/cpucounterfrequency.c
+- bsps/shared/dev/cpucounter/cpucounterread.c
+- bsps/shared/dev/getentropy/getentropy-cpucounter.c
+- bsps/shared/dev/serial/legacy-console-control.c
+- bsps/shared/dev/serial/legacy-console-select.c
+- bsps/shared/dev/serial/legacy-console.c
+- bsps/shared/irq/irq-default-handler.c
+- bsps/shared/start/bspfatal-default.c
+- bsps/shared/start/bspgetworkarea-default.c
+- bsps/shared/start/sbrk.c
+- bsps/shared/start/stackalloc.c
+type: build
diff --git a/spec/build/bsps/arm/lm3s69xx/optenuart0.yml b/spec/build/bsps/arm/lm3s69xx/optenuart0.yml
new file mode 100644
index 0000000000..fa3254dbf5
--- /dev/null
+++ b/spec/build/bsps/arm/lm3s69xx/optenuart0.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+ enable UART 0
+enabled-by: true
+links: []
+name: LM3S69XX_ENABLE_UART_0
+type: build
diff --git a/spec/build/bsps/arm/lm3s69xx/optenuart1.yml b/spec/build/bsps/arm/lm3s69xx/optenuart1.yml
new file mode 100644
index 0000000000..42c6133cf5
--- /dev/null
+++ b/spec/build/bsps/arm/lm3s69xx/optenuart1.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant: []
+description: |
+ enable UART 1
+enabled-by: true
+links: []
+name: LM3S69XX_ENABLE_UART_1
+type: build
diff --git a/spec/build/bsps/arm/lm3s69xx/optenuart2.yml b/spec/build/bsps/arm/lm3s69xx/optenuart2.yml
new file mode 100644
index 0000000000..0de60cb7a7
--- /dev/null
+++ b/spec/build/bsps/arm/lm3s69xx/optenuart2.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant: []
+description: |
+ enable UART 2
+enabled-by: true
+links: []
+name: LM3S69XX_ENABLE_UART_2
+type: build
diff --git a/spec/build/bsps/arm/lm3s69xx/optgpioahb.yml b/spec/build/bsps/arm/lm3s69xx/optgpioahb.yml
new file mode 100644
index 0000000000..5266ec8549
--- /dev/null
+++ b/spec/build/bsps/arm/lm3s69xx/optgpioahb.yml
@@ -0,0 +1,21 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant:
+- value: true
+ variants:
+ - arm/lm3s3749.*
+- value: true
+ variants:
+ - arm/lm4f.*
+description: |
+ use AHB apperture to access GPIO registers
+enabled-by: true
+links: []
+name: LM3S69XX_USE_AHB_FOR_GPIO
+type: build
diff --git a/spec/build/bsps/arm/lm3s69xx/optgpionum.yml b/spec/build/bsps/arm/lm3s69xx/optgpionum.yml
new file mode 100644
index 0000000000..05911d140c
--- /dev/null
+++ b/spec/build/bsps/arm/lm3s69xx/optgpionum.yml
@@ -0,0 +1,25 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 0
+default-by-variant:
+- value: 8
+ variants:
+ - arm/lm3s3749.*
+- value: 7
+ variants:
+ - arm/lm3s6965.*
+- value: 6
+ variants:
+ - arm/lm4f120.*
+description: |
+ number of GPIO blocks supported by MCU
+enabled-by: true
+format: '{}'
+links: []
+name: LM3S69XX_NUM_GPIO_BLOCKS
+type: build
diff --git a/spec/build/bsps/arm/lm3s69xx/optlm3s3749.yml b/spec/build/bsps/arm/lm3s69xx/optlm3s3749.yml
new file mode 100644
index 0000000000..22199d8d59
--- /dev/null
+++ b/spec/build/bsps/arm/lm3s69xx/optlm3s3749.yml
@@ -0,0 +1,18 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant:
+- value: true
+ variants:
+ - arm/lm3s3749.*
+description: |
+ board has LM3S3749 MCU
+enabled-by: true
+links: []
+name: LM3S69XX_MCU_LM3S3749
+type: build
diff --git a/spec/build/bsps/arm/lm3s69xx/optlm3s6965.yml b/spec/build/bsps/arm/lm3s69xx/optlm3s6965.yml
new file mode 100644
index 0000000000..be01195f1d
--- /dev/null
+++ b/spec/build/bsps/arm/lm3s69xx/optlm3s6965.yml
@@ -0,0 +1,18 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant:
+- value: true
+ variants:
+ - arm/lm3s6965.*
+description: |
+ board has LM3S6965 MCU
+enabled-by: true
+links: []
+name: LM3S69XX_MCU_LM3S6965
+type: build
diff --git a/spec/build/bsps/arm/lm3s69xx/optlm4f120.yml b/spec/build/bsps/arm/lm3s69xx/optlm4f120.yml
new file mode 100644
index 0000000000..b3c59921b6
--- /dev/null
+++ b/spec/build/bsps/arm/lm3s69xx/optlm4f120.yml
@@ -0,0 +1,18 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant:
+- value: true
+ variants:
+ - arm/lm4f120.*
+description: |
+ board has LM4F120xxx MCU
+enabled-by: true
+links: []
+name: LM3S69XX_MCU_LM4F120
+type: build
diff --git a/spec/build/bsps/arm/lm3s69xx/optssiblks.yml b/spec/build/bsps/arm/lm3s69xx/optssiblks.yml
new file mode 100644
index 0000000000..551a27cbf2
--- /dev/null
+++ b/spec/build/bsps/arm/lm3s69xx/optssiblks.yml
@@ -0,0 +1,25 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 0
+default-by-variant:
+- value: 2
+ variants:
+ - arm/lm3s3749.*
+- value: 1
+ variants:
+ - arm/lm3s6965.*
+- value: 4
+ variants:
+ - arm/lm4f120.*
+description: |
+ number of SSI blocks supported by MCU
+enabled-by: true
+format: '{}'
+links: []
+name: LM3S69XX_NUM_SSI_BLOCKS
+type: build
diff --git a/spec/build/bsps/arm/lm3s69xx/optssiclk.yml b/spec/build/bsps/arm/lm3s69xx/optssiclk.yml
new file mode 100644
index 0000000000..b278880160
--- /dev/null
+++ b/spec/build/bsps/arm/lm3s69xx/optssiclk.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 1000000
+default-by-variant: []
+description: |
+ SSI clock in Hz
+enabled-by: true
+format: '{}'
+links: []
+name: LM3S69XX_SSI_CLOCK
+type: build
diff --git a/spec/build/bsps/arm/lm3s69xx/optsysclk.yml b/spec/build/bsps/arm/lm3s69xx/optsysclk.yml
new file mode 100644
index 0000000000..ffdd8d78c3
--- /dev/null
+++ b/spec/build/bsps/arm/lm3s69xx/optsysclk.yml
@@ -0,0 +1,22 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 0
+default-by-variant:
+- value: 50000000
+ variants:
+ - arm/lm3s.*
+- value: 80000000
+ variants:
+ - arm/lm4f.*
+description: |
+ system clock in Hz
+enabled-by: true
+format: '{}'
+links: []
+name: LM3S69XX_SYSTEM_CLOCK
+type: build
diff --git a/spec/build/bsps/arm/lm3s69xx/optuartbaud.yml b/spec/build/bsps/arm/lm3s69xx/optuartbaud.yml
new file mode 100644
index 0000000000..9b1deff47c
--- /dev/null
+++ b/spec/build/bsps/arm/lm3s69xx/optuartbaud.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 115200
+default-by-variant: []
+description: |
+ baud for UARTs
+enabled-by: true
+format: '{}'
+links: []
+name: LM3S69XX_UART_BAUD
+type: build
diff --git a/spec/build/bsps/arm/lm3s69xx/optudma.yml b/spec/build/bsps/arm/lm3s69xx/optudma.yml
new file mode 100644
index 0000000000..88aae5094c
--- /dev/null
+++ b/spec/build/bsps/arm/lm3s69xx/optudma.yml
@@ -0,0 +1,21 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant:
+- value: true
+ variants:
+ - arm/lm3s3749.*
+- value: true
+ variants:
+ - arm/lm4f.*
+description: |
+ defined if MCU supports UDMA
+enabled-by: true
+links: []
+name: LM3S69XX_HAS_UDMA
+type: build
diff --git a/spec/build/bsps/arm/lm3s69xx/optxtalcfg.yml b/spec/build/bsps/arm/lm3s69xx/optxtalcfg.yml
new file mode 100644
index 0000000000..d034385cd3
--- /dev/null
+++ b/spec/build/bsps/arm/lm3s69xx/optxtalcfg.yml
@@ -0,0 +1,25 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 0
+default-by-variant:
+- value: 14
+ variants:
+ - arm/lm3s6965.*
+- value: 16
+ variants:
+ - arm/lm3s3749.*
+- value: 21
+ variants:
+ - arm/lm4f120.*
+description: |
+ crystal configuration for RCC register
+enabled-by: true
+format: '{:#010x}'
+links: []
+name: LM3S69XX_XTAL_CONFIG
+type: build
diff --git a/spec/build/bsps/arm/lm3s69xx/tstlm3s3749.yml b/spec/build/bsps/arm/lm3s69xx/tstlm3s3749.yml
new file mode 100644
index 0000000000..1e62c8bda5
--- /dev/null
+++ b/spec/build/bsps/arm/lm3s69xx/tstlm3s3749.yml
@@ -0,0 +1,38 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- set-test-state:
+ capture: exclude
+ cdtest: exclude
+ fileio: exclude
+ fsdosfsformat01: exclude
+ fsrfsbitmap01: exclude
+ ftp01: exclude
+ iostream: exclude
+ loopback: exclude
+ mdosfsfserror: exclude
+ mdosfsfsrdwr: exclude
+ mghttpd01: exclude
+ monitor02: exclude
+ paranoia: exclude
+ pppd: exclude
+ record01: exclude
+ rtems: exclude
+ shell01: exclude
+ sptls02: exclude
+ syscall01: exclude
+ telnetd01: exclude
+ ttest01: exclude
+ utf8proc01: exclude
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: null
+default-by-variant: []
+description: ''
+enabled-by: true
+links:
+- role: build-dependency
+ uid: ../../tstnorfs
+- role: build-dependency
+ uid: ../../tstsmallmem
+type: build
diff --git a/spec/build/bsps/arm/lm3s69xx/tstlm3s6965.yml b/spec/build/bsps/arm/lm3s69xx/tstlm3s6965.yml
new file mode 100644
index 0000000000..f752f18b93
--- /dev/null
+++ b/spec/build/bsps/arm/lm3s69xx/tstlm3s6965.yml
@@ -0,0 +1,22 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- set-test-state:
+ fileio: exclude
+ ftp01: exclude
+ iostream: exclude
+ mghttpd01: exclude
+ monitor02: exclude
+ pppd: exclude
+ rtems: exclude
+ utf8proc01: exclude
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: null
+default-by-variant: []
+description: ''
+enabled-by: true
+links:
+- role: build-dependency
+ uid: ../../tstsmallmem
+type: build
diff --git a/spec/build/bsps/arm/lm3s69xx/tstlm4f120.yml b/spec/build/bsps/arm/lm3s69xx/tstlm4f120.yml
new file mode 100644
index 0000000000..e9dbfc5a9f
--- /dev/null
+++ b/spec/build/bsps/arm/lm3s69xx/tstlm4f120.yml
@@ -0,0 +1,39 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- set-test-state:
+ block08: exclude
+ capture: exclude
+ fileio: exclude
+ ftp01: exclude
+ iostream: exclude
+ loopback: exclude
+ mghttpd01: exclude
+ ostream: exclude
+ pppd: exclude
+ psxaio01: exclude
+ psxaio02: exclude
+ psxaio03: exclude
+ psxsignal07: exclude
+ sp16: exclude
+ sp25: exclude
+ sp42: exclude
+ sp48: exclude
+ sp71: exclude
+ spregionerr01: exclude
+ sptimecounter02: exclude
+ sptimecounter03: exclude
+ telnetd01: exclude
+ tmcontext01: exclude
+ top: exclude
+ utf8proc01: exclude
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: null
+default-by-variant: []
+description: ''
+enabled-by: true
+links:
+- role: build-dependency
+ uid: ../../tstsmallmem
+type: build
diff --git a/spec/build/bsps/arm/lpc176x/abi.yml b/spec/build/bsps/arm/lpc176x/abi.yml
new file mode 100644
index 0000000000..77d5db8cf7
--- /dev/null
+++ b/spec/build/bsps/arm/lpc176x/abi.yml
@@ -0,0 +1,18 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-string: null
+- split: null
+- env-append: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default:
+- -mthumb
+- -mcpu=cortex-m3
+default-by-variant: []
+description: |
+ ABI flags
+enabled-by: true
+links: []
+name: ABI_FLAGS
+type: build
diff --git a/spec/build/bsps/arm/lpc176x/bsplpc1768mbed.yml b/spec/build/bsps/arm/lpc176x/bsplpc1768mbed.yml
new file mode 100644
index 0000000000..189ef44c63
--- /dev/null
+++ b/spec/build/bsps/arm/lpc176x/bsplpc1768mbed.yml
@@ -0,0 +1,21 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: lpc1768_mbed
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: lpc176x
+includes: []
+install: []
+links:
+- role: build-dependency
+ uid: grp
+- role: build-dependency
+ uid: tstlpc1768mbed
+- role: build-dependency
+ uid: ../../opto2
+source: []
+type: build
diff --git a/spec/build/bsps/arm/lpc176x/bsplpc1768mbedahbram.yml b/spec/build/bsps/arm/lpc176x/bsplpc1768mbedahbram.yml
new file mode 100644
index 0000000000..705599cbb8
--- /dev/null
+++ b/spec/build/bsps/arm/lpc176x/bsplpc1768mbedahbram.yml
@@ -0,0 +1,21 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: lpc1768_mbed_ahb_ram
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: lpc176x
+includes: []
+install: []
+links:
+- role: build-dependency
+ uid: grp
+- role: build-dependency
+ uid: tstlpc1768mbedahbram
+- role: build-dependency
+ uid: ../../opto2
+source: []
+type: build
diff --git a/spec/build/bsps/arm/lpc176x/bsplpc1768mbedahbrameth.yml b/spec/build/bsps/arm/lpc176x/bsplpc1768mbedahbrameth.yml
new file mode 100644
index 0000000000..4d1dddef55
--- /dev/null
+++ b/spec/build/bsps/arm/lpc176x/bsplpc1768mbedahbrameth.yml
@@ -0,0 +1,21 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: lpc1768_mbed_ahb_ram_eth
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: lpc176x
+includes: []
+install: []
+links:
+- role: build-dependency
+ uid: grp
+- role: build-dependency
+ uid: tstlpc1768mbedahbrameth
+- role: build-dependency
+ uid: ../../opto2
+source: []
+type: build
diff --git a/spec/build/bsps/arm/lpc176x/grp.yml b/spec/build/bsps/arm/lpc176x/grp.yml
new file mode 100644
index 0000000000..fba2a13cd8
--- /dev/null
+++ b/spec/build/bsps/arm/lpc176x/grp.yml
@@ -0,0 +1,52 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: group
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+enabled-by: true
+includes: []
+install: []
+ldflags: []
+links:
+- role: build-dependency
+ uid: ../grp
+- role: build-dependency
+ uid: abi
+- role: build-dependency
+ uid: obj
+- role: build-dependency
+ uid: optcclk
+- role: build-dependency
+ uid: optconcfg
+- role: build-dependency
+ uid: optdmachn
+- role: build-dependency
+ uid: optlpc1768
+- role: build-dependency
+ uid: optmintskstksz
+- role: build-dependency
+ uid: optoscmain
+- role: build-dependency
+ uid: optoscrtc
+- role: build-dependency
+ uid: optpclkdiv
+- role: build-dependency
+ uid: optstopgpdma
+- role: build-dependency
+ uid: optstopusb
+- role: build-dependency
+ uid: optuart1cfg
+- role: build-dependency
+ uid: optuartbaud
+- role: build-dependency
+ uid: ../start
+- role: build-dependency
+ uid: ../../linkcmds
+- role: build-dependency
+ uid: ../../obj
+- role: build-dependency
+ uid: ../../objirq
+- role: build-dependency
+ uid: ../../bspopts
+type: build
+use-after: []
+use-before: []
diff --git a/spec/build/bsps/arm/lpc176x/obj.yml b/spec/build/bsps/arm/lpc176x/obj.yml
new file mode 100644
index 0000000000..c77a7ce404
--- /dev/null
+++ b/spec/build/bsps/arm/lpc176x/obj.yml
@@ -0,0 +1,80 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: objects
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+cxxflags: []
+enabled-by: true
+includes: []
+install:
+- destination: ${BSP_INCLUDEDIR}
+ source:
+ - bsps/arm/lpc176x/include/bsp.h
+ - bsps/arm/lpc176x/include/tm27.h
+- destination: ${BSP_INCLUDEDIR}/bsp
+ source:
+ - bsps/arm/lpc176x/include/bsp/adc-defs.h
+ - bsps/arm/lpc176x/include/bsp/adc.h
+ - bsps/arm/lpc176x/include/bsp/can-defs.h
+ - bsps/arm/lpc176x/include/bsp/can.h
+ - bsps/arm/lpc176x/include/bsp/common-types.h
+ - bsps/arm/lpc176x/include/bsp/dma.h
+ - bsps/arm/lpc176x/include/bsp/gpio-defs.h
+ - bsps/arm/lpc176x/include/bsp/io-defs.h
+ - bsps/arm/lpc176x/include/bsp/io.h
+ - bsps/arm/lpc176x/include/bsp/irq.h
+ - bsps/arm/lpc176x/include/bsp/lpc-clock-config.h
+ - bsps/arm/lpc176x/include/bsp/lpc-gpio.h
+ - bsps/arm/lpc176x/include/bsp/lpc176x.h
+ - bsps/arm/lpc176x/include/bsp/mbed-pinmap.h
+ - bsps/arm/lpc176x/include/bsp/pwmout-defs.h
+ - bsps/arm/lpc176x/include/bsp/pwmout.h
+ - bsps/arm/lpc176x/include/bsp/system-clocks.h
+ - bsps/arm/lpc176x/include/bsp/timer-defs.h
+ - bsps/arm/lpc176x/include/bsp/timer.h
+ - bsps/arm/lpc176x/include/bsp/watchdog-defs.h
+ - bsps/arm/lpc176x/include/bsp/watchdog.h
+- destination: ${BSP_LIBDIR}
+ source:
+ - bsps/arm/lpc176x/start/linkcmds.lpc1768_mbed
+ - bsps/arm/lpc176x/start/linkcmds.lpc1768_mbed_ahb_ram
+ - bsps/arm/lpc176x/start/linkcmds.lpc1768_mbed_ahb_ram_eth
+links: []
+source:
+- bsps/arm/lpc176x/btimer/btimer.c
+- bsps/arm/lpc176x/can/can.c
+- bsps/arm/lpc176x/console/console-config.c
+- bsps/arm/lpc176x/gpio/lpc-gpio.c
+- bsps/arm/lpc176x/irq/irq.c
+- bsps/arm/lpc176x/pwm/pwmout.c
+- bsps/arm/lpc176x/rtc/rtc-config.c
+- bsps/arm/lpc176x/start/adc.c
+- bsps/arm/lpc176x/start/bspidle.c
+- bsps/arm/lpc176x/start/bspstart.c
+- bsps/arm/lpc176x/start/bspstarthooks.c
+- bsps/arm/lpc176x/start/dma-copy.c
+- bsps/arm/lpc176x/start/dma.c
+- bsps/arm/lpc176x/start/io.c
+- bsps/arm/lpc176x/start/restart.c
+- bsps/arm/lpc176x/start/system-clocks.c
+- bsps/arm/lpc176x/start/watchdog.c
+- bsps/arm/lpc176x/timer/timer.c
+- bsps/arm/shared/clock/clock-armv7m.c
+- bsps/arm/shared/clock/clock-nxp-lpc.c
+- bsps/arm/shared/irq/irq-armv7m.c
+- bsps/arm/shared/irq/irq-dispatch-armv7m.c
+- bsps/arm/shared/start/bsp-start-memcpy.S
+- bsps/arm/shared/start/bspreset-armv7m.c
+- bsps/shared/cache/nocache.c
+- bsps/shared/dev/getentropy/getentropy-cpucounter.c
+- bsps/shared/dev/rtc/rtc-support.c
+- bsps/shared/dev/serial/console-termios-init.c
+- bsps/shared/dev/serial/console-termios.c
+- bsps/shared/dev/serial/uart-output-char.c
+- bsps/shared/irq/irq-default-handler.c
+- bsps/shared/start/bspfatal-default.c
+- bsps/shared/start/bspgetworkarea-default.c
+- bsps/shared/start/sbrk.c
+- bsps/shared/start/stackalloc.c
+type: build
diff --git a/spec/build/bsps/arm/lpc176x/optcclk.yml b/spec/build/bsps/arm/lpc176x/optcclk.yml
new file mode 100644
index 0000000000..5df9f0a5e2
--- /dev/null
+++ b/spec/build/bsps/arm/lpc176x/optcclk.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 96000000
+default-by-variant: []
+description: |
+ CPU clock in Hz
+enabled-by: true
+format: '{}'
+links: []
+name: LPC176X_CCLK
+type: build
diff --git a/spec/build/bsps/arm/lpc176x/optconcfg.yml b/spec/build/bsps/arm/lpc176x/optconcfg.yml
new file mode 100644
index 0000000000..98ff2a9325
--- /dev/null
+++ b/spec/build/bsps/arm/lpc176x/optconcfg.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant: []
+description: |
+ configuration for console (UART 0)
+enabled-by: true
+links: []
+name: LPC176X_CONFIG_CONSOLE
+type: build
diff --git a/spec/build/bsps/arm/lpc176x/optdmachn.yml b/spec/build/bsps/arm/lpc176x/optdmachn.yml
new file mode 100644
index 0000000000..a7c288b3c7
--- /dev/null
+++ b/spec/build/bsps/arm/lpc176x/optdmachn.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 2
+default-by-variant: []
+description: |
+ DMA channel count
+enabled-by: true
+format: '{}'
+links: []
+name: LPC_DMA_CHANNEL_COUNT
+type: build
diff --git a/spec/build/bsps/arm/lpc176x/optlpc1768.yml b/spec/build/bsps/arm/lpc176x/optlpc1768.yml
new file mode 100644
index 0000000000..9d9673b002
--- /dev/null
+++ b/spec/build/bsps/arm/lpc176x/optlpc1768.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant: []
+description: |
+ target used for identify LPC1768 board
+enabled-by: true
+links: []
+name: ARM_LPC1768
+type: build
diff --git a/spec/build/bsps/arm/lpc176x/optmintskstksz.yml b/spec/build/bsps/arm/lpc176x/optmintskstksz.yml
new file mode 100644
index 0000000000..57e77ae551
--- /dev/null
+++ b/spec/build/bsps/arm/lpc176x/optmintskstksz.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 1024
+default-by-variant: []
+description: |
+ Suggested minimum task stack size in bytes
+enabled-by: true
+format: '{}'
+links: []
+name: BSP_MINIMUM_TASK_STACK_SIZE
+type: build
diff --git a/spec/build/bsps/arm/lpc176x/optoscmain.yml b/spec/build/bsps/arm/lpc176x/optoscmain.yml
new file mode 100644
index 0000000000..eccce9a3ea
--- /dev/null
+++ b/spec/build/bsps/arm/lpc176x/optoscmain.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 12000000
+default-by-variant: []
+description: |
+ main oscillator frequency in Hz
+enabled-by: true
+format: '{}'
+links: []
+name: LPC176X_OSCILLATOR_MAIN
+type: build
diff --git a/spec/build/bsps/arm/lpc176x/optoscrtc.yml b/spec/build/bsps/arm/lpc176x/optoscrtc.yml
new file mode 100644
index 0000000000..a5eff014e9
--- /dev/null
+++ b/spec/build/bsps/arm/lpc176x/optoscrtc.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 32768
+default-by-variant: []
+description: |
+ RTC oscillator frequency in Hz
+enabled-by: true
+format: '{}'
+links: []
+name: LPC176X_OSCILLATOR_RTC
+type: build
diff --git a/spec/build/bsps/arm/lpc176x/optpclkdiv.yml b/spec/build/bsps/arm/lpc176x/optpclkdiv.yml
new file mode 100644
index 0000000000..4027f8ad17
--- /dev/null
+++ b/spec/build/bsps/arm/lpc176x/optpclkdiv.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 1
+default-by-variant: []
+description: |
+ clock divider for default PCLK (PCLK = CCLK / PCLKDIV)
+enabled-by: true
+format: '{}'
+links: []
+name: LPC176X_PCLKDIV
+type: build
diff --git a/spec/build/bsps/arm/lpc176x/optstopgpdma.yml b/spec/build/bsps/arm/lpc176x/optstopgpdma.yml
new file mode 100644
index 0000000000..d407af65e7
--- /dev/null
+++ b/spec/build/bsps/arm/lpc176x/optstopgpdma.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+ stop general purpose DMA at start-up to avoid DMA interference
+enabled-by: true
+links: []
+name: LPC176X_STOP_GPDMA
+type: build
diff --git a/spec/build/bsps/arm/lpc176x/optstopusb.yml b/spec/build/bsps/arm/lpc176x/optstopusb.yml
new file mode 100644
index 0000000000..708a5bb41c
--- /dev/null
+++ b/spec/build/bsps/arm/lpc176x/optstopusb.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+ stop USB controller at start-up to avoid DMA interference
+enabled-by: true
+links: []
+name: LPC176X_STOP_USB
+type: build
diff --git a/spec/build/bsps/arm/lpc176x/optuart1cfg.yml b/spec/build/bsps/arm/lpc176x/optuart1cfg.yml
new file mode 100644
index 0000000000..ec9d9843d5
--- /dev/null
+++ b/spec/build/bsps/arm/lpc176x/optuart1cfg.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+ Use Uart 1
+enabled-by: true
+links: []
+name: LPC176X_CONFIG_UART_1
+type: build
diff --git a/spec/build/bsps/arm/lpc176x/optuartbaud.yml b/spec/build/bsps/arm/lpc176x/optuartbaud.yml
new file mode 100644
index 0000000000..c5e094beef
--- /dev/null
+++ b/spec/build/bsps/arm/lpc176x/optuartbaud.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 9600
+default-by-variant: []
+description: |
+ baud for UARTs
+enabled-by: true
+format: '{}'
+links: []
+name: LPC176X_UART_BAUD
+type: build
diff --git a/spec/build/bsps/arm/lpc176x/tstlpc1768mbed.yml b/spec/build/bsps/arm/lpc176x/tstlpc1768mbed.yml
new file mode 100644
index 0000000000..566f53a2a3
--- /dev/null
+++ b/spec/build/bsps/arm/lpc176x/tstlpc1768mbed.yml
@@ -0,0 +1,37 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- set-test-state:
+ block08: exclude
+ capture: exclude
+ fileio: exclude
+ ftp01: exclude
+ iostream: exclude
+ loopback: exclude
+ mghttpd01: exclude
+ pppd: exclude
+ psxaio01: exclude
+ psxaio02: exclude
+ psxsignal07: exclude
+ rtems: exclude
+ sp16: exclude
+ sp25: exclude
+ sp42: exclude
+ sp48: exclude
+ sptimecounter02: exclude
+ sptimecounter03: exclude
+ telnetd01: exclude
+ tmcontext01: exclude
+ tmfine01: exclude
+ top: exclude
+ utf8proc01: exclude
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: null
+default-by-variant: []
+description: ''
+enabled-by: true
+links:
+- role: build-dependency
+ uid: ../../tstsmallmem
+type: build
diff --git a/spec/build/bsps/arm/lpc176x/tstlpc1768mbedahbram.yml b/spec/build/bsps/arm/lpc176x/tstlpc1768mbedahbram.yml
new file mode 100644
index 0000000000..5f4d24d544
--- /dev/null
+++ b/spec/build/bsps/arm/lpc176x/tstlpc1768mbedahbram.yml
@@ -0,0 +1,38 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- set-test-state:
+ block08: exclude
+ capture: exclude
+ fileio: exclude
+ ftp01: exclude
+ iostream: exclude
+ loopback: exclude
+ mghttpd01: exclude
+ pppd: exclude
+ psxaio01: exclude
+ psxaio02: exclude
+ psxaio03: exclude
+ psxsignal07: exclude
+ rtems: exclude
+ sp16: exclude
+ sp25: exclude
+ sp42: exclude
+ sp48: exclude
+ sptimecounter02: exclude
+ sptimecounter03: exclude
+ sptls02: exclude
+ tmcontext01: exclude
+ tmfine01: exclude
+ top: exclude
+ utf8proc01: exclude
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: null
+default-by-variant: []
+description: ''
+enabled-by: true
+links:
+- role: build-dependency
+ uid: ../../tstsmallmem
+type: build
diff --git a/spec/build/bsps/arm/lpc176x/tstlpc1768mbedahbrameth.yml b/spec/build/bsps/arm/lpc176x/tstlpc1768mbedahbrameth.yml
new file mode 100644
index 0000000000..4760c9d08c
--- /dev/null
+++ b/spec/build/bsps/arm/lpc176x/tstlpc1768mbedahbrameth.yml
@@ -0,0 +1,140 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- set-test-state:
+ block08: exclude
+ calloc: exclude
+ capture: exclude
+ cdtest: exclude
+ clockgettime: exclude
+ close: exclude
+ debugger01: exclude
+ defaultconfig01: exclude
+ dhrystone: exclude
+ dup2: exclude
+ fcntl: exclude
+ fileio: exclude
+ flockfile: exclude
+ fork: exclude
+ free: exclude
+ fsdosfswrite01: exclude
+ fsrfsbitmap01: exclude
+ fstat: exclude
+ ftp01: exclude
+ ftrylockfile: exclude
+ funlockfile: exclude
+ getlogin: exclude
+ getpwnam: exclude
+ getpwuid: exclude
+ gettimeofday: exclude
+ getuid: exclude
+ heapwalk: exclude
+ htonl: exclude
+ imfsfserror: exclude
+ imfsfslink: exclude
+ imfsfspatheval: exclude
+ imfsfspermission: exclude
+ imfsfsrdwr: exclude
+ imfsfsscandir01: exclude
+ imfsfssymlink: exclude
+ imfsfstime: exclude
+ iostream: exclude
+ kill: exclude
+ longjmp: exclude
+ loopback: exclude
+ lseek: exclude
+ lstat: exclude
+ malloc: exclude
+ mdosfsfserror: exclude
+ mdosfsfspatheval: exclude
+ mdosfsfsrdwr: exclude
+ mdosfsfsscandir01: exclude
+ mdosfsfsstatvfs: exclude
+ mdosfsfstime: exclude
+ mghttpd01: exclude
+ mimfsfserror: exclude
+ mimfsfslink: exclude
+ mimfsfspatheval: exclude
+ mimfsfspermission: exclude
+ mimfsfsrdwr: exclude
+ mimfsfsrename: exclude
+ mimfsfsscandir01: exclude
+ mimfsfssymlink: exclude
+ mimfsfstime: exclude
+ monitor: exclude
+ monitor01: exclude
+ monitor02: exclude
+ nanosleep: exclude
+ open: exclude
+ pipe: exclude
+ posixmemalign: exclude
+ pppd: exclude
+ psxaio01: exclude
+ psxaio02: exclude
+ psxaio03: exclude
+ psxbarrier01: exclude
+ psxkey07: exclude
+ psxkey08: exclude
+ psxsignal02: exclude
+ psxsignal07: exclude
+ rbheap01: exclude
+ read: exclude
+ readv: exclude
+ realloc: exclude
+ rtems: exclude
+ setjmp: exclude
+ sigaddset: exclude
+ sigdelset: exclude
+ sigemptyset: exclude
+ sigfillset: exclude
+ sigismember: exclude
+ sigprocmask: exclude
+ sp01: exclude
+ sp16: exclude
+ sp20: exclude
+ sp25: exclude
+ sp35: exclude
+ sp42: exclude
+ sp48: exclude
+ spclockerr01: exclude
+ speventerr03: exclude
+ spintrerr01: exclude
+ spmsgqerr01: exclude
+ spmsgqerr02: exclude
+ spporterr01: exclude
+ spratemonerr01: exclude
+ spregionerr01: exclude
+ spsemerr01: exclude
+ spsemerr02: exclude
+ spsignalerr01: exclude
+ spstkalloc: exclude
+ sptaskerr01: exclude
+ sptaskerr03: exclude
+ sptimecounter02: exclude
+ sptimecounter03: exclude
+ sptls02: exclude
+ stat: exclude
+ telnetd01: exclude
+ tm21: exclude
+ tmcontext01: exclude
+ tmfine01: exclude
+ top: exclude
+ unlink: exclude
+ utf8proc01: exclude
+ vfork: exclude
+ wait: exclude
+ waitpid: exclude
+ write: exclude
+ writev: exclude
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: null
+default-by-variant: []
+description: ''
+enabled-by: true
+links:
+- role: build-dependency
+ uid: ../../tstnorfs
+- role: build-dependency
+ uid: ../../tstsmallmem
+type: build
diff --git a/spec/build/bsps/arm/lpc24xx/abi.yml b/spec/build/bsps/arm/lpc24xx/abi.yml
new file mode 100644
index 0000000000..dd98de97fe
--- /dev/null
+++ b/spec/build/bsps/arm/lpc24xx/abi.yml
@@ -0,0 +1,34 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-string: null
+- split: null
+- env-append: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default:
+- -mcpu=arm7tdmi-s
+- -mthumb
+default-by-variant:
+- value:
+ - -mthumb
+ - -mcpu=cortex-m3
+ variants:
+ - arm/lpc17xx_ea_ram
+ - arm/lpc17xx_ea_rom_int
+ - arm/lpc17xx_plx800_ram
+ - arm/lpc17xx_plx800_rom_int
+- value:
+ - -mthumb
+ - -mcpu=cortex-m4
+ - -mfpu=fpv4-sp-d16
+ - -mfloat-abi=hard
+ variants:
+ - arm/lpc40xx_ea_ram
+ - arm/lpc40xx_ea_rom_int
+description: |
+ ABI flags
+enabled-by: true
+links: []
+name: ABI_FLAGS
+type: build
diff --git a/spec/build/bsps/arm/lpc24xx/bsplpc17xxearam.yml b/spec/build/bsps/arm/lpc24xx/bsplpc17xxearam.yml
new file mode 100644
index 0000000000..181c49c60a
--- /dev/null
+++ b/spec/build/bsps/arm/lpc24xx/bsplpc17xxearam.yml
@@ -0,0 +1,19 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: lpc17xx_ea_ram
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: lpc24xx
+includes: []
+install: []
+links:
+- role: build-dependency
+ uid: grp
+- role: build-dependency
+ uid: ../../opto2
+source: []
+type: build
diff --git a/spec/build/bsps/arm/lpc24xx/bsplpc17xxearomint.yml b/spec/build/bsps/arm/lpc24xx/bsplpc17xxearomint.yml
new file mode 100644
index 0000000000..ad6e72110a
--- /dev/null
+++ b/spec/build/bsps/arm/lpc24xx/bsplpc17xxearomint.yml
@@ -0,0 +1,21 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: lpc17xx_ea_rom_int
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: lpc24xx
+includes: []
+install: []
+links:
+- role: build-dependency
+ uid: grp
+- role: build-dependency
+ uid: tstlpc17xxearomint
+- role: build-dependency
+ uid: ../../opto2
+source: []
+type: build
diff --git a/spec/build/bsps/arm/lpc24xx/bsplpc17xxplx800ram.yml b/spec/build/bsps/arm/lpc24xx/bsplpc17xxplx800ram.yml
new file mode 100644
index 0000000000..c19e6174f0
--- /dev/null
+++ b/spec/build/bsps/arm/lpc24xx/bsplpc17xxplx800ram.yml
@@ -0,0 +1,19 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: lpc17xx_plx800_ram
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: lpc24xx
+includes: []
+install: []
+links:
+- role: build-dependency
+ uid: grp
+- role: build-dependency
+ uid: ../../opto2
+source: []
+type: build
diff --git a/spec/build/bsps/arm/lpc24xx/bsplpc17xxplx800romint.yml b/spec/build/bsps/arm/lpc24xx/bsplpc17xxplx800romint.yml
new file mode 100644
index 0000000000..ec07975717
--- /dev/null
+++ b/spec/build/bsps/arm/lpc24xx/bsplpc17xxplx800romint.yml
@@ -0,0 +1,21 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: lpc17xx_plx800_rom_int
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: lpc24xx
+includes: []
+install: []
+links:
+- role: build-dependency
+ uid: grp
+- role: build-dependency
+ uid: tstlpc17xxplx800romint
+- role: build-dependency
+ uid: ../../opto2
+source: []
+type: build
diff --git a/spec/build/bsps/arm/lpc24xx/bsplpc2362.yml b/spec/build/bsps/arm/lpc24xx/bsplpc2362.yml
new file mode 100644
index 0000000000..fe667c755f
--- /dev/null
+++ b/spec/build/bsps/arm/lpc24xx/bsplpc2362.yml
@@ -0,0 +1,21 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: lpc2362
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: lpc24xx
+includes: []
+install: []
+links:
+- role: build-dependency
+ uid: grp
+- role: build-dependency
+ uid: tstlpc2362
+- role: build-dependency
+ uid: ../../opto2
+source: []
+type: build
diff --git a/spec/build/bsps/arm/lpc24xx/bsplpc23xxtli800.yml b/spec/build/bsps/arm/lpc24xx/bsplpc23xxtli800.yml
new file mode 100644
index 0000000000..4815cdff2a
--- /dev/null
+++ b/spec/build/bsps/arm/lpc24xx/bsplpc23xxtli800.yml
@@ -0,0 +1,21 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: lpc23xx_tli800
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: lpc24xx
+includes: []
+install: []
+links:
+- role: build-dependency
+ uid: grp
+- role: build-dependency
+ uid: tstlpc23xxtli800
+- role: build-dependency
+ uid: ../../opto2
+source: []
+type: build
diff --git a/spec/build/bsps/arm/lpc24xx/bsplpc24xxea.yml b/spec/build/bsps/arm/lpc24xx/bsplpc24xxea.yml
new file mode 100644
index 0000000000..8aa5210101
--- /dev/null
+++ b/spec/build/bsps/arm/lpc24xx/bsplpc24xxea.yml
@@ -0,0 +1,19 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: lpc24xx_ea
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: lpc24xx
+includes: []
+install: []
+links:
+- role: build-dependency
+ uid: grp
+- role: build-dependency
+ uid: ../../opto2
+source: []
+type: build
diff --git a/spec/build/bsps/arm/lpc24xx/bsplpc40xxearam.yml b/spec/build/bsps/arm/lpc24xx/bsplpc40xxearam.yml
new file mode 100644
index 0000000000..74dd4b4e0f
--- /dev/null
+++ b/spec/build/bsps/arm/lpc24xx/bsplpc40xxearam.yml
@@ -0,0 +1,19 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: lpc40xx_ea_ram
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: lpc24xx
+includes: []
+install: []
+links:
+- role: build-dependency
+ uid: grp
+- role: build-dependency
+ uid: ../../opto2
+source: []
+type: build
diff --git a/spec/build/bsps/arm/lpc24xx/bsplpc40xxearomint.yml b/spec/build/bsps/arm/lpc24xx/bsplpc40xxearomint.yml
new file mode 100644
index 0000000000..babf218f6d
--- /dev/null
+++ b/spec/build/bsps/arm/lpc24xx/bsplpc40xxearomint.yml
@@ -0,0 +1,21 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: lpc40xx_ea_rom_int
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: lpc24xx
+includes: []
+install: []
+links:
+- role: build-dependency
+ uid: grp
+- role: build-dependency
+ uid: tstlpc40xxearomint
+- role: build-dependency
+ uid: ../../opto2
+source: []
+type: build
diff --git a/spec/build/bsps/arm/lpc24xx/bspncsram.yml b/spec/build/bsps/arm/lpc24xx/bspncsram.yml
new file mode 100644
index 0000000000..f5fd8fb730
--- /dev/null
+++ b/spec/build/bsps/arm/lpc24xx/bspncsram.yml
@@ -0,0 +1,19 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: lpc24xx_ncs_ram
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: lpc24xx
+includes: []
+install: []
+links:
+- role: build-dependency
+ uid: grp
+- role: build-dependency
+ uid: ../../opto2
+source: []
+type: build
diff --git a/spec/build/bsps/arm/lpc24xx/bspncsromext.yml b/spec/build/bsps/arm/lpc24xx/bspncsromext.yml
new file mode 100644
index 0000000000..219538f4ba
--- /dev/null
+++ b/spec/build/bsps/arm/lpc24xx/bspncsromext.yml
@@ -0,0 +1,19 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: lpc24xx_ncs_rom_ext
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: lpc24xx
+includes: []
+install: []
+links:
+- role: build-dependency
+ uid: grp
+- role: build-dependency
+ uid: ../../opto2
+source: []
+type: build
diff --git a/spec/build/bsps/arm/lpc24xx/bspncsromint.yml b/spec/build/bsps/arm/lpc24xx/bspncsromint.yml
new file mode 100644
index 0000000000..ad3066f149
--- /dev/null
+++ b/spec/build/bsps/arm/lpc24xx/bspncsromint.yml
@@ -0,0 +1,21 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: lpc24xx_ncs_rom_int
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: lpc24xx
+includes: []
+install: []
+links:
+- role: build-dependency
+ uid: grp
+- role: build-dependency
+ uid: tstncsromint
+- role: build-dependency
+ uid: ../../opto2
+source: []
+type: build
diff --git a/spec/build/bsps/arm/lpc24xx/bspplx800ram.yml b/spec/build/bsps/arm/lpc24xx/bspplx800ram.yml
new file mode 100644
index 0000000000..1b67bf9030
--- /dev/null
+++ b/spec/build/bsps/arm/lpc24xx/bspplx800ram.yml
@@ -0,0 +1,19 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: lpc24xx_plx800_ram
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: lpc24xx
+includes: []
+install: []
+links:
+- role: build-dependency
+ uid: grp
+- role: build-dependency
+ uid: ../../opto2
+source: []
+type: build
diff --git a/spec/build/bsps/arm/lpc24xx/bspplx800romint.yml b/spec/build/bsps/arm/lpc24xx/bspplx800romint.yml
new file mode 100644
index 0000000000..d205aca3b3
--- /dev/null
+++ b/spec/build/bsps/arm/lpc24xx/bspplx800romint.yml
@@ -0,0 +1,21 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: lpc24xx_plx800_rom_int
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: lpc24xx
+includes: []
+install: []
+links:
+- role: build-dependency
+ uid: grp
+- role: build-dependency
+ uid: tstplx800romint
+- role: build-dependency
+ uid: ../../opto2
+source: []
+type: build
diff --git a/spec/build/bsps/arm/lpc24xx/grp.yml b/spec/build/bsps/arm/lpc24xx/grp.yml
new file mode 100644
index 0000000000..ba3d3df09d
--- /dev/null
+++ b/spec/build/bsps/arm/lpc24xx/grp.yml
@@ -0,0 +1,84 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: group
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+enabled-by: true
+includes: []
+install: []
+ldflags: []
+links:
+- role: build-dependency
+ uid: ../grp
+- role: build-dependency
+ uid: abi
+- role: build-dependency
+ uid: obj
+- role: build-dependency
+ uid: objnet
+- role: build-dependency
+ uid: optcclk
+- role: build-dependency
+ uid: optconcfg
+- role: build-dependency
+ uid: optdmachn
+- role: build-dependency
+ uid: optemcclkdiv
+- role: build-dependency
+ uid: optemcis42s32800b
+- role: build-dependency
+ uid: optemcis42s32800d7
+- role: build-dependency
+ uid: optemcm29w160e
+- role: build-dependency
+ uid: optemcm29w320e70
+- role: build-dependency
+ uid: optemcmt48lc4m16a2
+- role: build-dependency
+ uid: optemcsst39vf3201
+- role: build-dependency
+ uid: optemctest
+- role: build-dependency
+ uid: optemcw9825g2jb75i
+- role: build-dependency
+ uid: optethdownpin
+- role: build-dependency
+ uid: optethrmii
+- role: build-dependency
+ uid: optheapext
+- role: build-dependency
+ uid: optoscmain
+- role: build-dependency
+ uid: optoscrtc
+- role: build-dependency
+ uid: optotgi2c
+- role: build-dependency
+ uid: optpclkdiv
+- role: build-dependency
+ uid: optresetvec
+- role: build-dependency
+ uid: optstopeth
+- role: build-dependency
+ uid: optstopgpdma
+- role: build-dependency
+ uid: optstopusb
+- role: build-dependency
+ uid: optuart1cfg
+- role: build-dependency
+ uid: optuart2cfg
+- role: build-dependency
+ uid: optuart3cfg
+- role: build-dependency
+ uid: optuartbaud
+- role: build-dependency
+ uid: ../start
+- role: build-dependency
+ uid: ../../linkcmds
+- role: build-dependency
+ uid: ../../obj
+- role: build-dependency
+ uid: ../../objirq
+- role: build-dependency
+ uid: ../../bspopts
+type: build
+use-after: []
+use-before: []
diff --git a/spec/build/bsps/arm/lpc24xx/obj.yml b/spec/build/bsps/arm/lpc24xx/obj.yml
new file mode 100644
index 0000000000..43bdf40820
--- /dev/null
+++ b/spec/build/bsps/arm/lpc24xx/obj.yml
@@ -0,0 +1,90 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: objects
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+cxxflags: []
+enabled-by: true
+includes: []
+install:
+- destination: ${BSP_INCLUDEDIR}
+ source:
+ - bsps/arm/lpc24xx/include/bsp.h
+ - bsps/arm/lpc24xx/include/tm27.h
+- destination: ${BSP_INCLUDEDIR}/bsp
+ source:
+ - bsps/arm/lpc24xx/include/bsp/dma.h
+ - bsps/arm/lpc24xx/include/bsp/i2c.h
+ - bsps/arm/lpc24xx/include/bsp/io.h
+ - bsps/arm/lpc24xx/include/bsp/irq.h
+ - bsps/arm/lpc24xx/include/bsp/lcd.h
+ - bsps/arm/lpc24xx/include/bsp/lpc-clock-config.h
+ - bsps/arm/lpc24xx/include/bsp/lpc-ethernet-config.h
+ - bsps/arm/lpc24xx/include/bsp/lpc17xx.h
+ - bsps/arm/lpc24xx/include/bsp/lpc24xx.h
+ - bsps/arm/lpc24xx/include/bsp/ssp.h
+ - bsps/arm/lpc24xx/include/bsp/start-config.h
+ - bsps/arm/lpc24xx/include/bsp/system-clocks.h
+- destination: ${BSP_LIBDIR}
+ source:
+ - bsps/arm/lpc24xx/start/linkcmds.lpc17xx_ea_ram
+ - bsps/arm/lpc24xx/start/linkcmds.lpc17xx_ea_rom_int
+ - bsps/arm/lpc24xx/start/linkcmds.lpc17xx_plx800_ram
+ - bsps/arm/lpc24xx/start/linkcmds.lpc17xx_plx800_rom_int
+ - bsps/arm/lpc24xx/start/linkcmds.lpc2362
+ - bsps/arm/lpc24xx/start/linkcmds.lpc23xx_tli800
+ - bsps/arm/lpc24xx/start/linkcmds.lpc24xx_ea
+ - bsps/arm/lpc24xx/start/linkcmds.lpc24xx_ncs_ram
+ - bsps/arm/lpc24xx/start/linkcmds.lpc24xx_ncs_rom_ext
+ - bsps/arm/lpc24xx/start/linkcmds.lpc24xx_ncs_rom_int
+ - bsps/arm/lpc24xx/start/linkcmds.lpc24xx_plx800_ram
+ - bsps/arm/lpc24xx/start/linkcmds.lpc24xx_plx800_rom_int
+ - bsps/arm/lpc24xx/start/linkcmds.lpc40xx_ea_ram
+ - bsps/arm/lpc24xx/start/linkcmds.lpc40xx_ea_rom_int
+links: []
+source:
+- bsps/arm/lpc24xx/console/console-config.c
+- bsps/arm/lpc24xx/console/uart-probe-1.c
+- bsps/arm/lpc24xx/console/uart-probe-2.c
+- bsps/arm/lpc24xx/console/uart-probe-3.c
+- bsps/arm/lpc24xx/fb/lcd.c
+- bsps/arm/lpc24xx/i2c/i2c.c
+- bsps/arm/lpc24xx/irq/irq-dispatch.c
+- bsps/arm/lpc24xx/irq/irq.c
+- bsps/arm/lpc24xx/rtc/rtc-config.c
+- bsps/arm/lpc24xx/spi/ssp.c
+- bsps/arm/lpc24xx/start/bspidle.c
+- bsps/arm/lpc24xx/start/bspreset-armv4.c
+- bsps/arm/lpc24xx/start/bspstart.c
+- bsps/arm/lpc24xx/start/bspstarthooks.c
+- bsps/arm/lpc24xx/start/dma-copy.c
+- bsps/arm/lpc24xx/start/dma.c
+- bsps/arm/lpc24xx/start/fb-config.c
+- bsps/arm/lpc24xx/start/io.c
+- bsps/arm/lpc24xx/start/restart.c
+- bsps/arm/lpc24xx/start/start-config-emc-dynamic.c
+- bsps/arm/lpc24xx/start/start-config-emc-static.c
+- bsps/arm/lpc24xx/start/start-config-mpu.c
+- bsps/arm/lpc24xx/start/start-config-pinsel.c
+- bsps/arm/lpc24xx/start/system-clocks.c
+- bsps/arm/lpc24xx/start/timer.c
+- bsps/arm/shared/clock/clock-armv7m.c
+- bsps/arm/shared/clock/clock-nxp-lpc.c
+- bsps/arm/shared/fb/arm-pl111.c
+- bsps/arm/shared/irq/irq-armv7m.c
+- bsps/arm/shared/irq/irq-dispatch-armv7m.c
+- bsps/arm/shared/start/bsp-start-memcpy.S
+- bsps/arm/shared/start/bspreset-armv7m.c
+- bsps/shared/cache/nocache.c
+- bsps/shared/dev/getentropy/getentropy-cpucounter.c
+- bsps/shared/dev/rtc/rtc-support.c
+- bsps/shared/dev/serial/console-termios-init.c
+- bsps/shared/dev/serial/console-termios.c
+- bsps/shared/dev/serial/uart-output-char.c
+- bsps/shared/irq/irq-default-handler.c
+- bsps/shared/start/bspfatal-default.c
+- bsps/shared/start/bspgetworkarea-default.c
+- bsps/shared/start/sbrk.c
+- bsps/shared/start/stackalloc.c
+type: build
diff --git a/spec/build/bsps/arm/lpc24xx/objnet.yml b/spec/build/bsps/arm/lpc24xx/objnet.yml
new file mode 100644
index 0000000000..8534edceaf
--- /dev/null
+++ b/spec/build/bsps/arm/lpc24xx/objnet.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: objects
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+cxxflags: []
+enabled-by:
+- RTEMS_NETWORKING
+includes:
+- cpukit/libnetworking
+install: []
+links: []
+source:
+- bsps/arm/shared/net/lpc-ethernet.c
+type: build
diff --git a/spec/build/bsps/arm/lpc24xx/optcclk.yml b/spec/build/bsps/arm/lpc24xx/optcclk.yml
new file mode 100644
index 0000000000..aacf2192c2
--- /dev/null
+++ b/spec/build/bsps/arm/lpc24xx/optcclk.yml
@@ -0,0 +1,28 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 72000000
+default-by-variant:
+- value: 96000000
+ variants:
+ - arm/lpc17xx_ea.*
+- value: 96000000
+ variants:
+ - arm/lpc40xx_ea.*
+- value: 58982400
+ variants:
+ - arm/lpc23.*
+- value: 51612800
+ variants:
+ - arm/lpc24xx_plx800_.*
+description: |
+ CPU clock in Hz
+enabled-by: true
+format: '{}'
+links: []
+name: LPC24XX_CCLK
+type: build
diff --git a/spec/build/bsps/arm/lpc24xx/optconcfg.yml b/spec/build/bsps/arm/lpc24xx/optconcfg.yml
new file mode 100644
index 0000000000..4e09164cdf
--- /dev/null
+++ b/spec/build/bsps/arm/lpc24xx/optconcfg.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant: []
+description: |
+ configuration for console (UART 0)
+enabled-by: true
+links: []
+name: LPC24XX_CONFIG_CONSOLE
+type: build
diff --git a/spec/build/bsps/arm/lpc24xx/optdmachn.yml b/spec/build/bsps/arm/lpc24xx/optdmachn.yml
new file mode 100644
index 0000000000..1a67589bfc
--- /dev/null
+++ b/spec/build/bsps/arm/lpc24xx/optdmachn.yml
@@ -0,0 +1,22 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 2
+default-by-variant:
+- value: 8
+ variants:
+ - arm/lpc17.*
+- value: 8
+ variants:
+ - arm/lpc40.*
+description: |
+ DMA channel count
+enabled-by: true
+format: '{}'
+links: []
+name: LPC_DMA_CHANNEL_COUNT
+type: build
diff --git a/spec/build/bsps/arm/lpc24xx/optemcclkdiv.yml b/spec/build/bsps/arm/lpc24xx/optemcclkdiv.yml
new file mode 100644
index 0000000000..8851dadfa7
--- /dev/null
+++ b/spec/build/bsps/arm/lpc24xx/optemcclkdiv.yml
@@ -0,0 +1,22 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 1
+default-by-variant:
+- value: 2
+ variants:
+ - arm/lpc17xx_ea.*
+- value: 2
+ variants:
+ - arm/lpc40xx_ea.*
+description: |
+ clock divider for EMCCLK (EMCCLK = CCLK / EMCCLKDIV)
+enabled-by: true
+format: '{}'
+links: []
+name: LPC24XX_EMCCLKDIV
+type: build
diff --git a/spec/build/bsps/arm/lpc24xx/optemcis42s32800b.yml b/spec/build/bsps/arm/lpc24xx/optemcis42s32800b.yml
new file mode 100644
index 0000000000..de40eca73a
--- /dev/null
+++ b/spec/build/bsps/arm/lpc24xx/optemcis42s32800b.yml
@@ -0,0 +1,21 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant:
+- value: true
+ variants:
+ - arm/lpc17xx_ea_rom_.*
+- value: true
+ variants:
+ - arm/lpc40xx_ea_rom_.*
+description: |
+ enable ISSI IS42S32800B configuration for EMC
+enabled-by: true
+links: []
+name: LPC24XX_EMC_IS42S32800B
+type: build
diff --git a/spec/build/bsps/arm/lpc24xx/optemcis42s32800d7.yml b/spec/build/bsps/arm/lpc24xx/optemcis42s32800d7.yml
new file mode 100644
index 0000000000..e7ad228709
--- /dev/null
+++ b/spec/build/bsps/arm/lpc24xx/optemcis42s32800d7.yml
@@ -0,0 +1,18 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant:
+- value: true
+ variants:
+ - arm/.*_plx800_rom_.*
+description: |
+ enable ISSI IS42S32800D7 configuration for EMC
+enabled-by: true
+links: []
+name: LPC24XX_EMC_IS42S32800D7
+type: build
diff --git a/spec/build/bsps/arm/lpc24xx/optemcm29w160e.yml b/spec/build/bsps/arm/lpc24xx/optemcm29w160e.yml
new file mode 100644
index 0000000000..40a4bfbf71
--- /dev/null
+++ b/spec/build/bsps/arm/lpc24xx/optemcm29w160e.yml
@@ -0,0 +1,18 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant:
+- value: true
+ variants:
+ - arm/lpc24xx_ncs_rom_.*
+description: |
+ enable M29W160E configuration for EMC
+enabled-by: true
+links: []
+name: LPC24XX_EMC_M29W160E
+type: build
diff --git a/spec/build/bsps/arm/lpc24xx/optemcm29w320e70.yml b/spec/build/bsps/arm/lpc24xx/optemcm29w320e70.yml
new file mode 100644
index 0000000000..a32c1a3eb6
--- /dev/null
+++ b/spec/build/bsps/arm/lpc24xx/optemcm29w320e70.yml
@@ -0,0 +1,18 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant:
+- value: true
+ variants:
+ - arm/.*_plx800_rom_.*
+description: |
+ enable M29W320E70 configuration for EMC
+enabled-by: true
+links: []
+name: LPC24XX_EMC_M29W320E70
+type: build
diff --git a/spec/build/bsps/arm/lpc24xx/optemcmt48lc4m16a2.yml b/spec/build/bsps/arm/lpc24xx/optemcmt48lc4m16a2.yml
new file mode 100644
index 0000000000..ab6f25fef8
--- /dev/null
+++ b/spec/build/bsps/arm/lpc24xx/optemcmt48lc4m16a2.yml
@@ -0,0 +1,18 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant:
+- value: true
+ variants:
+ - arm/lpc24xx_ncs_rom_.*
+description: |
+ enable Micron MT48LC4M16A2 configuration for EMC
+enabled-by: true
+links: []
+name: LPC24XX_EMC_MT48LC4M16A2
+type: build
diff --git a/spec/build/bsps/arm/lpc24xx/optemcsst39vf3201.yml b/spec/build/bsps/arm/lpc24xx/optemcsst39vf3201.yml
new file mode 100644
index 0000000000..851c28a275
--- /dev/null
+++ b/spec/build/bsps/arm/lpc24xx/optemcsst39vf3201.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant: []
+description: |
+ enable SST39VF3201 configuration for EMC
+enabled-by: true
+links: []
+name: LPC24XX_EMC_SST39VF3201
+type: build
diff --git a/spec/build/bsps/arm/lpc24xx/optemctest.yml b/spec/build/bsps/arm/lpc24xx/optemctest.yml
new file mode 100644
index 0000000000..4153bd2664
--- /dev/null
+++ b/spec/build/bsps/arm/lpc24xx/optemctest.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant: []
+description: |
+ enable tests for EMC
+enabled-by: true
+links: []
+name: LPC24XX_EMC_TEST
+type: build
diff --git a/spec/build/bsps/arm/lpc24xx/optemcw9825g2jb75i.yml b/spec/build/bsps/arm/lpc24xx/optemcw9825g2jb75i.yml
new file mode 100644
index 0000000000..2be3f76372
--- /dev/null
+++ b/spec/build/bsps/arm/lpc24xx/optemcw9825g2jb75i.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant: []
+description: |
+ enable Winbond W9825G2JB75I configuration for EMC
+enabled-by: true
+links: []
+name: LPC24XX_EMC_W9825G2JB75I
+type: build
diff --git a/spec/build/bsps/arm/lpc24xx/optethdownpin.yml b/spec/build/bsps/arm/lpc24xx/optethdownpin.yml
new file mode 100644
index 0000000000..c3889b0eea
--- /dev/null
+++ b/spec/build/bsps/arm/lpc24xx/optethdownpin.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant: []
+description: |
+ optional Ethernet power-down pin, output is set to high to enable power
+enabled-by: true
+links: []
+name: LPC24XX_PIN_ETHERNET_POWER_DOWN
+type: build
diff --git a/spec/build/bsps/arm/lpc24xx/optethrmii.yml b/spec/build/bsps/arm/lpc24xx/optethrmii.yml
new file mode 100644
index 0000000000..c7c3627c82
--- /dev/null
+++ b/spec/build/bsps/arm/lpc24xx/optethrmii.yml
@@ -0,0 +1,18 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant:
+- value: true
+ variants:
+ - arm/.*_ea_.*
+description: |
+ enable RMII for Ethernet
+enabled-by: true
+links: []
+name: LPC24XX_ETHERNET_RMII
+type: build
diff --git a/spec/build/bsps/arm/lpc24xx/optheapext.yml b/spec/build/bsps/arm/lpc24xx/optheapext.yml
new file mode 100644
index 0000000000..b485eb6cc3
--- /dev/null
+++ b/spec/build/bsps/arm/lpc24xx/optheapext.yml
@@ -0,0 +1,18 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant:
+- value: true
+ variants:
+ - arm/lpc23.*
+description: |
+ enable heap extend by Ethernet and USB regions
+enabled-by: true
+links: []
+name: LPC24XX_HEAP_EXTEND
+type: build
diff --git a/spec/build/bsps/arm/lpc24xx/optoscmain.yml b/spec/build/bsps/arm/lpc24xx/optoscmain.yml
new file mode 100644
index 0000000000..ec529345a1
--- /dev/null
+++ b/spec/build/bsps/arm/lpc24xx/optoscmain.yml
@@ -0,0 +1,19 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 12000000
+default-by-variant:
+- value: 3686400
+ variants:
+ - arm/lpc23.*
+description: |
+ main oscillator frequency in Hz
+enabled-by: true
+format: '{}'
+links: []
+name: LPC24XX_OSCILLATOR_MAIN
+type: build
diff --git a/spec/build/bsps/arm/lpc24xx/optoscrtc.yml b/spec/build/bsps/arm/lpc24xx/optoscrtc.yml
new file mode 100644
index 0000000000..0b66f8a553
--- /dev/null
+++ b/spec/build/bsps/arm/lpc24xx/optoscrtc.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 32768
+default-by-variant: []
+description: |
+ RTC oscillator frequency in Hz
+enabled-by: true
+format: '{}'
+links: []
+name: LPC24XX_OSCILLATOR_RTC
+type: build
diff --git a/spec/build/bsps/arm/lpc24xx/optotgi2c.yml b/spec/build/bsps/arm/lpc24xx/optotgi2c.yml
new file mode 100644
index 0000000000..4e205cb0af
--- /dev/null
+++ b/spec/build/bsps/arm/lpc24xx/optotgi2c.yml
@@ -0,0 +1,22 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 0
+default-by-variant:
+- value: 94
+ variants:
+ - arm/lpc17xx_ea.*
+- value: 94
+ variants:
+ - arm/lpc40xx_ea.*
+description: |
+ USB OTG transceiver I2C address used by USB stack
+enabled-by: true
+format: '{:#010x}'
+links: []
+name: BSP_USB_OTG_TRANSCEIVER_I2C_ADDR
+type: build
diff --git a/spec/build/bsps/arm/lpc24xx/optpclkdiv.yml b/spec/build/bsps/arm/lpc24xx/optpclkdiv.yml
new file mode 100644
index 0000000000..296486c78f
--- /dev/null
+++ b/spec/build/bsps/arm/lpc24xx/optpclkdiv.yml
@@ -0,0 +1,22 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 1
+default-by-variant:
+- value: 2
+ variants:
+ - arm/lpc17xx_ea.*
+- value: 2
+ variants:
+ - arm/lpc40xx_ea.*
+description: |
+ clock divider for default PCLK (PCLK = CCLK / PCLKDIV)
+enabled-by: true
+format: '{}'
+links: []
+name: LPC24XX_PCLKDIV
+type: build
diff --git a/spec/build/bsps/arm/lpc24xx/optresetvec.yml b/spec/build/bsps/arm/lpc24xx/optresetvec.yml
new file mode 100644
index 0000000000..a73530db7b
--- /dev/null
+++ b/spec/build/bsps/arm/lpc24xx/optresetvec.yml
@@ -0,0 +1,19 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 0
+default-by-variant:
+- value: 2147483712
+ variants:
+ - arm/lpc24xx_ncs_rom_ext
+description: |
+ reset vector address for BSP start
+enabled-by: true
+format: '{:#010x}'
+links: []
+name: BSP_START_RESET_VECTOR
+type: build
diff --git a/spec/build/bsps/arm/lpc24xx/optstopeth.yml b/spec/build/bsps/arm/lpc24xx/optstopeth.yml
new file mode 100644
index 0000000000..60f07f9a06
--- /dev/null
+++ b/spec/build/bsps/arm/lpc24xx/optstopeth.yml
@@ -0,0 +1,18 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant:
+- value: false
+ variants:
+ - arm/lpc23.*
+description: |
+ stop Ethernet controller at start-up to avoid DMA interference
+enabled-by: true
+links: []
+name: LPC24XX_STOP_ETHERNET
+type: build
diff --git a/spec/build/bsps/arm/lpc24xx/optstopgpdma.yml b/spec/build/bsps/arm/lpc24xx/optstopgpdma.yml
new file mode 100644
index 0000000000..5705cc03ef
--- /dev/null
+++ b/spec/build/bsps/arm/lpc24xx/optstopgpdma.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+ stop general purpose DMA at start-up to avoid DMA interference
+enabled-by: true
+links: []
+name: LPC24XX_STOP_GPDMA
+type: build
diff --git a/spec/build/bsps/arm/lpc24xx/optstopusb.yml b/spec/build/bsps/arm/lpc24xx/optstopusb.yml
new file mode 100644
index 0000000000..2f2bfc5c93
--- /dev/null
+++ b/spec/build/bsps/arm/lpc24xx/optstopusb.yml
@@ -0,0 +1,18 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant:
+- value: false
+ variants:
+ - arm/lpc23.*
+description: |
+ stop USB controller at start-up to avoid DMA interference
+enabled-by: true
+links: []
+name: LPC24XX_STOP_USB
+type: build
diff --git a/spec/build/bsps/arm/lpc24xx/optuart1cfg.yml b/spec/build/bsps/arm/lpc24xx/optuart1cfg.yml
new file mode 100644
index 0000000000..c1f133f08f
--- /dev/null
+++ b/spec/build/bsps/arm/lpc24xx/optuart1cfg.yml
@@ -0,0 +1,18 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant:
+- value: false
+ variants:
+ - arm/.*_plx800_.*
+description: |
+ configuration for UART 1
+enabled-by: true
+links: []
+name: LPC24XX_CONFIG_UART_1
+type: build
diff --git a/spec/build/bsps/arm/lpc24xx/optuart2cfg.yml b/spec/build/bsps/arm/lpc24xx/optuart2cfg.yml
new file mode 100644
index 0000000000..3e523147ca
--- /dev/null
+++ b/spec/build/bsps/arm/lpc24xx/optuart2cfg.yml
@@ -0,0 +1,24 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant:
+- value: false
+ variants:
+ - arm/lpc23.*
+- value: false
+ variants:
+ - arm/lpc24xx_ncs_.*
+- value: false
+ variants:
+ - arm/.*_plx800_.*
+description: |
+ configuration for UART 2
+enabled-by: true
+links: []
+name: LPC24XX_CONFIG_UART_2
+type: build
diff --git a/spec/build/bsps/arm/lpc24xx/optuart3cfg.yml b/spec/build/bsps/arm/lpc24xx/optuart3cfg.yml
new file mode 100644
index 0000000000..2af84c927d
--- /dev/null
+++ b/spec/build/bsps/arm/lpc24xx/optuart3cfg.yml
@@ -0,0 +1,21 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant:
+- value: false
+ variants:
+ - arm/lpc23.*
+- value: false
+ variants:
+ - arm/lpc24xx_ncs_.*
+description: |
+ configuration for UART 3
+enabled-by: true
+links: []
+name: LPC24XX_CONFIG_UART_3
+type: build
diff --git a/spec/build/bsps/arm/lpc24xx/optuartbaud.yml b/spec/build/bsps/arm/lpc24xx/optuartbaud.yml
new file mode 100644
index 0000000000..e772d71381
--- /dev/null
+++ b/spec/build/bsps/arm/lpc24xx/optuartbaud.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 115200
+default-by-variant: []
+description: |
+ baud for UARTs
+enabled-by: true
+format: '{}'
+links: []
+name: LPC24XX_UART_BAUD
+type: build
diff --git a/spec/build/bsps/arm/lpc24xx/tstlpc17xxearomint.yml b/spec/build/bsps/arm/lpc24xx/tstlpc17xxearomint.yml
new file mode 100644
index 0000000000..7d60bda27a
--- /dev/null
+++ b/spec/build/bsps/arm/lpc24xx/tstlpc17xxearomint.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- set-test-state:
+ fsdosfsname01: exclude
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: null
+default-by-variant: []
+description: ''
+enabled-by: true
+links:
+- role: build-dependency
+ uid: ../../tstnoiconv
+type: build
diff --git a/spec/build/bsps/arm/lpc24xx/tstlpc17xxplx800romint.yml b/spec/build/bsps/arm/lpc24xx/tstlpc17xxplx800romint.yml
new file mode 100644
index 0000000000..7d60bda27a
--- /dev/null
+++ b/spec/build/bsps/arm/lpc24xx/tstlpc17xxplx800romint.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- set-test-state:
+ fsdosfsname01: exclude
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: null
+default-by-variant: []
+description: ''
+enabled-by: true
+links:
+- role: build-dependency
+ uid: ../../tstnoiconv
+type: build
diff --git a/spec/build/bsps/arm/lpc24xx/tstlpc2362.yml b/spec/build/bsps/arm/lpc24xx/tstlpc2362.yml
new file mode 100644
index 0000000000..da7d418688
--- /dev/null
+++ b/spec/build/bsps/arm/lpc24xx/tstlpc2362.yml
@@ -0,0 +1,55 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- set-test-state:
+ block08: exclude
+ capture: exclude
+ cdtest: exclude
+ fileio: exclude
+ fsdosfsformat01: exclude
+ fsrfsbitmap01: exclude
+ fsrofs01: exclude
+ ftp01: exclude
+ iostream: exclude
+ loopback: exclude
+ math: exclude
+ mdosfsfserror: exclude
+ mdosfsfsrdwr: exclude
+ mghttpd01: exclude
+ monitor02: exclude
+ paranoia: exclude
+ pppd: exclude
+ psxaio01: exclude
+ psxaio02: exclude
+ psxaio03: exclude
+ psxsignal07: exclude
+ record01: exclude
+ rtems: exclude
+ shell01: exclude
+ sp16: exclude
+ sp25: exclude
+ sp42: exclude
+ sp48: exclude
+ spcxx01: exclude
+ sptimecounter02: exclude
+ sptimecounter03: exclude
+ sptls02: exclude
+ syscall01: exclude
+ telnetd01: exclude
+ tmcontext01: exclude
+ tmfine01: exclude
+ top: exclude
+ ttest01: exclude
+ utf8proc01: exclude
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: null
+default-by-variant: []
+description: ''
+enabled-by: true
+links:
+- role: build-dependency
+ uid: ../../tstnorfs
+- role: build-dependency
+ uid: ../../tstsmallmem
+type: build
diff --git a/spec/build/bsps/arm/lpc24xx/tstlpc23xxtli800.yml b/spec/build/bsps/arm/lpc24xx/tstlpc23xxtli800.yml
new file mode 100644
index 0000000000..97a1aa3b43
--- /dev/null
+++ b/spec/build/bsps/arm/lpc24xx/tstlpc23xxtli800.yml
@@ -0,0 +1,66 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- set-test-state:
+ block08: exclude
+ capture: exclude
+ cdtest: exclude
+ complex: exclude
+ crypt01: exclude
+ fileio: exclude
+ fsdosfsformat01: exclude
+ fsdosfswrite01: exclude
+ fsrfsbitmap01: exclude
+ fsrofs01: exclude
+ ftp01: exclude
+ iostream: exclude
+ loopback: exclude
+ math: exclude
+ mathf: exclude
+ mdosfsfserror: exclude
+ mdosfsfspatheval: exclude
+ mdosfsfsrdwr: exclude
+ mdosfsfsscandir01: exclude
+ mdosfsfstime: exclude
+ mghttpd01: exclude
+ monitor: exclude
+ monitor02: exclude
+ paranoia: exclude
+ pppd: exclude
+ psxaio01: exclude
+ psxaio02: exclude
+ psxaio03: exclude
+ psxmsgq01: exclude
+ psxsignal07: exclude
+ record01: exclude
+ rtems: exclude
+ shell01: exclude
+ sp16: exclude
+ sp25: exclude
+ sp42: exclude
+ sp48: exclude
+ spcxx01: exclude
+ sptimecounter02: exclude
+ sptimecounter03: exclude
+ sptls02: exclude
+ syscall01: exclude
+ tar01: exclude
+ telnetd01: exclude
+ termios: exclude
+ tmcontext01: exclude
+ tmfine01: exclude
+ top: exclude
+ ttest01: exclude
+ utf8proc01: exclude
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: null
+default-by-variant: []
+description: ''
+enabled-by: true
+links:
+- role: build-dependency
+ uid: ../../tstnorfs
+- role: build-dependency
+ uid: ../../tstsmallmem
+type: build
diff --git a/spec/build/bsps/arm/lpc24xx/tstlpc40xxearomint.yml b/spec/build/bsps/arm/lpc24xx/tstlpc40xxearomint.yml
new file mode 100644
index 0000000000..7d60bda27a
--- /dev/null
+++ b/spec/build/bsps/arm/lpc24xx/tstlpc40xxearomint.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- set-test-state:
+ fsdosfsname01: exclude
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: null
+default-by-variant: []
+description: ''
+enabled-by: true
+links:
+- role: build-dependency
+ uid: ../../tstnoiconv
+type: build
diff --git a/spec/build/bsps/arm/lpc24xx/tstncsromint.yml b/spec/build/bsps/arm/lpc24xx/tstncsromint.yml
new file mode 100644
index 0000000000..7d60bda27a
--- /dev/null
+++ b/spec/build/bsps/arm/lpc24xx/tstncsromint.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- set-test-state:
+ fsdosfsname01: exclude
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: null
+default-by-variant: []
+description: ''
+enabled-by: true
+links:
+- role: build-dependency
+ uid: ../../tstnoiconv
+type: build
diff --git a/spec/build/bsps/arm/lpc24xx/tstplx800romint.yml b/spec/build/bsps/arm/lpc24xx/tstplx800romint.yml
new file mode 100644
index 0000000000..7d60bda27a
--- /dev/null
+++ b/spec/build/bsps/arm/lpc24xx/tstplx800romint.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- set-test-state:
+ fsdosfsname01: exclude
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: null
+default-by-variant: []
+description: ''
+enabled-by: true
+links:
+- role: build-dependency
+ uid: ../../tstnoiconv
+type: build
diff --git a/spec/build/bsps/arm/lpc32xx/abi.yml b/spec/build/bsps/arm/lpc32xx/abi.yml
new file mode 100644
index 0000000000..ae245b4eb0
--- /dev/null
+++ b/spec/build/bsps/arm/lpc32xx/abi.yml
@@ -0,0 +1,18 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-string: null
+- split: null
+- env-append: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default:
+- -mcpu=arm926ej-s
+- -mthumb
+default-by-variant: []
+description: |
+ ABI flags
+enabled-by: true
+links: []
+name: ABI_FLAGS
+type: build
diff --git a/spec/build/bsps/arm/lpc32xx/bsplpc32xxmzx.yml b/spec/build/bsps/arm/lpc32xx/bsplpc32xxmzx.yml
new file mode 100644
index 0000000000..9a9762dd5d
--- /dev/null
+++ b/spec/build/bsps/arm/lpc32xx/bsplpc32xxmzx.yml
@@ -0,0 +1,19 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: lpc32xx_mzx
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: lpc32xx
+includes: []
+install: []
+links:
+- role: build-dependency
+ uid: grp
+- role: build-dependency
+ uid: ../../opto2
+source: []
+type: build
diff --git a/spec/build/bsps/arm/lpc32xx/bspmzxstage1.yml b/spec/build/bsps/arm/lpc32xx/bspmzxstage1.yml
new file mode 100644
index 0000000000..09a70a0654
--- /dev/null
+++ b/spec/build/bsps/arm/lpc32xx/bspmzxstage1.yml
@@ -0,0 +1,21 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: lpc32xx_mzx_stage_1
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: lpc32xx
+includes: []
+install: []
+links:
+- role: build-dependency
+ uid: grp
+- role: build-dependency
+ uid: tstmzxstage1
+- role: build-dependency
+ uid: ../../opto2
+source: []
+type: build
diff --git a/spec/build/bsps/arm/lpc32xx/bspmzxstage2.yml b/spec/build/bsps/arm/lpc32xx/bspmzxstage2.yml
new file mode 100644
index 0000000000..ff709b0bc3
--- /dev/null
+++ b/spec/build/bsps/arm/lpc32xx/bspmzxstage2.yml
@@ -0,0 +1,19 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: lpc32xx_mzx_stage_2
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: lpc32xx
+includes: []
+install: []
+links:
+- role: build-dependency
+ uid: grp
+- role: build-dependency
+ uid: ../../opto2
+source: []
+type: build
diff --git a/spec/build/bsps/arm/lpc32xx/bspphycore.yml b/spec/build/bsps/arm/lpc32xx/bspphycore.yml
new file mode 100644
index 0000000000..74396727d6
--- /dev/null
+++ b/spec/build/bsps/arm/lpc32xx/bspphycore.yml
@@ -0,0 +1,19 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: lpc32xx_phycore
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: lpc32xx
+includes: []
+install: []
+links:
+- role: build-dependency
+ uid: grp
+- role: build-dependency
+ uid: ../../opto2
+source: []
+type: build
diff --git a/spec/build/bsps/arm/lpc32xx/grp.yml b/spec/build/bsps/arm/lpc32xx/grp.yml
new file mode 100644
index 0000000000..510909428c
--- /dev/null
+++ b/spec/build/bsps/arm/lpc32xx/grp.yml
@@ -0,0 +1,84 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: group
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+enabled-by: true
+includes: []
+install: []
+ldflags: []
+links:
+- role: build-dependency
+ uid: ../grp
+- role: build-dependency
+ uid: abi
+- role: build-dependency
+ uid: obj
+- role: build-dependency
+ uid: objnet
+- role: build-dependency
+ uid: optdismmu
+- role: build-dependency
+ uid: optdisroprot
+- role: build-dependency
+ uid: optdisrwdc
+- role: build-dependency
+ uid: optdmachn
+- role: build-dependency
+ uid: optenwdgrst
+- role: build-dependency
+ uid: optethrmii
+- role: build-dependency
+ uid: optoscmain
+- role: build-dependency
+ uid: optoscrtc
+- role: build-dependency
+ uid: optotgi2c
+- role: build-dependency
+ uid: optotgvbus
+- role: build-dependency
+ uid: optperiphclk
+- role: build-dependency
+ uid: optresetvec
+- role: build-dependency
+ uid: optscratchsz
+- role: build-dependency
+ uid: optstopeth
+- role: build-dependency
+ uid: optstopgpdma
+- role: build-dependency
+ uid: optstopusb
+- role: build-dependency
+ uid: optu3clk
+- role: build-dependency
+ uid: optu4clk
+- role: build-dependency
+ uid: optu5clk
+- role: build-dependency
+ uid: optu6clk
+- role: build-dependency
+ uid: optuart1baud
+- role: build-dependency
+ uid: optuart2baud
+- role: build-dependency
+ uid: optuart3baud
+- role: build-dependency
+ uid: optuart4baud
+- role: build-dependency
+ uid: optuart5baud
+- role: build-dependency
+ uid: optuart6baud
+- role: build-dependency
+ uid: optuart7baud
+- role: build-dependency
+ uid: ../start
+- role: build-dependency
+ uid: ../../linkcmds
+- role: build-dependency
+ uid: ../../obj
+- role: build-dependency
+ uid: ../../objirq
+- role: build-dependency
+ uid: ../../bspopts
+type: build
+use-after: []
+use-before: []
diff --git a/spec/build/bsps/arm/lpc32xx/obj.yml b/spec/build/bsps/arm/lpc32xx/obj.yml
new file mode 100644
index 0000000000..70ee86302c
--- /dev/null
+++ b/spec/build/bsps/arm/lpc32xx/obj.yml
@@ -0,0 +1,69 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: objects
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+cxxflags: []
+enabled-by: true
+includes: []
+install:
+- destination: ${BSP_INCLUDEDIR}
+ source:
+ - bsps/arm/lpc32xx/include/bsp.h
+ - bsps/arm/lpc32xx/include/tm27.h
+- destination: ${BSP_INCLUDEDIR}/bsp
+ source:
+ - bsps/arm/lpc32xx/include/bsp/boot.h
+ - bsps/arm/lpc32xx/include/bsp/emc.h
+ - bsps/arm/lpc32xx/include/bsp/hsu.h
+ - bsps/arm/lpc32xx/include/bsp/i2c.h
+ - bsps/arm/lpc32xx/include/bsp/irq.h
+ - bsps/arm/lpc32xx/include/bsp/lpc-clock-config.h
+ - bsps/arm/lpc32xx/include/bsp/lpc-ethernet-config.h
+ - bsps/arm/lpc32xx/include/bsp/lpc32xx.h
+ - bsps/arm/lpc32xx/include/bsp/mmu.h
+ - bsps/arm/lpc32xx/include/bsp/nand-mlc.h
+- destination: ${BSP_LIBDIR}
+ source:
+ - bsps/arm/lpc32xx/start/linkcmds.lpc32xx
+ - bsps/arm/lpc32xx/start/linkcmds.lpc32xx_mzx
+ - bsps/arm/lpc32xx/start/linkcmds.lpc32xx_mzx_stage_1
+ - bsps/arm/lpc32xx/start/linkcmds.lpc32xx_mzx_stage_2
+ - bsps/arm/lpc32xx/start/linkcmds.lpc32xx_phycore
+links: []
+source:
+- bsps/arm/lpc32xx/console/console-config.c
+- bsps/arm/lpc32xx/console/hsu.c
+- bsps/arm/lpc32xx/i2c/i2c.c
+- bsps/arm/lpc32xx/irq/irq.c
+- bsps/arm/lpc32xx/nand/nand-mlc-erase-block-safe.c
+- bsps/arm/lpc32xx/nand/nand-mlc-read-blocks.c
+- bsps/arm/lpc32xx/nand/nand-mlc-write-blocks.c
+- bsps/arm/lpc32xx/nand/nand-mlc.c
+- bsps/arm/lpc32xx/nand/nand-select.c
+- bsps/arm/lpc32xx/rtc/rtc-config.c
+- bsps/arm/lpc32xx/start/boot.c
+- bsps/arm/lpc32xx/start/bspidle.c
+- bsps/arm/lpc32xx/start/bspreset.c
+- bsps/arm/lpc32xx/start/bspstart.c
+- bsps/arm/lpc32xx/start/bspstarthooks.c
+- bsps/arm/lpc32xx/start/emc.c
+- bsps/arm/lpc32xx/start/restart.c
+- bsps/arm/lpc32xx/start/system-clocks.c
+- bsps/arm/lpc32xx/start/timer.c
+- bsps/arm/shared/cache/cache-cp15.c
+- bsps/arm/shared/clock/clock-nxp-lpc.c
+- bsps/arm/shared/cp15/arm-cp15-set-ttb-entries.c
+- bsps/arm/shared/start/bsp-start-memcpy.S
+- bsps/shared/dev/getentropy/getentropy-cpucounter.c
+- bsps/shared/dev/rtc/rtc-support.c
+- bsps/shared/dev/serial/console-termios-init.c
+- bsps/shared/dev/serial/console-termios.c
+- bsps/shared/dev/serial/uart-output-char.c
+- bsps/shared/irq/irq-default-handler.c
+- bsps/shared/start/bspfatal-default.c
+- bsps/shared/start/bspgetworkarea-default.c
+- bsps/shared/start/sbrk.c
+- bsps/shared/start/stackalloc.c
+type: build
diff --git a/spec/build/bsps/arm/lpc32xx/objnet.yml b/spec/build/bsps/arm/lpc32xx/objnet.yml
new file mode 100644
index 0000000000..8534edceaf
--- /dev/null
+++ b/spec/build/bsps/arm/lpc32xx/objnet.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: objects
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+cxxflags: []
+enabled-by:
+- RTEMS_NETWORKING
+includes:
+- cpukit/libnetworking
+install: []
+links: []
+source:
+- bsps/arm/shared/net/lpc-ethernet.c
+type: build
diff --git a/spec/build/bsps/arm/lpc32xx/optdismmu.yml b/spec/build/bsps/arm/lpc32xx/optdismmu.yml
new file mode 100644
index 0000000000..b431f04841
--- /dev/null
+++ b/spec/build/bsps/arm/lpc32xx/optdismmu.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant: []
+description: |
+ disable MMU
+enabled-by: true
+links: []
+name: LPC32XX_DISABLE_MMU
+type: build
diff --git a/spec/build/bsps/arm/lpc32xx/optdisroprot.yml b/spec/build/bsps/arm/lpc32xx/optdisroprot.yml
new file mode 100644
index 0000000000..5ce23607b8
--- /dev/null
+++ b/spec/build/bsps/arm/lpc32xx/optdisroprot.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant: []
+description: |
+ disable MMU protection of read-only sections
+enabled-by: true
+links: []
+name: LPC32XX_DISABLE_READ_ONLY_PROTECTION
+type: build
diff --git a/spec/build/bsps/arm/lpc32xx/optdisrwdc.yml b/spec/build/bsps/arm/lpc32xx/optdisrwdc.yml
new file mode 100644
index 0000000000..55765c3e8e
--- /dev/null
+++ b/spec/build/bsps/arm/lpc32xx/optdisrwdc.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant: []
+description: |
+ disable cache for read-write data sections
+enabled-by: true
+links: []
+name: LPC32XX_DISABLE_READ_WRITE_DATA_CACHE
+type: build
diff --git a/spec/build/bsps/arm/lpc32xx/optdmachn.yml b/spec/build/bsps/arm/lpc32xx/optdmachn.yml
new file mode 100644
index 0000000000..4c826a5f01
--- /dev/null
+++ b/spec/build/bsps/arm/lpc32xx/optdmachn.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 8
+default-by-variant: []
+description: |
+ DMA channel count
+enabled-by: true
+format: '{}'
+links: []
+name: LPC_DMA_CHANNEL_COUNT
+type: build
diff --git a/spec/build/bsps/arm/lpc32xx/optenwdgrst.yml b/spec/build/bsps/arm/lpc32xx/optenwdgrst.yml
new file mode 100644
index 0000000000..d36a5c0398
--- /dev/null
+++ b/spec/build/bsps/arm/lpc32xx/optenwdgrst.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+ bsp_reset() will use the watchdog to reset the chip
+enabled-by: true
+links: []
+name: LPC32XX_ENABLE_WATCHDOG_RESET
+type: build
diff --git a/spec/build/bsps/arm/lpc32xx/optethrmii.yml b/spec/build/bsps/arm/lpc32xx/optethrmii.yml
new file mode 100644
index 0000000000..ccb4c95abc
--- /dev/null
+++ b/spec/build/bsps/arm/lpc32xx/optethrmii.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+ enable RMII for Ethernet
+enabled-by: true
+links: []
+name: LPC32XX_ETHERNET_RMII
+type: build
diff --git a/spec/build/bsps/arm/lpc32xx/optoscmain.yml b/spec/build/bsps/arm/lpc32xx/optoscmain.yml
new file mode 100644
index 0000000000..aadb9b6799
--- /dev/null
+++ b/spec/build/bsps/arm/lpc32xx/optoscmain.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 13000000
+default-by-variant: []
+description: |
+ main oscillator frequency in Hz
+enabled-by: true
+format: '{}'
+links: []
+name: LPC32XX_OSCILLATOR_MAIN
+type: build
diff --git a/spec/build/bsps/arm/lpc32xx/optoscrtc.yml b/spec/build/bsps/arm/lpc32xx/optoscrtc.yml
new file mode 100644
index 0000000000..09aab2d9c6
--- /dev/null
+++ b/spec/build/bsps/arm/lpc32xx/optoscrtc.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 32768
+default-by-variant: []
+description: |
+ RTC oscillator frequency in Hz
+enabled-by: true
+format: '{}'
+links: []
+name: LPC32XX_OSCILLATOR_RTC
+type: build
diff --git a/spec/build/bsps/arm/lpc32xx/optotgi2c.yml b/spec/build/bsps/arm/lpc32xx/optotgi2c.yml
new file mode 100644
index 0000000000..72137d9c27
--- /dev/null
+++ b/spec/build/bsps/arm/lpc32xx/optotgi2c.yml
@@ -0,0 +1,19 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 0
+default-by-variant:
+- value: 88
+ variants:
+ - arm/lpc32xx_mzx.*
+description: |
+ USB OTG transceiver I2C address used by USB stack
+enabled-by: true
+format: '{:#010x}'
+links: []
+name: BSP_USB_OTG_TRANSCEIVER_I2C_ADDR
+type: build
diff --git a/spec/build/bsps/arm/lpc32xx/optotgvbus.yml b/spec/build/bsps/arm/lpc32xx/optotgvbus.yml
new file mode 100644
index 0000000000..0d9d6b65f5
--- /dev/null
+++ b/spec/build/bsps/arm/lpc32xx/optotgvbus.yml
@@ -0,0 +1,19 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-string: null
+- define-unquoted: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant:
+- value: USB_OTG_VBUS_POWER_WITH_CHARGE_PUMP
+ variants:
+ - arm/lpc32xx_mzx.*
+description: |
+ USB OTG transceiver VBUS policy
+enabled-by: true
+format: '{}'
+links: []
+name: BSP_USB_OTG_TRANSCEIVER_VBUS
+type: build
diff --git a/spec/build/bsps/arm/lpc32xx/optperiphclk.yml b/spec/build/bsps/arm/lpc32xx/optperiphclk.yml
new file mode 100644
index 0000000000..70be8d51bf
--- /dev/null
+++ b/spec/build/bsps/arm/lpc32xx/optperiphclk.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 13000000
+default-by-variant: []
+description: |
+ peripheral clock in Hz
+enabled-by: true
+format: '{}'
+links: []
+name: LPC32XX_PERIPH_CLK
+type: build
diff --git a/spec/build/bsps/arm/lpc32xx/optresetvec.yml b/spec/build/bsps/arm/lpc32xx/optresetvec.yml
new file mode 100644
index 0000000000..efd1ea2b2a
--- /dev/null
+++ b/spec/build/bsps/arm/lpc32xx/optresetvec.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant: []
+description: |
+ reset vector address for BSP start
+enabled-by: true
+links: []
+name: BSP_START_RESET_VECTOR
+type: build
diff --git a/spec/build/bsps/arm/lpc32xx/optscratchsz.yml b/spec/build/bsps/arm/lpc32xx/optscratchsz.yml
new file mode 100644
index 0000000000..c54f1ae7b3
--- /dev/null
+++ b/spec/build/bsps/arm/lpc32xx/optscratchsz.yml
@@ -0,0 +1,19 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 0
+default-by-variant:
+- value: 4096
+ variants:
+ - arm/lpc32xx_mzx.*
+description: |
+ size of scratch area
+enabled-by: true
+format: '{}'
+links: []
+name: LPC32XX_SCRATCH_AREA_SIZE
+type: build
diff --git a/spec/build/bsps/arm/lpc32xx/optstopeth.yml b/spec/build/bsps/arm/lpc32xx/optstopeth.yml
new file mode 100644
index 0000000000..2d430a1862
--- /dev/null
+++ b/spec/build/bsps/arm/lpc32xx/optstopeth.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+ stop Ethernet controller at start-up to avoid DMA interference
+enabled-by: true
+links: []
+name: LPC32XX_STOP_ETHERNET
+type: build
diff --git a/spec/build/bsps/arm/lpc32xx/optstopgpdma.yml b/spec/build/bsps/arm/lpc32xx/optstopgpdma.yml
new file mode 100644
index 0000000000..5096cc48a9
--- /dev/null
+++ b/spec/build/bsps/arm/lpc32xx/optstopgpdma.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+ stop general purpose DMA at start-up to avoid DMA interference
+enabled-by: true
+links: []
+name: LPC32XX_STOP_GPDMA
+type: build
diff --git a/spec/build/bsps/arm/lpc32xx/optstopusb.yml b/spec/build/bsps/arm/lpc32xx/optstopusb.yml
new file mode 100644
index 0000000000..e2bbc72f5f
--- /dev/null
+++ b/spec/build/bsps/arm/lpc32xx/optstopusb.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+ stop USB controller at start-up to avoid DMA interference
+enabled-by: true
+links: []
+name: LPC32XX_STOP_USB
+type: build
diff --git a/spec/build/bsps/arm/lpc32xx/optu3clk.yml b/spec/build/bsps/arm/lpc32xx/optu3clk.yml
new file mode 100644
index 0000000000..e8aa25671f
--- /dev/null
+++ b/spec/build/bsps/arm/lpc32xx/optu3clk.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 4998
+default-by-variant: []
+description: |
+ clock configuration for UART 3
+enabled-by: true
+format: '{:#010x}'
+links: []
+name: LPC32XX_CONFIG_U3CLK
+type: build
diff --git a/spec/build/bsps/arm/lpc32xx/optu4clk.yml b/spec/build/bsps/arm/lpc32xx/optu4clk.yml
new file mode 100644
index 0000000000..19c36967e1
--- /dev/null
+++ b/spec/build/bsps/arm/lpc32xx/optu4clk.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 4998
+default-by-variant: []
+description: |
+ clock configuration for UART 4
+enabled-by: true
+format: '{:#010x}'
+links: []
+name: LPC32XX_CONFIG_U4CLK
+type: build
diff --git a/spec/build/bsps/arm/lpc32xx/optu5clk.yml b/spec/build/bsps/arm/lpc32xx/optu5clk.yml
new file mode 100644
index 0000000000..66a67dea95
--- /dev/null
+++ b/spec/build/bsps/arm/lpc32xx/optu5clk.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 4998
+default-by-variant: []
+description: |
+ clock configuration for UART 5
+enabled-by: true
+format: '{:#010x}'
+links: []
+name: LPC32XX_CONFIG_U5CLK
+type: build
diff --git a/spec/build/bsps/arm/lpc32xx/optu6clk.yml b/spec/build/bsps/arm/lpc32xx/optu6clk.yml
new file mode 100644
index 0000000000..364e3143f9
--- /dev/null
+++ b/spec/build/bsps/arm/lpc32xx/optu6clk.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 4998
+default-by-variant: []
+description: |
+ clock configuration for UART 6
+enabled-by: true
+format: '{:#010x}'
+links: []
+name: LPC32XX_CONFIG_U6CLK
+type: build
diff --git a/spec/build/bsps/arm/lpc32xx/optuart1baud.yml b/spec/build/bsps/arm/lpc32xx/optuart1baud.yml
new file mode 100644
index 0000000000..d0b7a546db
--- /dev/null
+++ b/spec/build/bsps/arm/lpc32xx/optuart1baud.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant: []
+description: |
+ baud for UART 1
+enabled-by: true
+links: []
+name: LPC32XX_UART_1_BAUD
+type: build
diff --git a/spec/build/bsps/arm/lpc32xx/optuart2baud.yml b/spec/build/bsps/arm/lpc32xx/optuart2baud.yml
new file mode 100644
index 0000000000..5bdf8be11b
--- /dev/null
+++ b/spec/build/bsps/arm/lpc32xx/optuart2baud.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant: []
+description: |
+ baud for UART 2
+enabled-by: true
+links: []
+name: LPC32XX_UART_2_BAUD
+type: build
diff --git a/spec/build/bsps/arm/lpc32xx/optuart3baud.yml b/spec/build/bsps/arm/lpc32xx/optuart3baud.yml
new file mode 100644
index 0000000000..95e63cf56e
--- /dev/null
+++ b/spec/build/bsps/arm/lpc32xx/optuart3baud.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 115200
+default-by-variant: []
+description: |
+ baud for UART 3
+enabled-by: true
+format: '{}'
+links: []
+name: LPC32XX_UART_3_BAUD
+type: build
diff --git a/spec/build/bsps/arm/lpc32xx/optuart4baud.yml b/spec/build/bsps/arm/lpc32xx/optuart4baud.yml
new file mode 100644
index 0000000000..d210bd3c6b
--- /dev/null
+++ b/spec/build/bsps/arm/lpc32xx/optuart4baud.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 115200
+default-by-variant: []
+description: |
+ baud for UART 4
+enabled-by: true
+format: '{}'
+links: []
+name: LPC32XX_UART_4_BAUD
+type: build
diff --git a/spec/build/bsps/arm/lpc32xx/optuart5baud.yml b/spec/build/bsps/arm/lpc32xx/optuart5baud.yml
new file mode 100644
index 0000000000..0021d5c9ed
--- /dev/null
+++ b/spec/build/bsps/arm/lpc32xx/optuart5baud.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 115200
+default-by-variant: []
+description: |
+ baud for UART 5
+enabled-by: true
+format: '{}'
+links: []
+name: LPC32XX_UART_5_BAUD
+type: build
diff --git a/spec/build/bsps/arm/lpc32xx/optuart6baud.yml b/spec/build/bsps/arm/lpc32xx/optuart6baud.yml
new file mode 100644
index 0000000000..dc856fa33e
--- /dev/null
+++ b/spec/build/bsps/arm/lpc32xx/optuart6baud.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 115200
+default-by-variant: []
+description: |
+ baud for UART 6
+enabled-by: true
+format: '{}'
+links: []
+name: LPC32XX_UART_6_BAUD
+type: build
diff --git a/spec/build/bsps/arm/lpc32xx/optuart7baud.yml b/spec/build/bsps/arm/lpc32xx/optuart7baud.yml
new file mode 100644
index 0000000000..867d534e57
--- /dev/null
+++ b/spec/build/bsps/arm/lpc32xx/optuart7baud.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant: []
+description: |
+ baud for UART 7
+enabled-by: true
+links: []
+name: LPC32XX_UART_7_BAUD
+type: build
diff --git a/spec/build/bsps/arm/lpc32xx/tstmzxstage1.yml b/spec/build/bsps/arm/lpc32xx/tstmzxstage1.yml
new file mode 100644
index 0000000000..0bb2da517c
--- /dev/null
+++ b/spec/build/bsps/arm/lpc32xx/tstmzxstage1.yml
@@ -0,0 +1,23 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- set-test-state:
+ fileio: exclude
+ ftp01: exclude
+ iostream: exclude
+ mghttpd01: exclude
+ monitor02: exclude
+ pppd: exclude
+ rtems: exclude
+ sp71: exclude
+ utf8proc01: exclude
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: null
+default-by-variant: []
+description: ''
+enabled-by: true
+links:
+- role: build-dependency
+ uid: ../../tstsmallmem
+type: build
diff --git a/spec/build/bsps/arm/opta9periphclk.yml b/spec/build/bsps/arm/opta9periphclk.yml
new file mode 100644
index 0000000000..8d8c240606
--- /dev/null
+++ b/spec/build/bsps/arm/opta9periphclk.yml
@@ -0,0 +1,24 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- assert-uint32: null
+- env-assign: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 100000000
+default-by-variant:
+- value: 333333333
+ variants:
+ - arm/xilinx_zynq_zc702
+- value: 666666667
+ variants:
+ - arm/xilinx_zynq_zedboard
+description: |
+ ARM Cortex-A9 MPCore PERIPHCLK clock frequency in Hz
+enabled-by: true
+format: '{}'
+links: []
+name: BSP_ARM_A9MPCORE_PERIPHCLK
+type: build
diff --git a/spec/build/bsps/arm/optmmusmallpages.yml b/spec/build/bsps/arm/optmmusmallpages.yml
new file mode 100644
index 0000000000..a080dec5c6
--- /dev/null
+++ b/spec/build/bsps/arm/optmmusmallpages.yml
@@ -0,0 +1,17 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- env-assign: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+ Use MMU with small pages (4KiB)
+enabled-by: true
+format: '{}'
+links: []
+name: ARM_MMU_USE_SMALL_PAGES
+type: build
diff --git a/spec/build/bsps/arm/optmmusz.yml b/spec/build/bsps/arm/optmmusz.yml
new file mode 100644
index 0000000000..64c97be60a
--- /dev/null
+++ b/spec/build/bsps/arm/optmmusz.yml
@@ -0,0 +1,21 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- assert-ge: 16384
+- assert-le: 33554432
+- env-assign: null
+- format-and-define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 16384
+default-by-variant: []
+description: |
+ Defines the size of the MMU translation table in bytes. The translation
+ table size depends on the configured MMU granularity, for example 4KiB pages
+ or 1MiB sections.
+enabled-by: true
+format: '{:#010x}'
+links: []
+name: ARM_MMU_TRANSLATION_TABLE_SIZE
+type: build
diff --git a/spec/build/bsps/arm/raspberrypi/abi.yml b/spec/build/bsps/arm/raspberrypi/abi.yml
new file mode 100644
index 0000000000..66459a1e1b
--- /dev/null
+++ b/spec/build/bsps/arm/raspberrypi/abi.yml
@@ -0,0 +1,25 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-string: null
+- split: null
+- env-append: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default:
+- -march=armv7-a
+- -mthumb
+- -mfpu=neon
+- -mfloat-abi=hard
+- -mtune=cortex-a7
+default-by-variant:
+- value:
+ - -mcpu=arm1176jzf-s
+ variants:
+ - arm/raspberrypi
+description: |
+ ABI flags
+enabled-by: true
+links: []
+name: ABI_FLAGS
+type: build
diff --git a/spec/build/bsps/arm/raspberrypi/bspraspberrypi.yml b/spec/build/bsps/arm/raspberrypi/bspraspberrypi.yml
new file mode 100644
index 0000000000..ceef1d06e0
--- /dev/null
+++ b/spec/build/bsps/arm/raspberrypi/bspraspberrypi.yml
@@ -0,0 +1,19 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: raspberrypi
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: raspberrypi
+includes: []
+install: []
+links:
+- role: build-dependency
+ uid: grp
+- role: build-dependency
+ uid: ../../opto2
+source: []
+type: build
diff --git a/spec/build/bsps/arm/raspberrypi/bspraspberrypi2.yml b/spec/build/bsps/arm/raspberrypi/bspraspberrypi2.yml
new file mode 100644
index 0000000000..5f604aa42f
--- /dev/null
+++ b/spec/build/bsps/arm/raspberrypi/bspraspberrypi2.yml
@@ -0,0 +1,19 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: raspberrypi2
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: raspberrypi
+includes: []
+install: []
+links:
+- role: build-dependency
+ uid: grp
+- role: build-dependency
+ uid: ../../opto2
+source: []
+type: build
diff --git a/spec/build/bsps/arm/raspberrypi/grp.yml b/spec/build/bsps/arm/raspberrypi/grp.yml
new file mode 100644
index 0000000000..e28f387c8d
--- /dev/null
+++ b/spec/build/bsps/arm/raspberrypi/grp.yml
@@ -0,0 +1,46 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: group
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+enabled-by: true
+includes: []
+install: []
+ldflags: []
+links:
+- role: build-dependency
+ uid: ../grp
+- role: build-dependency
+ uid: abi
+- role: build-dependency
+ uid: obj
+- role: build-dependency
+ uid: objsmp
+- role: build-dependency
+ uid: optenhyp
+- role: build-dependency
+ uid: opti2ciomode
+- role: build-dependency
+ uid: ../optmmusz
+- role: build-dependency
+ uid: optnocachelen
+- role: build-dependency
+ uid: optramlen
+- role: build-dependency
+ uid: optresetvec
+- role: build-dependency
+ uid: optrpi2
+- role: build-dependency
+ uid: optspiiomode
+- role: build-dependency
+ uid: ../start
+- role: build-dependency
+ uid: ../../obj
+- role: build-dependency
+ uid: ../../objirq
+- role: build-dependency
+ uid: linkcmds
+- role: build-dependency
+ uid: ../../bspopts
+type: build
+use-after: []
+use-before: []
diff --git a/spec/build/bsps/arm/raspberrypi/linkcmds.yml b/spec/build/bsps/arm/raspberrypi/linkcmds.yml
new file mode 100644
index 0000000000..100d593757
--- /dev/null
+++ b/spec/build/bsps/arm/raspberrypi/linkcmds.yml
@@ -0,0 +1,43 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: config-file
+content: |
+ MEMORY {
+ RAM_MMU (AIW) : ORIGIN = 0x00100000, LENGTH = ${ARM_MMU_TRANSLATION_TABLE_SIZE}
+ RAM (AIW) : ORIGIN = 0x00200000, LENGTH = ${RPI_RAM_LENGTH_AVAILABLE} - ${RPI_RAM_NOCACHE_LENGTH}
+ }
+
+ REGION_ALIAS ("REGION_START", RAM);
+ REGION_ALIAS ("REGION_VECTOR", RAM);
+ REGION_ALIAS ("REGION_TEXT", RAM);
+ REGION_ALIAS ("REGION_TEXT_LOAD", RAM);
+ REGION_ALIAS ("REGION_RODATA", RAM);
+ REGION_ALIAS ("REGION_RODATA_LOAD", RAM);
+ REGION_ALIAS ("REGION_DATA", RAM);
+ REGION_ALIAS ("REGION_DATA_LOAD", RAM);
+ REGION_ALIAS ("REGION_FAST_TEXT", RAM);
+ REGION_ALIAS ("REGION_FAST_TEXT_LOAD", RAM);
+ REGION_ALIAS ("REGION_FAST_DATA", RAM);
+ REGION_ALIAS ("REGION_FAST_DATA_LOAD", RAM);
+ REGION_ALIAS ("REGION_BSS", RAM);
+ REGION_ALIAS ("REGION_WORK", RAM);
+ REGION_ALIAS ("REGION_STACK", RAM);
+ REGION_ALIAS ("REGION_NOCACHE", RAM);
+ REGION_ALIAS ("REGION_NOCACHE_LOAD", RAM);
+
+ bsp_stack_abt_size = DEFINED (bsp_stack_abt_size) ? bsp_stack_abt_size : 1024;
+
+ bsp_section_rwbarrier_align = DEFINED (bsp_section_rwbarrier_align) ? bsp_section_rwbarrier_align : 1M;
+
+ bsp_vector_table_in_start_section = 1;
+
+ bsp_translation_table_base = ORIGIN (RAM_MMU);
+ bsp_translation_table_end = ORIGIN (RAM_MMU) + LENGTH (RAM_MMU);
+
+ INCLUDE linkcmds.armv4
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+enabled-by: true
+install-path: ${BSP_LIBDIR}
+links: []
+target: linkcmds
+type: build
diff --git a/spec/build/bsps/arm/raspberrypi/obj.yml b/spec/build/bsps/arm/raspberrypi/obj.yml
new file mode 100644
index 0000000000..45180cdd5f
--- /dev/null
+++ b/spec/build/bsps/arm/raspberrypi/obj.yml
@@ -0,0 +1,61 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: objects
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+cxxflags: []
+enabled-by: true
+includes: []
+install:
+- destination: ${BSP_INCLUDEDIR}
+ source:
+ - bsps/arm/raspberrypi/include/bsp.h
+ - bsps/arm/raspberrypi/include/tm27.h
+- destination: ${BSP_INCLUDEDIR}/bsp
+ source:
+ - bsps/arm/raspberrypi/include/bsp/fbcons.h
+ - bsps/arm/raspberrypi/include/bsp/i2c.h
+ - bsps/arm/raspberrypi/include/bsp/irq.h
+ - bsps/arm/raspberrypi/include/bsp/mailbox.h
+ - bsps/arm/raspberrypi/include/bsp/mmu.h
+ - bsps/arm/raspberrypi/include/bsp/raspberrypi.h
+ - bsps/arm/raspberrypi/include/bsp/rpi-fb.h
+ - bsps/arm/raspberrypi/include/bsp/rpi-gpio.h
+ - bsps/arm/raspberrypi/include/bsp/spi.h
+ - bsps/arm/raspberrypi/include/bsp/usart.h
+ - bsps/arm/raspberrypi/include/bsp/vc.h
+links: []
+source:
+- bsps/arm/raspberrypi/clock/clockdrv.c
+- bsps/arm/raspberrypi/console/console-config.c
+- bsps/arm/raspberrypi/console/fb.c
+- bsps/arm/raspberrypi/console/fbcons.c
+- bsps/arm/raspberrypi/console/outch.c
+- bsps/arm/raspberrypi/gpio/rpi-gpio.c
+- bsps/arm/raspberrypi/i2c/i2c.c
+- bsps/arm/raspberrypi/irq/irq.c
+- bsps/arm/raspberrypi/spi/spi.c
+- bsps/arm/raspberrypi/start/bspreset.c
+- bsps/arm/raspberrypi/start/bspstart.c
+- bsps/arm/raspberrypi/start/bspstarthooks.c
+- bsps/arm/raspberrypi/start/cmdline.c
+- bsps/arm/raspberrypi/start/mailbox.c
+- bsps/arm/raspberrypi/start/timer.c
+- bsps/arm/raspberrypi/start/vc.c
+- bsps/arm/shared/cache/cache-cp15.c
+- bsps/arm/shared/cache/cache-v7ar-disable-data.S
+- bsps/arm/shared/cp15/arm-cp15-set-exception-handler.c
+- bsps/arm/shared/cp15/arm-cp15-set-ttb-entries.c
+- bsps/arm/shared/serial/arm-pl011.c
+- bsps/arm/shared/start/bsp-start-memcpy.S
+- bsps/shared/dev/cpucounter/cpucounterfrequency.c
+- bsps/shared/dev/cpucounter/cpucounterread.c
+- bsps/shared/dev/getentropy/getentropy-cpucounter.c
+- bsps/shared/dev/gpio/gpio-support.c
+- bsps/shared/dev/serial/console-termios.c
+- bsps/shared/start/bspfatal-default.c
+- bsps/shared/start/bsp-fdt.c
+- bsps/shared/start/sbrk.c
+- bsps/shared/start/stackalloc.c
+type: build
diff --git a/spec/build/bsps/arm/raspberrypi/objsmp.yml b/spec/build/bsps/arm/raspberrypi/objsmp.yml
new file mode 100644
index 0000000000..547c39abf5
--- /dev/null
+++ b/spec/build/bsps/arm/raspberrypi/objsmp.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: objects
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+cxxflags: []
+enabled-by:
+- RTEMS_SMP
+includes: []
+install: []
+links: []
+source:
+- bsps/arm/raspberrypi/start/bspsmp.c
+- bsps/arm/raspberrypi/start/bspsmp_init.c
+type: build
diff --git a/spec/build/bsps/arm/raspberrypi/optenhyp.yml b/spec/build/bsps/arm/raspberrypi/optenhyp.yml
new file mode 100644
index 0000000000..b9b9cb89ae
--- /dev/null
+++ b/spec/build/bsps/arm/raspberrypi/optenhyp.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+ Support start of BSP in ARM HYP mode
+enabled-by: true
+links: []
+name: BSP_START_IN_HYP_SUPPORT
+type: build
diff --git a/spec/build/bsps/arm/raspberrypi/opti2ciomode.yml b/spec/build/bsps/arm/raspberrypi/opti2ciomode.yml
new file mode 100644
index 0000000000..82ba37dc4d
--- /dev/null
+++ b/spec/build/bsps/arm/raspberrypi/opti2ciomode.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+ Define to 1 to use interrupt-driven I/O with the Raspberry Pi I2C bus. If defined to other value the access will be polled-driven.
+enabled-by: true
+links: []
+name: I2C_IO_MODE
+type: build
diff --git a/spec/build/bsps/arm/raspberrypi/optnocachelen.yml b/spec/build/bsps/arm/raspberrypi/optnocachelen.yml
new file mode 100644
index 0000000000..b9d9071b17
--- /dev/null
+++ b/spec/build/bsps/arm/raspberrypi/optnocachelen.yml
@@ -0,0 +1,18 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- assert-uint32: null
+- env-assign: null
+- format-and-define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 2097152
+default-by-variant: []
+description: |
+ No-cache region length
+enabled-by: true
+format: '{:#010x}'
+links: []
+name: RPI_RAM_NOCACHE_LENGTH
+type: build
diff --git a/spec/build/bsps/arm/raspberrypi/optramlen.yml b/spec/build/bsps/arm/raspberrypi/optramlen.yml
new file mode 100644
index 0000000000..040d514dad
--- /dev/null
+++ b/spec/build/bsps/arm/raspberrypi/optramlen.yml
@@ -0,0 +1,18 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- assert-uint32: null
+- env-assign: null
+- format-and-define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 268435456
+default-by-variant: []
+description: |
+ RAM region length
+enabled-by: true
+format: '{:#010x}'
+links: []
+name: RPI_RAM_LENGTH_AVAILABLE
+type: build
diff --git a/spec/build/bsps/arm/raspberrypi/optresetvec.yml b/spec/build/bsps/arm/raspberrypi/optresetvec.yml
new file mode 100644
index 0000000000..efd1ea2b2a
--- /dev/null
+++ b/spec/build/bsps/arm/raspberrypi/optresetvec.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant: []
+description: |
+ reset vector address for BSP start
+enabled-by: true
+links: []
+name: BSP_START_RESET_VECTOR
+type: build
diff --git a/spec/build/bsps/arm/raspberrypi/optrpi2.yml b/spec/build/bsps/arm/raspberrypi/optrpi2.yml
new file mode 100644
index 0000000000..08e3a1e381
--- /dev/null
+++ b/spec/build/bsps/arm/raspberrypi/optrpi2.yml
@@ -0,0 +1,18 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant:
+- value: true
+ variants:
+ - arm/raspberrypi2
+description: |
+ Set if the BSP variant is Raspberry Pi 2.
+enabled-by: true
+links: []
+name: BSP_IS_RPI2
+type: build
diff --git a/spec/build/bsps/arm/raspberrypi/optspiiomode.yml b/spec/build/bsps/arm/raspberrypi/optspiiomode.yml
new file mode 100644
index 0000000000..bb0b94a683
--- /dev/null
+++ b/spec/build/bsps/arm/raspberrypi/optspiiomode.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+ Define to 1 to use interrupt-driven I/O with the Raspberry Pi SPI bus. If defined to other value the access will be polled-driven.
+enabled-by: true
+links: []
+name: SPI_IO_MODE
+type: build
diff --git a/spec/build/bsps/arm/realview-pbx-a9/abi.yml b/spec/build/bsps/arm/realview-pbx-a9/abi.yml
new file mode 100644
index 0000000000..a3a710c97d
--- /dev/null
+++ b/spec/build/bsps/arm/realview-pbx-a9/abi.yml
@@ -0,0 +1,21 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-string: null
+- split: null
+- env-append: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default:
+- -march=armv7-a
+- -mthumb
+- -mfpu=neon
+- -mfloat-abi=hard
+- -mtune=cortex-a9
+default-by-variant: []
+description: |
+ ABI flags
+enabled-by: true
+links: []
+name: ABI_FLAGS
+type: build
diff --git a/spec/build/bsps/arm/realview-pbx-a9/bsprealviewpbxa9.yml b/spec/build/bsps/arm/realview-pbx-a9/bsprealviewpbxa9.yml
new file mode 100644
index 0000000000..2721152b93
--- /dev/null
+++ b/spec/build/bsps/arm/realview-pbx-a9/bsprealviewpbxa9.yml
@@ -0,0 +1,84 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: realview_pbx_a9_qemu
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: realview-pbx-a9
+includes: []
+install:
+- destination: ${BSP_INCLUDEDIR}
+ source:
+ - bsps/arm/realview-pbx-a9/include/bsp.h
+ - bsps/arm/realview-pbx-a9/include/tm27.h
+- destination: ${BSP_INCLUDEDIR}/bsp
+ source:
+ - bsps/arm/realview-pbx-a9/include/bsp/console.h
+ - bsps/arm/realview-pbx-a9/include/bsp/irq.h
+- destination: ${BSP_LIBDIR}
+ source:
+ - bsps/arm/realview-pbx-a9/start/linkcmds.realview_pbx_a9_qemu
+links:
+- role: build-dependency
+ uid: ../grp
+- role: build-dependency
+ uid: abi
+- role: build-dependency
+ uid: objsmp
+- role: build-dependency
+ uid: opta9periphclk
+- role: build-dependency
+ uid: optcachedata
+- role: build-dependency
+ uid: optcacheinst
+- role: build-dependency
+ uid: optclkbootcpu
+- role: build-dependency
+ uid: optclkfastidle
+- role: build-dependency
+ uid: optmmusmallpages
+- role: build-dependency
+ uid: optresetvec
+- role: build-dependency
+ uid: ../start
+- role: build-dependency
+ uid: ../../linkcmds
+- role: build-dependency
+ uid: ../../obj
+- role: build-dependency
+ uid: ../../objirq
+- role: build-dependency
+ uid: ../../opto0
+- role: build-dependency
+ uid: ../../bspopts
+source:
+- bsps/arm/realview-pbx-a9/console/console-config.c
+- bsps/arm/realview-pbx-a9/console/console-polled.c
+- bsps/arm/realview-pbx-a9/start/bspreset.c
+- bsps/arm/realview-pbx-a9/start/bspstart.c
+- bsps/arm/realview-pbx-a9/start/bspstarthooks.c
+- bsps/arm/realview-pbx-a9/start/fb-config.c
+- bsps/arm/shared/cache/cache-cp15.c
+- bsps/arm/shared/cache/cache-v7ar-disable-data.S
+- bsps/arm/shared/clock/clock-a9mpcore.c
+- bsps/arm/shared/cp15/arm-cp15-set-exception-handler.c
+- bsps/arm/shared/cp15/arm-cp15-set-ttb-entries.c
+- bsps/arm/shared/fb/arm-pl111.c
+- bsps/arm/shared/irq/irq-gic.c
+- bsps/arm/shared/serial/arm-pl011.c
+- bsps/arm/shared/serial/arm-pl050.c
+- bsps/arm/shared/start/bsp-start-memcpy.S
+- bsps/shared/dev/btimer/btimer-stub.c
+- bsps/shared/dev/getentropy/getentropy-cpucounter.c
+- bsps/shared/dev/serial/console-termios-init.c
+- bsps/shared/dev/serial/console-termios.c
+- bsps/shared/dev/serial/getserialmouseps2.c
+- bsps/shared/irq/irq-default-handler.c
+- bsps/shared/start/bspfatal-default.c
+- bsps/shared/start/bspgetworkarea-default.c
+- bsps/shared/start/sbrk.c
+- bsps/shared/start/stackalloc.c
+type: build
diff --git a/spec/build/bsps/arm/realview-pbx-a9/objsmp.yml b/spec/build/bsps/arm/realview-pbx-a9/objsmp.yml
new file mode 100644
index 0000000000..0c1ac9e6bb
--- /dev/null
+++ b/spec/build/bsps/arm/realview-pbx-a9/objsmp.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: objects
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+cxxflags: []
+enabled-by:
+- RTEMS_SMP
+includes: []
+install: []
+links: []
+source:
+- bsps/arm/realview-pbx-a9/start/bspsmp.c
+- bsps/arm/shared/start/arm-a9mpcore-smp.c
+type: build
diff --git a/spec/build/bsps/arm/realview-pbx-a9/opta9periphclk.yml b/spec/build/bsps/arm/realview-pbx-a9/opta9periphclk.yml
new file mode 100644
index 0000000000..3ab2b72830
--- /dev/null
+++ b/spec/build/bsps/arm/realview-pbx-a9/opta9periphclk.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 100000000
+default-by-variant: []
+description: |
+ ARM Cortex-A9 MPCore PERIPHCLK clock frequency in Hz
+enabled-by: true
+format: '{}'
+links: []
+name: BSP_ARM_A9MPCORE_PERIPHCLK
+type: build
diff --git a/spec/build/bsps/arm/realview-pbx-a9/optcachedata.yml b/spec/build/bsps/arm/realview-pbx-a9/optcachedata.yml
new file mode 100644
index 0000000000..1664b0fc31
--- /dev/null
+++ b/spec/build/bsps/arm/realview-pbx-a9/optcachedata.yml
@@ -0,0 +1,18 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant:
+- value: false
+ variants:
+ - arm/.*qemu
+description: |
+ enable data cache
+enabled-by: true
+links: []
+name: BSP_DATA_CACHE_ENABLED
+type: build
diff --git a/spec/build/bsps/arm/realview-pbx-a9/optcacheinst.yml b/spec/build/bsps/arm/realview-pbx-a9/optcacheinst.yml
new file mode 100644
index 0000000000..b191133af9
--- /dev/null
+++ b/spec/build/bsps/arm/realview-pbx-a9/optcacheinst.yml
@@ -0,0 +1,18 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant:
+- value: false
+ variants:
+ - arm/.*qemu
+description: |
+ enable instruction cache
+enabled-by: true
+links: []
+name: BSP_INSTRUCTION_CACHE_ENABLED
+type: build
diff --git a/spec/build/bsps/arm/realview-pbx-a9/optclkbootcpu.yml b/spec/build/bsps/arm/realview-pbx-a9/optclkbootcpu.yml
new file mode 100644
index 0000000000..8d78c9ce6a
--- /dev/null
+++ b/spec/build/bsps/arm/realview-pbx-a9/optclkbootcpu.yml
@@ -0,0 +1,18 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant:
+- value: true
+ variants:
+ - arm/.*qemu.*
+description: |
+ If defined, then do the clock tick processing on the boot processor on behalf of all other processors.
+enabled-by: true
+links: []
+name: CLOCK_DRIVER_USE_ONLY_BOOT_PROCESSOR
+type: build
diff --git a/spec/build/bsps/arm/realview-pbx-a9/optclkfastidle.yml b/spec/build/bsps/arm/realview-pbx-a9/optclkfastidle.yml
new file mode 100644
index 0000000000..e4624223eb
--- /dev/null
+++ b/spec/build/bsps/arm/realview-pbx-a9/optclkfastidle.yml
@@ -0,0 +1,18 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant:
+- value: true
+ variants:
+ - arm/.*qemu.*
+description: |
+ This sets a mode where the time runs as fast as possible when a clock ISR occurs while the IDLE thread is executing. This can significantly reduce simulation times.
+enabled-by: true
+links: []
+name: CLOCK_DRIVER_USE_FAST_IDLE
+type: build
diff --git a/spec/build/bsps/arm/realview-pbx-a9/optmmusmallpages.yml b/spec/build/bsps/arm/realview-pbx-a9/optmmusmallpages.yml
new file mode 100644
index 0000000000..d24005197e
--- /dev/null
+++ b/spec/build/bsps/arm/realview-pbx-a9/optmmusmallpages.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+ use MMU with small pages (4KiB)
+enabled-by: true
+links: []
+name: ARM_MMU_USE_SMALL_PAGES
+type: build
diff --git a/spec/build/bsps/arm/realview-pbx-a9/optresetvec.yml b/spec/build/bsps/arm/realview-pbx-a9/optresetvec.yml
new file mode 100644
index 0000000000..efd1ea2b2a
--- /dev/null
+++ b/spec/build/bsps/arm/realview-pbx-a9/optresetvec.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant: []
+description: |
+ reset vector address for BSP start
+enabled-by: true
+links: []
+name: BSP_START_RESET_VECTOR
+type: build
diff --git a/spec/build/bsps/arm/rtl22xx/abi.yml b/spec/build/bsps/arm/rtl22xx/abi.yml
new file mode 100644
index 0000000000..abb7f66b50
--- /dev/null
+++ b/spec/build/bsps/arm/rtl22xx/abi.yml
@@ -0,0 +1,22 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-string: null
+- split: null
+- env-append: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default:
+- -mcpu=arm7tdmi
+- -mthumb
+default-by-variant:
+- value:
+ - -mcpu=arm7tdmi
+ variants:
+ - arm/rtl22xx
+description: |
+ ABI flags
+enabled-by: true
+links: []
+name: ABI_FLAGS
+type: build
diff --git a/spec/build/bsps/arm/rtl22xx/bsprtl22xx.yml b/spec/build/bsps/arm/rtl22xx/bsprtl22xx.yml
new file mode 100644
index 0000000000..340172deef
--- /dev/null
+++ b/spec/build/bsps/arm/rtl22xx/bsprtl22xx.yml
@@ -0,0 +1,21 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: rtl22xx
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: rtl22xx
+includes: []
+install: []
+links:
+- role: build-dependency
+ uid: grp
+- role: build-dependency
+ uid: tstrtl22xx
+- role: build-dependency
+ uid: ../../opto2
+source: []
+type: build
diff --git a/spec/build/bsps/arm/rtl22xx/bsprtl22xxt.yml b/spec/build/bsps/arm/rtl22xx/bsprtl22xxt.yml
new file mode 100644
index 0000000000..ecd5f8baec
--- /dev/null
+++ b/spec/build/bsps/arm/rtl22xx/bsprtl22xxt.yml
@@ -0,0 +1,21 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: rtl22xx_t
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: rtl22xx
+includes: []
+install: []
+links:
+- role: build-dependency
+ uid: grp
+- role: build-dependency
+ uid: tstrtl22xxt
+- role: build-dependency
+ uid: ../../opto2
+source: []
+type: build
diff --git a/spec/build/bsps/arm/rtl22xx/grp.yml b/spec/build/bsps/arm/rtl22xx/grp.yml
new file mode 100644
index 0000000000..4d560158f4
--- /dev/null
+++ b/spec/build/bsps/arm/rtl22xx/grp.yml
@@ -0,0 +1,30 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: group
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+enabled-by: true
+includes: []
+install: []
+ldflags: []
+links:
+- role: build-dependency
+ uid: ../grp
+- role: build-dependency
+ uid: abi
+- role: build-dependency
+ uid: obj
+- role: build-dependency
+ uid: objnet
+- role: build-dependency
+ uid: optskyeye
+- role: build-dependency
+ uid: start
+- role: build-dependency
+ uid: ../../obj
+- role: build-dependency
+ uid: ../../objirq
+- role: build-dependency
+ uid: ../../bspopts
+type: build
+use-after: []
+use-before: []
diff --git a/spec/build/bsps/arm/rtl22xx/obj.yml b/spec/build/bsps/arm/rtl22xx/obj.yml
new file mode 100644
index 0000000000..1889f0d842
--- /dev/null
+++ b/spec/build/bsps/arm/rtl22xx/obj.yml
@@ -0,0 +1,41 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: objects
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+cxxflags: []
+enabled-by: true
+includes: []
+install:
+- destination: ${BSP_INCLUDEDIR}
+ source:
+ - bsps/arm/rtl22xx/include/bsp.h
+ - bsps/arm/rtl22xx/include/lpc22xx.h
+ - bsps/arm/rtl22xx/include/tm27.h
+- destination: ${BSP_INCLUDEDIR}/bsp
+ source:
+ - bsps/arm/rtl22xx/include/bsp/irq.h
+- destination: ${BSP_LIBDIR}
+ source:
+ - bsps/arm/rtl22xx/start/linkcmds
+links: []
+source:
+- bsps/arm/rtl22xx/btimer/btimer.c
+- bsps/arm/rtl22xx/clock/clockdrv.c
+- bsps/arm/rtl22xx/console/uart.c
+- bsps/arm/rtl22xx/irq/irq.c
+- bsps/arm/rtl22xx/start/bspreset.c
+- bsps/arm/rtl22xx/start/bspstart.c
+- bsps/shared/cache/nocache.c
+- bsps/shared/dev/cpucounter/cpucounterfrequency.c
+- bsps/shared/dev/cpucounter/cpucounterread.c
+- bsps/shared/dev/getentropy/getentropy-cpucounter.c
+- bsps/shared/dev/serial/legacy-console-control.c
+- bsps/shared/dev/serial/legacy-console-select.c
+- bsps/shared/dev/serial/legacy-console.c
+- bsps/shared/irq/irq-default-handler.c
+- bsps/shared/start/bspfatal-default.c
+- bsps/shared/start/bspgetworkarea-default.c
+- bsps/shared/start/sbrk.c
+type: build
diff --git a/spec/build/bsps/arm/rtl22xx/objnet.yml b/spec/build/bsps/arm/rtl22xx/objnet.yml
new file mode 100644
index 0000000000..3e9f691ec5
--- /dev/null
+++ b/spec/build/bsps/arm/rtl22xx/objnet.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: objects
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+cxxflags: []
+enabled-by:
+- RTEMS_NETWORKING
+includes:
+- cpukit/libnetworking
+install: []
+links: []
+source:
+- bsps/arm/rtl22xx/net/network.c
+type: build
diff --git a/spec/build/bsps/arm/rtl22xx/optskyeye.yml b/spec/build/bsps/arm/rtl22xx/optskyeye.yml
new file mode 100644
index 0000000000..be55a98c3a
--- /dev/null
+++ b/spec/build/bsps/arm/rtl22xx/optskyeye.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant: []
+description: |
+ If defined, enable options which optimize executingon the Skyeye simulator. Speed up the clock ticks while the idle task is running so time spent in the idle task is minimized. This significantly reduces the wall time required to execute the RTEMS test suites.
+enabled-by: true
+links: []
+name: ON_SKYEYE
+type: build
diff --git a/spec/build/bsps/arm/rtl22xx/start.yml b/spec/build/bsps/arm/rtl22xx/start.yml
new file mode 100644
index 0000000000..4fe0065e7e
--- /dev/null
+++ b/spec/build/bsps/arm/rtl22xx/start.yml
@@ -0,0 +1,14 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+asflags: []
+build-type: start-file
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+includes: []
+install-path: ${BSP_LIBDIR}
+links: []
+source:
+- bsps/arm/rtl22xx/start/start.S
+target: start.o
+type: build
diff --git a/spec/build/bsps/arm/rtl22xx/tstrtl22xx.yml b/spec/build/bsps/arm/rtl22xx/tstrtl22xx.yml
new file mode 100644
index 0000000000..9e3fe758bc
--- /dev/null
+++ b/spec/build/bsps/arm/rtl22xx/tstrtl22xx.yml
@@ -0,0 +1,21 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- set-test-state:
+ dl10: exclude
+ fileio: exclude
+ fsdosfsname01: exclude
+ iostream: exclude
+ linpack: exclude
+ record02: exclude
+ utf8proc01: exclude
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: null
+default-by-variant: []
+description: ''
+enabled-by: true
+links:
+- role: build-dependency
+ uid: ../../tstnoiconv
+type: build
diff --git a/spec/build/bsps/arm/rtl22xx/tstrtl22xxt.yml b/spec/build/bsps/arm/rtl22xx/tstrtl22xxt.yml
new file mode 100644
index 0000000000..53b3efd010
--- /dev/null
+++ b/spec/build/bsps/arm/rtl22xx/tstrtl22xxt.yml
@@ -0,0 +1,18 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- set-test-state:
+ dl10: exclude
+ fsdosfsname01: exclude
+ linpack: exclude
+ record02: exclude
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: null
+default-by-variant: []
+description: ''
+enabled-by: true
+links:
+- role: build-dependency
+ uid: ../../tstnoiconv
+type: build
diff --git a/spec/build/bsps/arm/smdk2410/abi.yml b/spec/build/bsps/arm/smdk2410/abi.yml
new file mode 100644
index 0000000000..d964ca5d2f
--- /dev/null
+++ b/spec/build/bsps/arm/smdk2410/abi.yml
@@ -0,0 +1,17 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-string: null
+- split: null
+- env-append: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default:
+- -mcpu=arm920t
+default-by-variant: []
+description: |
+ ABI flags
+enabled-by: true
+links: []
+name: ABI_FLAGS
+type: build
diff --git a/spec/build/bsps/arm/smdk2410/bspsmdk2410.yml b/spec/build/bsps/arm/smdk2410/bspsmdk2410.yml
new file mode 100644
index 0000000000..3b15c7ca91
--- /dev/null
+++ b/spec/build/bsps/arm/smdk2410/bspsmdk2410.yml
@@ -0,0 +1,69 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: smdk2410
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: smdk2410
+includes: []
+install:
+- destination: ${BSP_INCLUDEDIR}
+ source:
+ - bsps/arm/smdk2410/include/bsp.h
+ - bsps/arm/smdk2410/include/s3c2400.h
+ - bsps/arm/smdk2410/include/s3c2410.h
+ - bsps/arm/smdk2410/include/s3c24xx.h
+ - bsps/arm/smdk2410/include/smc.h
+ - bsps/arm/smdk2410/include/tm27.h
+- destination: ${BSP_INCLUDEDIR}/bsp
+ source:
+ - bsps/arm/smdk2410/include/bsp/irq.h
+- destination: ${BSP_LIBDIR}
+ source:
+ - bsps/arm/smdk2410/start/linkcmds
+links:
+- role: build-dependency
+ uid: ../grp
+- role: build-dependency
+ uid: abi
+- role: build-dependency
+ uid: optcpus3c2410
+- role: build-dependency
+ uid: optskyeye
+- role: build-dependency
+ uid: start
+- role: build-dependency
+ uid: ../../obj
+- role: build-dependency
+ uid: ../../objirq
+- role: build-dependency
+ uid: ../../opto2
+- role: build-dependency
+ uid: ../../bspopts
+source:
+- bsps/arm/shared/cache/cache-cp15.c
+- bsps/arm/shared/cp15/arm920-mmu.c
+- bsps/arm/smdk2410/btimer/btimer.c
+- bsps/arm/smdk2410/clock/clockdrv.c
+- bsps/arm/smdk2410/clock/support.c
+- bsps/arm/smdk2410/console/uart.c
+- bsps/arm/smdk2410/irq/irq.c
+- bsps/arm/smdk2410/smc/smc.c
+- bsps/arm/smdk2410/start/bspidle.c
+- bsps/arm/smdk2410/start/bspreset.c
+- bsps/arm/smdk2410/start/bspstart.c
+- bsps/arm/smdk2410/start/memmap.c
+- bsps/shared/dev/cpucounter/cpucounterfrequency.c
+- bsps/shared/dev/cpucounter/cpucounterread.c
+- bsps/shared/dev/getentropy/getentropy-cpucounter.c
+- bsps/shared/dev/serial/legacy-console-control.c
+- bsps/shared/dev/serial/legacy-console-select.c
+- bsps/shared/dev/serial/legacy-console.c
+- bsps/shared/irq/irq-default-handler.c
+- bsps/shared/start/bspfatal-default.c
+- bsps/shared/start/bspgetworkarea-default.c
+- bsps/shared/start/sbrk.c
+type: build
diff --git a/spec/build/bsps/arm/smdk2410/optcpus3c2410.yml b/spec/build/bsps/arm/smdk2410/optcpus3c2410.yml
new file mode 100644
index 0000000000..ba24539e4a
--- /dev/null
+++ b/spec/build/bsps/arm/smdk2410/optcpus3c2410.yml
@@ -0,0 +1,18 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant:
+- value: true
+ variants:
+ - arm/smdk2410
+description: |
+ If defined, enable optons for the S3C2410 CPU model.
+enabled-by: true
+links: []
+name: CPU_S3C2410
+type: build
diff --git a/spec/build/bsps/arm/smdk2410/optskyeye.yml b/spec/build/bsps/arm/smdk2410/optskyeye.yml
new file mode 100644
index 0000000000..be55a98c3a
--- /dev/null
+++ b/spec/build/bsps/arm/smdk2410/optskyeye.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant: []
+description: |
+ If defined, enable options which optimize executingon the Skyeye simulator. Speed up the clock ticks while the idle task is running so time spent in the idle task is minimized. This significantly reduces the wall time required to execute the RTEMS test suites.
+enabled-by: true
+links: []
+name: ON_SKYEYE
+type: build
diff --git a/spec/build/bsps/arm/smdk2410/start.yml b/spec/build/bsps/arm/smdk2410/start.yml
new file mode 100644
index 0000000000..6910892daf
--- /dev/null
+++ b/spec/build/bsps/arm/smdk2410/start.yml
@@ -0,0 +1,14 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+asflags: []
+build-type: start-file
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+includes: []
+install-path: ${BSP_LIBDIR}
+links: []
+source:
+- bsps/arm/smdk2410/start/start.S
+target: start.o
+type: build
diff --git a/spec/build/bsps/arm/start.yml b/spec/build/bsps/arm/start.yml
new file mode 100644
index 0000000000..07120dcc71
--- /dev/null
+++ b/spec/build/bsps/arm/start.yml
@@ -0,0 +1,14 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+asflags: []
+build-type: start-file
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+includes: []
+install-path: ${BSP_LIBDIR}
+links: []
+source:
+- bsps/arm/shared/start/start.S
+target: start.o
+type: build
diff --git a/spec/build/bsps/arm/stm32f4/abi.yml b/spec/build/bsps/arm/stm32f4/abi.yml
new file mode 100644
index 0000000000..8c9b62c6ea
--- /dev/null
+++ b/spec/build/bsps/arm/stm32f4/abi.yml
@@ -0,0 +1,23 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-string: null
+- split: null
+- env-append: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default:
+- -mthumb
+- -mcpu=cortex-m4
+default-by-variant:
+- value:
+ - -mthumb
+ - -mcpu=cortex-m3
+ variants:
+ - arm/stm32f105rc
+description: |
+ ABI flags
+enabled-by: true
+links: []
+name: ABI_FLAGS
+type: build
diff --git a/spec/build/bsps/arm/stm32f4/bspstm32f105rc.yml b/spec/build/bsps/arm/stm32f4/bspstm32f105rc.yml
new file mode 100644
index 0000000000..f00a177dc0
--- /dev/null
+++ b/spec/build/bsps/arm/stm32f4/bspstm32f105rc.yml
@@ -0,0 +1,21 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: stm32f105rc
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: stm32f4
+includes: []
+install: []
+links:
+- role: build-dependency
+ uid: grp
+- role: build-dependency
+ uid: tststm32f105rc
+- role: build-dependency
+ uid: ../../opto2
+source: []
+type: build
diff --git a/spec/build/bsps/arm/stm32f4/bspstm32f4.yml b/spec/build/bsps/arm/stm32f4/bspstm32f4.yml
new file mode 100644
index 0000000000..f3c6426f07
--- /dev/null
+++ b/spec/build/bsps/arm/stm32f4/bspstm32f4.yml
@@ -0,0 +1,21 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: stm32f4
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: stm32f4
+includes: []
+install: []
+links:
+- role: build-dependency
+ uid: grp
+- role: build-dependency
+ uid: ../../opto2
+- role: build-dependency
+ uid: ../../tstsmallmem
+source: []
+type: build
diff --git a/spec/build/bsps/arm/stm32f4/grp.yml b/spec/build/bsps/arm/stm32f4/grp.yml
new file mode 100644
index 0000000000..ad08ee63c1
--- /dev/null
+++ b/spec/build/bsps/arm/stm32f4/grp.yml
@@ -0,0 +1,60 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: group
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+enabled-by: true
+includes: []
+install: []
+ldflags: []
+links:
+- role: build-dependency
+ uid: ../grp
+- role: build-dependency
+ uid: ../start
+- role: build-dependency
+ uid: abi
+- role: build-dependency
+ uid: obj
+- role: build-dependency
+ uid: opteni2c1
+- role: build-dependency
+ uid: opteni2c2
+- role: build-dependency
+ uid: optenuart4
+- role: build-dependency
+ uid: optenuart5
+- role: build-dependency
+ uid: optenusart1
+- role: build-dependency
+ uid: optenusart2
+- role: build-dependency
+ uid: optenusart3
+- role: build-dependency
+ uid: optenusart6
+- role: build-dependency
+ uid: optf10xxx
+- role: build-dependency
+ uid: optf4xxxx
+- role: build-dependency
+ uid: opthclk
+- role: build-dependency
+ uid: optoschse
+- role: build-dependency
+ uid: optpclk1
+- role: build-dependency
+ uid: optpclk2
+- role: build-dependency
+ uid: optsysclk
+- role: build-dependency
+ uid: optusartbaud
+- role: build-dependency
+ uid: ../../linkcmds
+- role: build-dependency
+ uid: ../../obj
+- role: build-dependency
+ uid: ../../objirq
+- role: build-dependency
+ uid: ../../bspopts
+type: build
+use-after: []
+use-before: []
diff --git a/spec/build/bsps/arm/stm32f4/obj.yml b/spec/build/bsps/arm/stm32f4/obj.yml
new file mode 100644
index 0000000000..22b73177cd
--- /dev/null
+++ b/spec/build/bsps/arm/stm32f4/obj.yml
@@ -0,0 +1,70 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: objects
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+cxxflags: []
+enabled-by: true
+includes: []
+install:
+- destination: ${BSP_INCLUDEDIR}
+ source:
+ - bsps/arm/stm32f4/include/bsp.h
+ - bsps/arm/stm32f4/include/tm27.h
+- destination: ${BSP_INCLUDEDIR}/bsp
+ source:
+ - bsps/arm/stm32f4/include/bsp/i2c.h
+ - bsps/arm/stm32f4/include/bsp/io.h
+ - bsps/arm/stm32f4/include/bsp/irq.h
+ - bsps/arm/stm32f4/include/bsp/rcc.h
+ - bsps/arm/stm32f4/include/bsp/stm32_i2c.h
+ - bsps/arm/stm32f4/include/bsp/stm32_usart.h
+ - bsps/arm/stm32f4/include/bsp/stm32f10xxx_exti.h
+ - bsps/arm/stm32f4/include/bsp/stm32f10xxx_gpio.h
+ - bsps/arm/stm32f4/include/bsp/stm32f10xxx_rcc.h
+ - bsps/arm/stm32f4/include/bsp/stm32f4.h
+ - bsps/arm/stm32f4/include/bsp/stm32f4xxxx_adc.h
+ - bsps/arm/stm32f4/include/bsp/stm32f4xxxx_exti.h
+ - bsps/arm/stm32f4/include/bsp/stm32f4xxxx_flash.h
+ - bsps/arm/stm32f4/include/bsp/stm32f4xxxx_gpio.h
+ - bsps/arm/stm32f4/include/bsp/stm32f4xxxx_otgfs.h
+ - bsps/arm/stm32f4/include/bsp/stm32f4xxxx_pwr.h
+ - bsps/arm/stm32f4/include/bsp/stm32f4xxxx_rcc.h
+ - bsps/arm/stm32f4/include/bsp/stm32f4xxxx_syscfg.h
+ - bsps/arm/stm32f4/include/bsp/stm32f4xxxx_tim.h
+ - bsps/arm/stm32f4/include/bsp/usart.h
+- destination: ${BSP_LIBDIR}
+ source:
+ - bsps/arm/stm32f4/start/linkcmds.stm32f105rc
+ - bsps/arm/stm32f4/start/linkcmds.stm32f4
+links: []
+source:
+- bsps/arm/shared/clock/clock-armv7m.c
+- bsps/arm/shared/irq/irq-armv7m.c
+- bsps/arm/shared/irq/irq-dispatch-armv7m.c
+- bsps/arm/shared/start/bsp-start-memcpy.S
+- bsps/arm/stm32f4/console/console-config.c
+- bsps/arm/stm32f4/console/usart.c
+- bsps/arm/stm32f4/i2c/i2c-config.c
+- bsps/arm/stm32f4/i2c/i2c.c
+- bsps/arm/stm32f4/start/bspreset.c
+- bsps/arm/stm32f4/start/bspstart.c
+- bsps/arm/stm32f4/start/bspstarthook.c
+- bsps/arm/stm32f4/start/io.c
+- bsps/arm/stm32f4/start/rcc.c
+- bsps/arm/stm32f4/start/start-config-io.c
+- bsps/shared/cache/nocache.c
+- bsps/shared/dev/btimer/btimer-stub.c
+- bsps/shared/dev/cpucounter/cpucounterfrequency.c
+- bsps/shared/dev/cpucounter/cpucounterread.c
+- bsps/shared/dev/getentropy/getentropy-cpucounter.c
+- bsps/shared/dev/serial/legacy-console-control.c
+- bsps/shared/dev/serial/legacy-console-select.c
+- bsps/shared/dev/serial/legacy-console.c
+- bsps/shared/irq/irq-default-handler.c
+- bsps/shared/start/bspfatal-default.c
+- bsps/shared/start/bspgetworkarea-default.c
+- bsps/shared/start/sbrk.c
+- bsps/shared/start/stackalloc.c
+type: build
diff --git a/spec/build/bsps/arm/stm32f4/opteni2c1.yml b/spec/build/bsps/arm/stm32f4/opteni2c1.yml
new file mode 100644
index 0000000000..e200c81623
--- /dev/null
+++ b/spec/build/bsps/arm/stm32f4/opteni2c1.yml
@@ -0,0 +1,18 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant:
+- value: true
+ variants:
+ - arm/stm32f1.*
+description: |
+ enable I2C 1
+enabled-by: true
+links: []
+name: STM32F4_ENABLE_I2C1
+type: build
diff --git a/spec/build/bsps/arm/stm32f4/opteni2c2.yml b/spec/build/bsps/arm/stm32f4/opteni2c2.yml
new file mode 100644
index 0000000000..d4ef7328e1
--- /dev/null
+++ b/spec/build/bsps/arm/stm32f4/opteni2c2.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant: []
+description: |
+ enable I2C 2
+enabled-by: true
+links: []
+name: STM32F4_ENABLE_I2C2
+type: build
diff --git a/spec/build/bsps/arm/stm32f4/optenuart4.yml b/spec/build/bsps/arm/stm32f4/optenuart4.yml
new file mode 100644
index 0000000000..5bf266707f
--- /dev/null
+++ b/spec/build/bsps/arm/stm32f4/optenuart4.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant: []
+description: |
+ enable UART 4
+enabled-by: true
+links: []
+name: STM32F4_ENABLE_UART_4
+type: build
diff --git a/spec/build/bsps/arm/stm32f4/optenuart5.yml b/spec/build/bsps/arm/stm32f4/optenuart5.yml
new file mode 100644
index 0000000000..21f1e6f963
--- /dev/null
+++ b/spec/build/bsps/arm/stm32f4/optenuart5.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant: []
+description: |
+ enable UART 5
+enabled-by: true
+links: []
+name: STM32F4_ENABLE_UART_5
+type: build
diff --git a/spec/build/bsps/arm/stm32f4/optenusart1.yml b/spec/build/bsps/arm/stm32f4/optenusart1.yml
new file mode 100644
index 0000000000..9fd8f99af2
--- /dev/null
+++ b/spec/build/bsps/arm/stm32f4/optenusart1.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant: []
+description: |
+ enable USART 1
+enabled-by: true
+links: []
+name: STM32F4_ENABLE_USART_1
+type: build
diff --git a/spec/build/bsps/arm/stm32f4/optenusart2.yml b/spec/build/bsps/arm/stm32f4/optenusart2.yml
new file mode 100644
index 0000000000..d9dd3a3d22
--- /dev/null
+++ b/spec/build/bsps/arm/stm32f4/optenusart2.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant: []
+description: |
+ enable USART 2
+enabled-by: true
+links: []
+name: STM32F4_ENABLE_USART_2
+type: build
diff --git a/spec/build/bsps/arm/stm32f4/optenusart3.yml b/spec/build/bsps/arm/stm32f4/optenusart3.yml
new file mode 100644
index 0000000000..3cc11ba79b
--- /dev/null
+++ b/spec/build/bsps/arm/stm32f4/optenusart3.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+ enable USART 3
+enabled-by: true
+links: []
+name: STM32F4_ENABLE_USART_3
+type: build
diff --git a/spec/build/bsps/arm/stm32f4/optenusart6.yml b/spec/build/bsps/arm/stm32f4/optenusart6.yml
new file mode 100644
index 0000000000..4e20fb4317
--- /dev/null
+++ b/spec/build/bsps/arm/stm32f4/optenusart6.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant: []
+description: |
+ enable USART 6
+enabled-by: true
+links: []
+name: STM32F4_ENABLE_USART_6
+type: build
diff --git a/spec/build/bsps/arm/stm32f4/optf10xxx.yml b/spec/build/bsps/arm/stm32f4/optf10xxx.yml
new file mode 100644
index 0000000000..54f1418cf9
--- /dev/null
+++ b/spec/build/bsps/arm/stm32f4/optf10xxx.yml
@@ -0,0 +1,18 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant:
+- value: true
+ variants:
+ - arm/stm32f1.*
+description: |
+ Chip belongs to the STM32F10XXX family.
+enabled-by: true
+links: []
+name: STM32F4_FAMILY_F10XXX
+type: build
diff --git a/spec/build/bsps/arm/stm32f4/optf4xxxx.yml b/spec/build/bsps/arm/stm32f4/optf4xxxx.yml
new file mode 100644
index 0000000000..66604f249a
--- /dev/null
+++ b/spec/build/bsps/arm/stm32f4/optf4xxxx.yml
@@ -0,0 +1,18 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant:
+- value: true
+ variants:
+ - arm/stm32f4.*
+description: |
+ Chip belongs to the STM32F4XXXX family.
+enabled-by: true
+links: []
+name: STM32F4_FAMILY_F4XXXX
+type: build
diff --git a/spec/build/bsps/arm/stm32f4/opthclk.yml b/spec/build/bsps/arm/stm32f4/opthclk.yml
new file mode 100644
index 0000000000..7f315f12b2
--- /dev/null
+++ b/spec/build/bsps/arm/stm32f4/opthclk.yml
@@ -0,0 +1,19 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 16000000
+default-by-variant:
+- value: 8000000
+ variants:
+ - arm/stm32f1.*
+description: |
+ HCLK frequency in Hz
+enabled-by: true
+format: '{}'
+links: []
+name: STM32F4_HCLK
+type: build
diff --git a/spec/build/bsps/arm/stm32f4/optoschse.yml b/spec/build/bsps/arm/stm32f4/optoschse.yml
new file mode 100644
index 0000000000..2b1dad620e
--- /dev/null
+++ b/spec/build/bsps/arm/stm32f4/optoschse.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 8000000
+default-by-variant: []
+description: |
+ HSE oscillator frequency in Hz
+enabled-by: true
+format: '{}'
+links: []
+name: STM32F4_HSE_OSCILLATOR
+type: build
diff --git a/spec/build/bsps/arm/stm32f4/optpclk1.yml b/spec/build/bsps/arm/stm32f4/optpclk1.yml
new file mode 100644
index 0000000000..9ac285b0bc
--- /dev/null
+++ b/spec/build/bsps/arm/stm32f4/optpclk1.yml
@@ -0,0 +1,19 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 16000000
+default-by-variant:
+- value: 8000000
+ variants:
+ - arm/stm32f1.*
+description: |
+ PCLK1 frequency in Hz
+enabled-by: true
+format: '{}'
+links: []
+name: STM32F4_PCLK1
+type: build
diff --git a/spec/build/bsps/arm/stm32f4/optpclk2.yml b/spec/build/bsps/arm/stm32f4/optpclk2.yml
new file mode 100644
index 0000000000..e51eeaf36f
--- /dev/null
+++ b/spec/build/bsps/arm/stm32f4/optpclk2.yml
@@ -0,0 +1,19 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 16000000
+default-by-variant:
+- value: 8000000
+ variants:
+ - arm/stm32f1.*
+description: |
+ PCLK2 frequency in Hz
+enabled-by: true
+format: '{}'
+links: []
+name: STM32F4_PCLK2
+type: build
diff --git a/spec/build/bsps/arm/stm32f4/optsysclk.yml b/spec/build/bsps/arm/stm32f4/optsysclk.yml
new file mode 100644
index 0000000000..5f08d4ecde
--- /dev/null
+++ b/spec/build/bsps/arm/stm32f4/optsysclk.yml
@@ -0,0 +1,19 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 16000000
+default-by-variant:
+- value: 8000000
+ variants:
+ - arm/stm32f1.*
+description: |
+ SYSCLK frequency in Hz
+enabled-by: true
+format: '{}'
+links: []
+name: STM32F4_SYSCLK
+type: build
diff --git a/spec/build/bsps/arm/stm32f4/optusartbaud.yml b/spec/build/bsps/arm/stm32f4/optusartbaud.yml
new file mode 100644
index 0000000000..b102e37eb6
--- /dev/null
+++ b/spec/build/bsps/arm/stm32f4/optusartbaud.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 115200
+default-by-variant: []
+description: |
+ baud for USARTs
+enabled-by: true
+format: '{}'
+links: []
+name: STM32F4_USART_BAUD
+type: build
diff --git a/spec/build/bsps/arm/stm32f4/tststm32f105rc.yml b/spec/build/bsps/arm/stm32f4/tststm32f105rc.yml
new file mode 100644
index 0000000000..f752f18b93
--- /dev/null
+++ b/spec/build/bsps/arm/stm32f4/tststm32f105rc.yml
@@ -0,0 +1,22 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- set-test-state:
+ fileio: exclude
+ ftp01: exclude
+ iostream: exclude
+ mghttpd01: exclude
+ monitor02: exclude
+ pppd: exclude
+ rtems: exclude
+ utf8proc01: exclude
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: null
+default-by-variant: []
+description: ''
+enabled-by: true
+links:
+- role: build-dependency
+ uid: ../../tstsmallmem
+type: build
diff --git a/spec/build/bsps/arm/tms570/abi.yml b/spec/build/bsps/arm/tms570/abi.yml
new file mode 100644
index 0000000000..0177616e2a
--- /dev/null
+++ b/spec/build/bsps/arm/tms570/abi.yml
@@ -0,0 +1,21 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-string: null
+- split: null
+- env-append: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default:
+- -march=armv7-r
+- -mthumb
+- -mbig-endian
+- -mfpu=vfpv3-d16
+- -mfloat-abi=hard
+default-by-variant: []
+description: |
+ ABI flags
+enabled-by: true
+links: []
+name: ABI_FLAGS
+type: build
diff --git a/spec/build/bsps/arm/tms570/bspls3137hdk.yml b/spec/build/bsps/arm/tms570/bspls3137hdk.yml
new file mode 100644
index 0000000000..e2704a268d
--- /dev/null
+++ b/spec/build/bsps/arm/tms570/bspls3137hdk.yml
@@ -0,0 +1,21 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: tms570ls3137_hdk
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: tms570
+includes: []
+install: []
+links:
+- role: build-dependency
+ uid: grp
+- role: build-dependency
+ uid: ../../opto2
+- role: build-dependency
+ uid: ../../tstsmallmem
+source: []
+type: build
diff --git a/spec/build/bsps/arm/tms570/bspls3137hdkintram.yml b/spec/build/bsps/arm/tms570/bspls3137hdkintram.yml
new file mode 100644
index 0000000000..77a21e861b
--- /dev/null
+++ b/spec/build/bsps/arm/tms570/bspls3137hdkintram.yml
@@ -0,0 +1,21 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: tms570ls3137_hdk_intram
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: tms570
+includes: []
+install: []
+links:
+- role: build-dependency
+ uid: grp
+- role: build-dependency
+ uid: tstls3137hdkintram
+- role: build-dependency
+ uid: ../../opto2
+source: []
+type: build
diff --git a/spec/build/bsps/arm/tms570/bspls3137hdksdram.yml b/spec/build/bsps/arm/tms570/bspls3137hdksdram.yml
new file mode 100644
index 0000000000..8ffb5294d2
--- /dev/null
+++ b/spec/build/bsps/arm/tms570/bspls3137hdksdram.yml
@@ -0,0 +1,19 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: tms570ls3137_hdk_sdram
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: tms570
+includes: []
+install: []
+links:
+- role: build-dependency
+ uid: grp
+- role: build-dependency
+ uid: ../../opto2
+source: []
+type: build
diff --git a/spec/build/bsps/arm/tms570/bspls3137hdkwithloader.yml b/spec/build/bsps/arm/tms570/bspls3137hdkwithloader.yml
new file mode 100644
index 0000000000..f8e8cb81bb
--- /dev/null
+++ b/spec/build/bsps/arm/tms570/bspls3137hdkwithloader.yml
@@ -0,0 +1,21 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: tms570ls3137_hdk_with_loader
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: tms570
+includes: []
+install: []
+links:
+- role: build-dependency
+ uid: grp
+- role: build-dependency
+ uid: ../../opto2
+- role: build-dependency
+ uid: ../../tstsmallmem
+source: []
+type: build
diff --git a/spec/build/bsps/arm/tms570/grp.yml b/spec/build/bsps/arm/tms570/grp.yml
new file mode 100644
index 0000000000..f7b84e2f57
--- /dev/null
+++ b/spec/build/bsps/arm/tms570/grp.yml
@@ -0,0 +1,48 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: group
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+enabled-by: true
+includes: []
+install: []
+ldflags: []
+links:
+- role: build-dependency
+ uid: ../grp
+- role: build-dependency
+ uid: ../start
+- role: build-dependency
+ uid: abi
+- role: build-dependency
+ uid: obj
+- role: build-dependency
+ uid: objhwinit
+- role: build-dependency
+ uid: optcclk
+- role: build-dependency
+ uid: optconirq
+- role: build-dependency
+ uid: optlowinit
+- role: build-dependency
+ uid: optmintskstksz
+- role: build-dependency
+ uid: optoscmain
+- role: build-dependency
+ uid: optoscrtc
+- role: build-dependency
+ uid: optreginit
+- role: build-dependency
+ uid: optscibaud
+- role: build-dependency
+ uid: opttms570ls3137
+- role: build-dependency
+ uid: ../../linkcmds
+- role: build-dependency
+ uid: ../../obj
+- role: build-dependency
+ uid: ../../objirq
+- role: build-dependency
+ uid: ../../bspopts
+type: build
+use-after: []
+use-before: []
diff --git a/spec/build/bsps/arm/tms570/obj.yml b/spec/build/bsps/arm/tms570/obj.yml
new file mode 100644
index 0000000000..8e5b665a78
--- /dev/null
+++ b/spec/build/bsps/arm/tms570/obj.yml
@@ -0,0 +1,100 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: objects
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+cxxflags: []
+enabled-by: true
+includes: []
+install:
+- destination: ${BSP_INCLUDEDIR}
+ source:
+ - bsps/arm/tms570/include/bsp.h
+ - bsps/arm/tms570/include/tm27.h
+- destination: ${BSP_INCLUDEDIR}/bsp
+ source:
+ - bsps/arm/tms570/include/bsp/irq.h
+ - bsps/arm/tms570/include/bsp/system-clocks.h
+ - bsps/arm/tms570/include/bsp/tms570-pinmux.h
+ - bsps/arm/tms570/include/bsp/tms570-pins.h
+ - bsps/arm/tms570/include/bsp/tms570-pom.h
+ - bsps/arm/tms570/include/bsp/tms570-rti.h
+ - bsps/arm/tms570/include/bsp/tms570-sci-driver.h
+ - bsps/arm/tms570/include/bsp/tms570-sci.h
+ - bsps/arm/tms570/include/bsp/tms570-vim.h
+ - bsps/arm/tms570/include/bsp/tms570.h
+ - bsps/arm/tms570/include/bsp/tms570_hwinit.h
+ - bsps/arm/tms570/include/bsp/tms570_selftest.h
+ - bsps/arm/tms570/include/bsp/tms570_selftest_parity.h
+ - bsps/arm/tms570/include/bsp/tms570lc4357-pins.h
+ - bsps/arm/tms570/include/bsp/tms570ls3137zwt-pins.h
+- destination: ${BSP_INCLUDEDIR}/bsp/ti/herc
+ source:
+ - bsps/arm/tms570/include/bsp/ti_herc/reg_adc.h
+ - bsps/arm/tms570/include/bsp/ti_herc/reg_ccmsr.h
+ - bsps/arm/tms570/include/bsp/ti_herc/reg_crc.h
+ - bsps/arm/tms570/include/bsp/ti_herc/reg_dcan.h
+ - bsps/arm/tms570/include/bsp/ti_herc/reg_dcc.h
+ - bsps/arm/tms570/include/bsp/ti_herc/reg_dma.h
+ - bsps/arm/tms570/include/bsp/ti_herc/reg_dmm.h
+ - bsps/arm/tms570/include/bsp/ti_herc/reg_efuse.h
+ - bsps/arm/tms570/include/bsp/ti_herc/reg_emacc.h
+ - bsps/arm/tms570/include/bsp/ti_herc/reg_emacm.h
+ - bsps/arm/tms570/include/bsp/ti_herc/reg_emif.h
+ - bsps/arm/tms570/include/bsp/ti_herc/reg_esm.h
+ - bsps/arm/tms570/include/bsp/ti_herc/reg_flash.h
+ - bsps/arm/tms570/include/bsp/ti_herc/reg_flex_ray.h
+ - bsps/arm/tms570/include/bsp/ti_herc/reg_gio.h
+ - bsps/arm/tms570/include/bsp/ti_herc/reg_htu.h
+ - bsps/arm/tms570/include/bsp/ti_herc/reg_i2c.h
+ - bsps/arm/tms570/include/bsp/ti_herc/reg_iomm.h
+ - bsps/arm/tms570/include/bsp/ti_herc/reg_lin.h
+ - bsps/arm/tms570/include/bsp/ti_herc/reg_mdio.h
+ - bsps/arm/tms570/include/bsp/ti_herc/reg_n2het.h
+ - bsps/arm/tms570/include/bsp/ti_herc/reg_pbist.h
+ - bsps/arm/tms570/include/bsp/ti_herc/reg_pcr.h
+ - bsps/arm/tms570/include/bsp/ti_herc/reg_pll.h
+ - bsps/arm/tms570/include/bsp/ti_herc/reg_pmm.h
+ - bsps/arm/tms570/include/bsp/ti_herc/reg_pom.h
+ - bsps/arm/tms570/include/bsp/ti_herc/reg_rti.h
+ - bsps/arm/tms570/include/bsp/ti_herc/reg_rtp.h
+ - bsps/arm/tms570/include/bsp/ti_herc/reg_sci.h
+ - bsps/arm/tms570/include/bsp/ti_herc/reg_spi.h
+ - bsps/arm/tms570/include/bsp/ti_herc/reg_stc.h
+ - bsps/arm/tms570/include/bsp/ti_herc/reg_sys.h
+ - bsps/arm/tms570/include/bsp/ti_herc/reg_sys2.h
+ - bsps/arm/tms570/include/bsp/ti_herc/reg_tcr.h
+ - bsps/arm/tms570/include/bsp/ti_herc/reg_tcram.h
+ - bsps/arm/tms570/include/bsp/ti_herc/reg_vim.h
+- destination: ${BSP_LIBDIR}
+ source:
+ - bsps/arm/tms570/start/linkcmds.tms570ls3137_hdk
+ - bsps/arm/tms570/start/linkcmds.tms570ls3137_hdk_intram
+ - bsps/arm/tms570/start/linkcmds.tms570ls3137_hdk_sdram
+ - bsps/arm/tms570/start/linkcmds.tms570ls3137_hdk_with_loader
+links: []
+source:
+- bsps/arm/shared/cp15/arm-cp15-set-exception-handler.c
+- bsps/arm/shared/cp15/arm-cp15-set-ttb-entries.c
+- bsps/arm/shared/start/bsp-start-memcpy.S
+- bsps/arm/tms570/clock/clock.c
+- bsps/arm/tms570/console/printk-support.c
+- bsps/arm/tms570/console/tms570-sci.c
+- bsps/arm/tms570/cpucounter/cpucounterread.c
+- bsps/arm/tms570/irq/irq.c
+- bsps/arm/tms570/start/bspreset.c
+- bsps/arm/tms570/start/bspstart.c
+- bsps/arm/tms570/start/bspstarthooks.c
+- bsps/arm/tms570/start/pinmux.c
+- bsps/arm/tms570/start/tms570-pom.c
+- bsps/shared/cache/nocache.c
+- bsps/shared/dev/btimer/btimer-cpucounter.c
+- bsps/shared/dev/getentropy/getentropy-cpucounter.c
+- bsps/shared/dev/serial/console-termios.c
+- bsps/shared/irq/irq-default-handler.c
+- bsps/shared/start/bspfatal-default.c
+- bsps/shared/start/bspgetworkarea-default.c
+- bsps/shared/start/sbrk.c
+- bsps/shared/start/stackalloc.c
+type: build
diff --git a/spec/build/bsps/arm/tms570/objhwinit.yml b/spec/build/bsps/arm/tms570/objhwinit.yml
new file mode 100644
index 0000000000..04241dffc9
--- /dev/null
+++ b/spec/build/bsps/arm/tms570/objhwinit.yml
@@ -0,0 +1,27 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: objects
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+cxxflags: []
+enabled-by:
+- TMS570_USE_HWINIT_STARTUP
+includes: []
+install: []
+links: []
+source:
+- bsps/arm/tms570/start/bspstarthooks-hwinit.c
+- bsps/arm/tms570/start/fail_notification.c
+- bsps/arm/tms570/start/init_emif_sdram.c
+- bsps/arm/tms570/start/init_esm.c
+- bsps/arm/tms570/start/init_pinmux.c
+- bsps/arm/tms570/start/init_system.c
+- bsps/arm/tms570/start/tms570_selftest.c
+- bsps/arm/tms570/start/tms570_selftest_par_can.c
+- bsps/arm/tms570/start/tms570_selftest_par_mibspi.c
+- bsps/arm/tms570/start/tms570_selftest_par_std.c
+- bsps/arm/tms570/start/tms570_selftest_parity.c
+- bsps/arm/tms570/start/tms570_sys_core.S
+- bsps/arm/tms570/start/tms570_tcram_tests.c
+type: build
diff --git a/spec/build/bsps/arm/tms570/optcclk.yml b/spec/build/bsps/arm/tms570/optcclk.yml
new file mode 100644
index 0000000000..674ec1ac86
--- /dev/null
+++ b/spec/build/bsps/arm/tms570/optcclk.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 96000000
+default-by-variant: []
+description: |
+ CPU clock in Hz
+enabled-by: true
+format: '{}'
+links: []
+name: TMS570_CCLK
+type: build
diff --git a/spec/build/bsps/arm/tms570/optconirq.yml b/spec/build/bsps/arm/tms570/optconirq.yml
new file mode 100644
index 0000000000..3e3dc5a836
--- /dev/null
+++ b/spec/build/bsps/arm/tms570/optconirq.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 1
+default-by-variant: []
+description: |
+ The tms570 console driver can operate in either polled or interrupt mode.
+enabled-by: true
+format: '{}'
+links: []
+name: CONSOLE_USE_INTERRUPTS
+type: build
diff --git a/spec/build/bsps/arm/tms570/optlowinit.yml b/spec/build/bsps/arm/tms570/optlowinit.yml
new file mode 100644
index 0000000000..d889dd2573
--- /dev/null
+++ b/spec/build/bsps/arm/tms570/optlowinit.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+- env-enable: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant: []
+description: |
+ Include BSP startup code for TMS570LS3137 which allows to start RTEMS application directly after reset
+enabled-by: true
+links: []
+name: TMS570_USE_HWINIT_STARTUP
+type: build
diff --git a/spec/build/bsps/arm/tms570/optmintskstksz.yml b/spec/build/bsps/arm/tms570/optmintskstksz.yml
new file mode 100644
index 0000000000..57e77ae551
--- /dev/null
+++ b/spec/build/bsps/arm/tms570/optmintskstksz.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 1024
+default-by-variant: []
+description: |
+ Suggested minimum task stack size in bytes
+enabled-by: true
+format: '{}'
+links: []
+name: BSP_MINIMUM_TASK_STACK_SIZE
+type: build
diff --git a/spec/build/bsps/arm/tms570/optoscmain.yml b/spec/build/bsps/arm/tms570/optoscmain.yml
new file mode 100644
index 0000000000..8ebd6bb82d
--- /dev/null
+++ b/spec/build/bsps/arm/tms570/optoscmain.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 12000000
+default-by-variant: []
+description: |
+ main oscillator frequency in Hz
+enabled-by: true
+format: '{}'
+links: []
+name: TMS570_OSCILLATOR_MAIN
+type: build
diff --git a/spec/build/bsps/arm/tms570/optoscrtc.yml b/spec/build/bsps/arm/tms570/optoscrtc.yml
new file mode 100644
index 0000000000..8e14cbf9a8
--- /dev/null
+++ b/spec/build/bsps/arm/tms570/optoscrtc.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 32768
+default-by-variant: []
+description: |
+ RTC oscillator frequency in Hz
+enabled-by: true
+format: '{}'
+links: []
+name: TMS570_OSCILLATOR_RTC
+type: build
diff --git a/spec/build/bsps/arm/tms570/optreginit.yml b/spec/build/bsps/arm/tms570/optreginit.yml
new file mode 100644
index 0000000000..3f7e9f2bf2
--- /dev/null
+++ b/spec/build/bsps/arm/tms570/optreginit.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+ The TMS570 needs to have the registers of its CPU initialized to avoid CCMR4F errors
+enabled-by: true
+links: []
+name: BSP_START_NEEDS_REGISTER_INITIALIZATION
+type: build
diff --git a/spec/build/bsps/arm/tms570/optscibaud.yml b/spec/build/bsps/arm/tms570/optscibaud.yml
new file mode 100644
index 0000000000..e4eedd871b
--- /dev/null
+++ b/spec/build/bsps/arm/tms570/optscibaud.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 115200
+default-by-variant: []
+description: |
+ baud for UARTs
+enabled-by: true
+format: '{}'
+links: []
+name: TMS570_SCI_BAUD_RATE
+type: build
diff --git a/spec/build/bsps/arm/tms570/opttms570ls3137.yml b/spec/build/bsps/arm/tms570/opttms570ls3137.yml
new file mode 100644
index 0000000000..344f209ca1
--- /dev/null
+++ b/spec/build/bsps/arm/tms570/opttms570ls3137.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant: []
+description: |
+ target used for identify TMS570LS3137 board
+enabled-by: true
+links: []
+name: ARM_TMS570LS3137
+type: build
diff --git a/spec/build/bsps/arm/tms570/tstls3137hdkintram.yml b/spec/build/bsps/arm/tms570/tstls3137hdkintram.yml
new file mode 100644
index 0000000000..c9271afdd0
--- /dev/null
+++ b/spec/build/bsps/arm/tms570/tstls3137hdkintram.yml
@@ -0,0 +1,23 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- set-test-state:
+ fileio: exclude
+ ftp01: exclude
+ iostream: exclude
+ loopback: exclude
+ mghttpd01: exclude
+ monitor02: exclude
+ pppd: exclude
+ syscall01: exclude
+ utf8proc01: exclude
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: null
+default-by-variant: []
+description: ''
+enabled-by: true
+links:
+- role: build-dependency
+ uid: ../../tstsmallmem
+type: build
diff --git a/spec/build/bsps/arm/xen/abi.yml b/spec/build/bsps/arm/xen/abi.yml
new file mode 100644
index 0000000000..ed581d94f4
--- /dev/null
+++ b/spec/build/bsps/arm/xen/abi.yml
@@ -0,0 +1,20 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-string: null
+- split: null
+- env-append: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default:
+- -march=armv7-a
+- -mthumb
+- -mfpu=neon
+- -mfloat-abi=hard
+default-by-variant: []
+description: |
+ ABI flags
+enabled-by: true
+links: []
+name: ABI_FLAGS
+type: build
diff --git a/spec/build/bsps/arm/xen/bspxen.yml b/spec/build/bsps/arm/xen/bspxen.yml
new file mode 100644
index 0000000000..e469170e34
--- /dev/null
+++ b/spec/build/bsps/arm/xen/bspxen.yml
@@ -0,0 +1,78 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: xen_virtual
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: xen
+includes: []
+install:
+- destination: ${BSP_INCLUDEDIR}
+ source:
+ - bsps/arm/xen/include/bsp.h
+ - bsps/arm/xen/include/tm27.h
+- destination: ${BSP_INCLUDEDIR}/bsp
+ source:
+ - bsps/arm/xen/include/bsp/irq.h
+links:
+- role: build-dependency
+ uid: ../grp
+- role: build-dependency
+ uid: ../start
+- role: build-dependency
+ uid: abi
+- role: build-dependency
+ uid: optgentmrusevirt
+- role: build-dependency
+ uid: optgentmunmask
+- role: build-dependency
+ uid: optloadoff
+- role: build-dependency
+ uid: ../optmmusz
+- role: build-dependency
+ uid: optnocachelen
+- role: build-dependency
+ uid: optramlen
+- role: build-dependency
+ uid: optramori
+- role: build-dependency
+ uid: optzimghdr
+- role: build-dependency
+ uid: ../../obj
+- role: build-dependency
+ uid: ../../objirq
+- role: build-dependency
+ uid: ../../optcachedata
+- role: build-dependency
+ uid: ../../optcacheinst
+- role: build-dependency
+ uid: ../../opto2
+- role: build-dependency
+ uid: linkcmds
+- role: build-dependency
+ uid: ../../bspopts
+source:
+- bsps/arm/shared/cache/cache-cp15.c
+- bsps/arm/shared/clock/clock-generic-timer.c
+- bsps/arm/shared/cp15/arm-cp15-set-exception-handler.c
+- bsps/arm/shared/cp15/arm-cp15-set-ttb-entries.c
+- bsps/arm/shared/irq/irq-gic.c
+- bsps/arm/shared/serial/arm-pl011.c
+- bsps/arm/shared/start/bsp-start-memcpy.S
+- bsps/arm/xen/console/console.c
+- bsps/arm/xen/start/bspstart.c
+- bsps/arm/xen/start/bspstarthooks.c
+- bsps/arm/xen/start/bspstartmmu.c
+- bsps/shared/dev/btimer/btimer-stub.c
+- bsps/shared/dev/getentropy/getentropy-cpucounter.c
+- bsps/shared/dev/serial/console-termios-init.c
+- bsps/shared/dev/serial/console-termios.c
+- bsps/shared/irq/irq-default-handler.c
+- bsps/shared/start/bspfatal-default.c
+- bsps/shared/start/bspgetworkarea-default.c
+- bsps/shared/start/bspreset-empty.c
+- bsps/shared/start/sbrk.c
+type: build
diff --git a/spec/build/bsps/arm/xen/linkcmds.yml b/spec/build/bsps/arm/xen/linkcmds.yml
new file mode 100644
index 0000000000..ab36af512b
--- /dev/null
+++ b/spec/build/bsps/arm/xen/linkcmds.yml
@@ -0,0 +1,72 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: config-file
+content: |
+ /*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (C) 2019 DornerWorks
+ * Written by Jeff Kubascik <jeff.kubascik@dornerworks.com>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+ MEMORY {
+ RAM_MMU : ORIGIN = ${BSP_XEN_RAM_BASE}, LENGTH = ${ARM_MMU_TRANSLATION_TABLE_SIZE}
+ RAM : ORIGIN = ${BSP_XEN_RAM_BASE} + ${BSP_XEN_LOAD_OFFSET}, LENGTH = ${BSP_XEN_RAM_LENGTH} - ${BSP_XEN_LOAD_OFFSET} - ${BSP_XEN_NOCACHE_LENGTH}
+ NOCACHE : ORIGIN = ${BSP_XEN_RAM_BASE} + ${BSP_XEN_RAM_LENGTH} - ${BSP_XEN_NOCACHE_LENGTH}, LENGTH = ${BSP_XEN_NOCACHE_LENGTH}
+ }
+
+ REGION_ALIAS ("REGION_START", RAM);
+ REGION_ALIAS ("REGION_VECTOR", RAM);
+ REGION_ALIAS ("REGION_TEXT", RAM);
+ REGION_ALIAS ("REGION_TEXT_LOAD", RAM);
+ REGION_ALIAS ("REGION_RODATA", RAM);
+ REGION_ALIAS ("REGION_RODATA_LOAD", RAM);
+ REGION_ALIAS ("REGION_DATA", RAM);
+ REGION_ALIAS ("REGION_DATA_LOAD", RAM);
+ REGION_ALIAS ("REGION_FAST_TEXT", RAM);
+ REGION_ALIAS ("REGION_FAST_TEXT_LOAD", RAM);
+ REGION_ALIAS ("REGION_FAST_DATA", RAM);
+ REGION_ALIAS ("REGION_FAST_DATA_LOAD", RAM);
+ REGION_ALIAS ("REGION_BSS", RAM);
+ REGION_ALIAS ("REGION_WORK", RAM);
+ REGION_ALIAS ("REGION_STACK", RAM);
+ REGION_ALIAS ("REGION_NOCACHE", NOCACHE);
+ REGION_ALIAS ("REGION_NOCACHE_LOAD", NOCACHE);
+
+ bsp_stack_abt_size = DEFINED (bsp_stack_abt_size) ? bsp_stack_abt_size : 1024;
+
+ bsp_section_rwbarrier_align = DEFINED (bsp_section_rwbarrier_align) ? bsp_section_rwbarrier_align : 1M;
+
+ bsp_vector_table_in_start_section = 1;
+
+ bsp_translation_table_base = ORIGIN (RAM_MMU);
+ bsp_translation_table_end = ORIGIN (RAM_MMU) + LENGTH (RAM_MMU);
+
+ INCLUDE linkcmds.armv4
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+enabled-by: true
+install-path: ${BSP_LIBDIR}
+links: []
+target: linkcmds
+type: build
diff --git a/spec/build/bsps/arm/xen/optgentmrusevirt.yml b/spec/build/bsps/arm/xen/optgentmrusevirt.yml
new file mode 100644
index 0000000000..cfcc9e86d3
--- /dev/null
+++ b/spec/build/bsps/arm/xen/optgentmrusevirt.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+ use virtual ARM generic timer
+enabled-by: true
+links: []
+name: ARM_GENERIC_TIMER_USE_VIRTUAL
+type: build
diff --git a/spec/build/bsps/arm/xen/optgentmunmask.yml b/spec/build/bsps/arm/xen/optgentmunmask.yml
new file mode 100644
index 0000000000..1e7c523f15
--- /dev/null
+++ b/spec/build/bsps/arm/xen/optgentmunmask.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+ unmask the timer in the tick handler, since Xen will mask the virtual timer before injecting the interrupt to the guest
+enabled-by: true
+links: []
+name: ARM_GENERIC_TIMER_UNMASK_AT_TICK
+type: build
diff --git a/spec/build/bsps/arm/xen/optloadoff.yml b/spec/build/bsps/arm/xen/optloadoff.yml
new file mode 100644
index 0000000000..4589807f88
--- /dev/null
+++ b/spec/build/bsps/arm/xen/optloadoff.yml
@@ -0,0 +1,18 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- assert-uint32: null
+- env-assign: null
+- format-and-define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 32768
+default-by-variant: []
+description: |
+ offset of RAM region from memory area base
+enabled-by: true
+format: '{:#010x}'
+links: []
+name: BSP_XEN_LOAD_OFFSET
+type: build
diff --git a/spec/build/bsps/arm/xen/optnocachelen.yml b/spec/build/bsps/arm/xen/optnocachelen.yml
new file mode 100644
index 0000000000..389fbb596b
--- /dev/null
+++ b/spec/build/bsps/arm/xen/optnocachelen.yml
@@ -0,0 +1,18 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- assert-uint32: null
+- env-assign: null
+- format-and-define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 1048576
+default-by-variant: []
+description: |
+ length of nocache RAM region
+enabled-by: true
+format: '{:#010x}'
+links: []
+name: BSP_XEN_NOCACHE_LENGTH
+type: build
diff --git a/spec/build/bsps/arm/xen/optramlen.yml b/spec/build/bsps/arm/xen/optramlen.yml
new file mode 100644
index 0000000000..1d1b43615a
--- /dev/null
+++ b/spec/build/bsps/arm/xen/optramlen.yml
@@ -0,0 +1,18 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- assert-uint32: null
+- env-assign: null
+- format-and-define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 8388608
+default-by-variant: []
+description: |
+ length of memory area available to the BSP
+enabled-by: true
+format: '{:#010x}'
+links: []
+name: BSP_XEN_RAM_LENGTH
+type: build
diff --git a/spec/build/bsps/arm/xen/optramori.yml b/spec/build/bsps/arm/xen/optramori.yml
new file mode 100644
index 0000000000..95fbf64079
--- /dev/null
+++ b/spec/build/bsps/arm/xen/optramori.yml
@@ -0,0 +1,18 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- assert-uint32: null
+- env-assign: null
+- format-and-define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 1073741824
+default-by-variant: []
+description: |
+ base address of memory area available to the BSP
+enabled-by: true
+format: '{:#010x}'
+links: []
+name: BSP_XEN_RAM_BASE
+type: build
diff --git a/spec/build/bsps/arm/xen/optzimghdr.yml b/spec/build/bsps/arm/xen/optzimghdr.yml
new file mode 100644
index 0000000000..56aa00c8b1
--- /dev/null
+++ b/spec/build/bsps/arm/xen/optzimghdr.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+ include zImage boot header
+enabled-by: true
+links: []
+name: BSP_START_ZIMAGE_HEADER
+type: build
diff --git a/spec/build/bsps/arm/xilinx-zynq/abi.yml b/spec/build/bsps/arm/xilinx-zynq/abi.yml
new file mode 100644
index 0000000000..a3a710c97d
--- /dev/null
+++ b/spec/build/bsps/arm/xilinx-zynq/abi.yml
@@ -0,0 +1,21 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-string: null
+- split: null
+- env-append: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default:
+- -march=armv7-a
+- -mthumb
+- -mfpu=neon
+- -mfloat-abi=hard
+- -mtune=cortex-a9
+default-by-variant: []
+description: |
+ ABI flags
+enabled-by: true
+links: []
+name: ABI_FLAGS
+type: build
diff --git a/spec/build/bsps/arm/xilinx-zynq/bspqemu.yml b/spec/build/bsps/arm/xilinx-zynq/bspqemu.yml
new file mode 100644
index 0000000000..a8f59548d9
--- /dev/null
+++ b/spec/build/bsps/arm/xilinx-zynq/bspqemu.yml
@@ -0,0 +1,19 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: xilinx_zynq_a9_qemu
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: xilinx-zynq
+includes: []
+install: []
+links:
+- role: build-dependency
+ uid: grp
+- role: build-dependency
+ uid: ../../opto2
+source: []
+type: build
diff --git a/spec/build/bsps/arm/xilinx-zynq/bspzc702.yml b/spec/build/bsps/arm/xilinx-zynq/bspzc702.yml
new file mode 100644
index 0000000000..683c2c7b8c
--- /dev/null
+++ b/spec/build/bsps/arm/xilinx-zynq/bspzc702.yml
@@ -0,0 +1,19 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: xilinx_zynq_zc702
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: xilinx-zynq
+includes: []
+install: []
+links:
+- role: build-dependency
+ uid: grp
+- role: build-dependency
+ uid: ../../opto2
+source: []
+type: build
diff --git a/spec/build/bsps/arm/xilinx-zynq/bspzc706.yml b/spec/build/bsps/arm/xilinx-zynq/bspzc706.yml
new file mode 100644
index 0000000000..eca7aaf46c
--- /dev/null
+++ b/spec/build/bsps/arm/xilinx-zynq/bspzc706.yml
@@ -0,0 +1,19 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: xilinx_zynq_zc706
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: xilinx-zynq
+includes: []
+install: []
+links:
+- role: build-dependency
+ uid: grp
+- role: build-dependency
+ uid: ../../opto2
+source: []
+type: build
diff --git a/spec/build/bsps/arm/xilinx-zynq/bspzedboard.yml b/spec/build/bsps/arm/xilinx-zynq/bspzedboard.yml
new file mode 100644
index 0000000000..ba285c1b80
--- /dev/null
+++ b/spec/build/bsps/arm/xilinx-zynq/bspzedboard.yml
@@ -0,0 +1,19 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: xilinx_zynq_zedboard
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: xilinx-zynq
+includes: []
+install: []
+links:
+- role: build-dependency
+ uid: grp
+- role: build-dependency
+ uid: ../../opto2
+source: []
+type: build
diff --git a/spec/build/bsps/arm/xilinx-zynq/grp.yml b/spec/build/bsps/arm/xilinx-zynq/grp.yml
new file mode 100644
index 0000000000..264308e6ad
--- /dev/null
+++ b/spec/build/bsps/arm/xilinx-zynq/grp.yml
@@ -0,0 +1,64 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: group
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+enabled-by: true
+includes: []
+install: []
+ldflags: []
+links:
+- role: build-dependency
+ uid: ../grp
+- role: build-dependency
+ uid: ../start
+- role: build-dependency
+ uid: abi
+- role: build-dependency
+ uid: obj
+- role: build-dependency
+ uid: objsmp
+- role: build-dependency
+ uid: opta9periphclk
+- role: build-dependency
+ uid: optcachedata
+- role: build-dependency
+ uid: optcacheinst
+- role: build-dependency
+ uid: optclkcpu1x
+- role: build-dependency
+ uid: optclkfastidle
+- role: build-dependency
+ uid: optclkuart
+- role: build-dependency
+ uid: optconirq
+- role: build-dependency
+ uid: optconminor
+- role: build-dependency
+ uid: optint0len
+- role: build-dependency
+ uid: optint0ori
+- role: build-dependency
+ uid: optint1len
+- role: build-dependency
+ uid: optint1ori
+- role: build-dependency
+ uid: ../optmmusz
+- role: build-dependency
+ uid: optnocachelen
+- role: build-dependency
+ uid: optramlen
+- role: build-dependency
+ uid: optramori
+- role: build-dependency
+ uid: optresetvec
+- role: build-dependency
+ uid: ../../obj
+- role: build-dependency
+ uid: ../../objirq
+- role: build-dependency
+ uid: linkcmds
+- role: build-dependency
+ uid: ../../bspopts
+type: build
+use-after: []
+use-before: []
diff --git a/spec/build/bsps/arm/xilinx-zynq/linkcmds.yml b/spec/build/bsps/arm/xilinx-zynq/linkcmds.yml
new file mode 100644
index 0000000000..d7c0934f78
--- /dev/null
+++ b/spec/build/bsps/arm/xilinx-zynq/linkcmds.yml
@@ -0,0 +1,46 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: config-file
+content: |
+ MEMORY {
+ RAM_INT_0 : ORIGIN = ${ZYNQ_RAM_INT_0_ORIGIN:#010x}, LENGTH = ${ZYNQ_RAM_INT_0_LENGTH:#010x}
+ RAM_INT_1 : ORIGIN = ${ZYNQ_RAM_INT_1_ORIGIN:#010x}, LENGTH = ${ZYNQ_RAM_INT_1_LENGTH:#010x}
+ RAM_MMU : ORIGIN = ${ZYNQ_RAM_ORIGIN:#010x}, LENGTH = ${ARM_MMU_TRANSLATION_TABLE_SIZE:#010x}
+ RAM : ORIGIN = ${ZYNQ_RAM_ORIGIN:#010x} + ${ARM_MMU_TRANSLATION_TABLE_SIZE:#010x}, LENGTH = ${ZYNQ_RAM_LENGTH:#010x} - ${ZYNQ_RAM_ORIGIN:#010x} - ${ARM_MMU_TRANSLATION_TABLE_SIZE:#010x} - ${ZYNQ_RAM_NOCACHE_LENGTH:#010x}
+ NOCACHE : ORIGIN = ${ZYNQ_RAM_LENGTH:#010x} - ${ZYNQ_RAM_NOCACHE_LENGTH:#010x}, LENGTH = ${ZYNQ_RAM_NOCACHE_LENGTH:#010x}
+ }
+
+ REGION_ALIAS ("REGION_START", RAM);
+ REGION_ALIAS ("REGION_VECTOR", RAM);
+ REGION_ALIAS ("REGION_TEXT", RAM);
+ REGION_ALIAS ("REGION_TEXT_LOAD", RAM);
+ REGION_ALIAS ("REGION_RODATA", RAM);
+ REGION_ALIAS ("REGION_RODATA_LOAD", RAM);
+ REGION_ALIAS ("REGION_DATA", RAM);
+ REGION_ALIAS ("REGION_DATA_LOAD", RAM);
+ REGION_ALIAS ("REGION_FAST_TEXT", RAM);
+ REGION_ALIAS ("REGION_FAST_TEXT_LOAD", RAM);
+ REGION_ALIAS ("REGION_FAST_DATA", RAM);
+ REGION_ALIAS ("REGION_FAST_DATA_LOAD", RAM);
+ REGION_ALIAS ("REGION_BSS", RAM);
+ REGION_ALIAS ("REGION_WORK", RAM);
+ REGION_ALIAS ("REGION_STACK", RAM);
+ REGION_ALIAS ("REGION_NOCACHE", NOCACHE);
+ REGION_ALIAS ("REGION_NOCACHE_LOAD", NOCACHE);
+
+ bsp_stack_abt_size = DEFINED (bsp_stack_abt_size) ? bsp_stack_abt_size : 1024;
+
+ bsp_section_rwbarrier_align = DEFINED (bsp_section_rwbarrier_align) ? bsp_section_rwbarrier_align : 1M;
+
+ bsp_vector_table_in_start_section = 1;
+
+ bsp_translation_table_base = ORIGIN (RAM_MMU);
+ bsp_translation_table_end = ORIGIN (RAM_MMU) + LENGTH (RAM_MMU);
+
+ INCLUDE linkcmds.armv4
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+enabled-by: true
+install-path: ${BSP_LIBDIR}
+links: []
+target: linkcmds
+type: build
diff --git a/spec/build/bsps/arm/xilinx-zynq/obj.yml b/spec/build/bsps/arm/xilinx-zynq/obj.yml
new file mode 100644
index 0000000000..6f7f8ab39a
--- /dev/null
+++ b/spec/build/bsps/arm/xilinx-zynq/obj.yml
@@ -0,0 +1,47 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: objects
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+cxxflags: []
+enabled-by: true
+includes: []
+install:
+- destination: ${BSP_INCLUDEDIR}
+ source:
+ - bsps/arm/xilinx-zynq/include/bsp.h
+ - bsps/arm/xilinx-zynq/include/tm27.h
+- destination: ${BSP_INCLUDEDIR}/bsp
+ source:
+ - bsps/arm/xilinx-zynq/include/bsp/cadence-i2c-regs.h
+ - bsps/arm/xilinx-zynq/include/bsp/cadence-i2c.h
+ - bsps/arm/xilinx-zynq/include/bsp/i2c.h
+ - bsps/arm/xilinx-zynq/include/bsp/irq.h
+links: []
+source:
+- bsps/arm/shared/cache/cache-l2c-310.c
+- bsps/arm/shared/clock/clock-a9mpcore.c
+- bsps/arm/shared/cp15/arm-cp15-set-exception-handler.c
+- bsps/arm/shared/cp15/arm-cp15-set-ttb-entries.c
+- bsps/arm/shared/irq/irq-gic.c
+- bsps/arm/shared/serial/zynq-uart.c
+- bsps/arm/shared/serial/zynq-uart-polled.c
+- bsps/arm/shared/start/bsp-start-memcpy.S
+- bsps/arm/xilinx-zynq/console/console-config.c
+- bsps/arm/xilinx-zynq/console/console-init.c
+- bsps/arm/xilinx-zynq/console/debug-console.c
+- bsps/arm/xilinx-zynq/i2c/cadence-i2c.c
+- bsps/arm/xilinx-zynq/start/bspreset.c
+- bsps/arm/xilinx-zynq/start/bspstart.c
+- bsps/arm/xilinx-zynq/start/bspstarthooks.c
+- bsps/arm/xilinx-zynq/start/bspstartmmu.c
+- bsps/shared/dev/btimer/btimer-stub.c
+- bsps/shared/dev/getentropy/getentropy-cpucounter.c
+- bsps/shared/dev/serial/console-termios.c
+- bsps/shared/irq/irq-default-handler.c
+- bsps/shared/start/bspfatal-default.c
+- bsps/shared/start/bspgetworkarea-default.c
+- bsps/shared/start/sbrk.c
+- bsps/shared/start/stackalloc.c
+type: build
diff --git a/spec/build/bsps/arm/xilinx-zynq/objsmp.yml b/spec/build/bsps/arm/xilinx-zynq/objsmp.yml
new file mode 100644
index 0000000000..587884f6a3
--- /dev/null
+++ b/spec/build/bsps/arm/xilinx-zynq/objsmp.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: objects
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+cxxflags: []
+enabled-by:
+- RTEMS_SMP
+includes: []
+install: []
+links: []
+source:
+- bsps/arm/shared/start/arm-a9mpcore-smp.c
+- bsps/arm/xilinx-zynq/start/bspsmp.c
+type: build
diff --git a/spec/build/bsps/arm/xilinx-zynq/opta9periphclk.yml b/spec/build/bsps/arm/xilinx-zynq/opta9periphclk.yml
new file mode 100644
index 0000000000..0b10b47bc2
--- /dev/null
+++ b/spec/build/bsps/arm/xilinx-zynq/opta9periphclk.yml
@@ -0,0 +1,22 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 100000000
+default-by-variant:
+- value: 333333333
+ variants:
+ - arm/xilinx_zynq_zc702.*
+- value: 666666667
+ variants:
+ - arm/xilinx_zynq_zedboard.*
+description: |
+ ARM Cortex-A9 MPCore PERIPHCLK clock frequency in Hz
+enabled-by: true
+format: '{}'
+links: []
+name: BSP_ARM_A9MPCORE_PERIPHCLK
+type: build
diff --git a/spec/build/bsps/arm/xilinx-zynq/optcachedata.yml b/spec/build/bsps/arm/xilinx-zynq/optcachedata.yml
new file mode 100644
index 0000000000..1664b0fc31
--- /dev/null
+++ b/spec/build/bsps/arm/xilinx-zynq/optcachedata.yml
@@ -0,0 +1,18 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant:
+- value: false
+ variants:
+ - arm/.*qemu
+description: |
+ enable data cache
+enabled-by: true
+links: []
+name: BSP_DATA_CACHE_ENABLED
+type: build
diff --git a/spec/build/bsps/arm/xilinx-zynq/optcacheinst.yml b/spec/build/bsps/arm/xilinx-zynq/optcacheinst.yml
new file mode 100644
index 0000000000..b191133af9
--- /dev/null
+++ b/spec/build/bsps/arm/xilinx-zynq/optcacheinst.yml
@@ -0,0 +1,18 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant:
+- value: false
+ variants:
+ - arm/.*qemu
+description: |
+ enable instruction cache
+enabled-by: true
+links: []
+name: BSP_INSTRUCTION_CACHE_ENABLED
+type: build
diff --git a/spec/build/bsps/arm/xilinx-zynq/optclkcpu1x.yml b/spec/build/bsps/arm/xilinx-zynq/optclkcpu1x.yml
new file mode 100644
index 0000000000..1f93f52a8a
--- /dev/null
+++ b/spec/build/bsps/arm/xilinx-zynq/optclkcpu1x.yml
@@ -0,0 +1,22 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 111111111
+default-by-variant:
+- value: 111111111
+ variants:
+ - arm/xilinx_zynq_zc702.*
+- value: 111111111
+ variants:
+ - arm/xilinx_zynq_zedboard.*
+description: |
+ Zynq cpu_1x clock frequency in Hz
+enabled-by: true
+format: '{}'
+links: []
+name: ZYNQ_CLOCK_CPU_1X
+type: build
diff --git a/spec/build/bsps/arm/xilinx-zynq/optclkfastidle.yml b/spec/build/bsps/arm/xilinx-zynq/optclkfastidle.yml
new file mode 100644
index 0000000000..b800b20428
--- /dev/null
+++ b/spec/build/bsps/arm/xilinx-zynq/optclkfastidle.yml
@@ -0,0 +1,18 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant:
+- value: true
+ variants:
+ - arm/.*qemu
+description: |
+ This sets a mode where the time runs as fast as possible when a clock ISR occurs while the IDLE thread is executing. This can significantly reduce simulation times.
+enabled-by: true
+links: []
+name: CLOCK_DRIVER_USE_FAST_IDLE
+type: build
diff --git a/spec/build/bsps/arm/xilinx-zynq/optclkuart.yml b/spec/build/bsps/arm/xilinx-zynq/optclkuart.yml
new file mode 100644
index 0000000000..7d69273eb2
--- /dev/null
+++ b/spec/build/bsps/arm/xilinx-zynq/optclkuart.yml
@@ -0,0 +1,22 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 50000000
+default-by-variant:
+- value: 50000000
+ variants:
+ - arm/xilinx_zynq_zc702.*
+- value: 50000000
+ variants:
+ - arm/xilinx_zynq_zedboard.*
+description: |
+ Zynq UART clock frequency in Hz
+enabled-by: true
+format: '{}'
+links: []
+name: ZYNQ_CLOCK_UART
+type: build
diff --git a/spec/build/bsps/arm/xilinx-zynq/optconirq.yml b/spec/build/bsps/arm/xilinx-zynq/optconirq.yml
new file mode 100644
index 0000000000..ecb91d81a3
--- /dev/null
+++ b/spec/build/bsps/arm/xilinx-zynq/optconirq.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+ use interrupt driven mode for console devices (used by default)
+enabled-by: true
+links: []
+name: ZYNQ_CONSOLE_USE_INTERRUPTS
+type: build
diff --git a/spec/build/bsps/arm/xilinx-zynq/optconminor.yml b/spec/build/bsps/arm/xilinx-zynq/optconminor.yml
new file mode 100644
index 0000000000..55074c6dac
--- /dev/null
+++ b/spec/build/bsps/arm/xilinx-zynq/optconminor.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+ minor number of console device
+enabled-by: true
+links: []
+name: BSP_CONSOLE_MINOR
+type: build
diff --git a/spec/build/bsps/arm/xilinx-zynq/optint0len.yml b/spec/build/bsps/arm/xilinx-zynq/optint0len.yml
new file mode 100644
index 0000000000..90d77daeb7
--- /dev/null
+++ b/spec/build/bsps/arm/xilinx-zynq/optint0len.yml
@@ -0,0 +1,17 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- assert-uint32: null
+- env-assign: null
+- format-and-define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 196608
+default-by-variant: []
+description: ''
+enabled-by: true
+format: '{:#010x}'
+links: []
+name: ZYNQ_RAM_INT_0_LENGTH
+type: build
diff --git a/spec/build/bsps/arm/xilinx-zynq/optint0ori.yml b/spec/build/bsps/arm/xilinx-zynq/optint0ori.yml
new file mode 100644
index 0000000000..a8c4514fd9
--- /dev/null
+++ b/spec/build/bsps/arm/xilinx-zynq/optint0ori.yml
@@ -0,0 +1,17 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- assert-uint32: null
+- env-assign: null
+- format-and-define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 0
+default-by-variant: []
+description: ''
+enabled-by: true
+format: '{:#010x}'
+links: []
+name: ZYNQ_RAM_INT_0_ORIGIN
+type: build
diff --git a/spec/build/bsps/arm/xilinx-zynq/optint1len.yml b/spec/build/bsps/arm/xilinx-zynq/optint1len.yml
new file mode 100644
index 0000000000..32a2c8f3d6
--- /dev/null
+++ b/spec/build/bsps/arm/xilinx-zynq/optint1len.yml
@@ -0,0 +1,17 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- assert-uint32: null
+- env-assign: null
+- format-and-define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 65024
+default-by-variant: []
+description: ''
+enabled-by: true
+format: '{:#010x}'
+links: []
+name: ZYNQ_RAM_INT_1_LENGTH
+type: build
diff --git a/spec/build/bsps/arm/xilinx-zynq/optint1ori.yml b/spec/build/bsps/arm/xilinx-zynq/optint1ori.yml
new file mode 100644
index 0000000000..f089c467c4
--- /dev/null
+++ b/spec/build/bsps/arm/xilinx-zynq/optint1ori.yml
@@ -0,0 +1,17 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- assert-uint32: null
+- env-assign: null
+- format-and-define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 4294901760
+default-by-variant: []
+description: ''
+enabled-by: true
+format: '{:#010x}'
+links: []
+name: ZYNQ_RAM_INT_1_ORIGIN
+type: build
diff --git a/spec/build/bsps/arm/xilinx-zynq/optnocachelen.yml b/spec/build/bsps/arm/xilinx-zynq/optnocachelen.yml
new file mode 100644
index 0000000000..7a553ab9a2
--- /dev/null
+++ b/spec/build/bsps/arm/xilinx-zynq/optnocachelen.yml
@@ -0,0 +1,18 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- assert-uint32: null
+- env-assign: null
+- format-and-define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 1048576
+default-by-variant: []
+description: |
+ length of nocache RAM region
+enabled-by: true
+format: '{:#010x}'
+links: []
+name: ZYNQ_RAM_NOCACHE_LENGTH
+type: build
diff --git a/spec/build/bsps/arm/xilinx-zynq/optramlen.yml b/spec/build/bsps/arm/xilinx-zynq/optramlen.yml
new file mode 100644
index 0000000000..e51d3ebf38
--- /dev/null
+++ b/spec/build/bsps/arm/xilinx-zynq/optramlen.yml
@@ -0,0 +1,30 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- assert-uint32: null
+- env-assign: null
+- format-and-define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 268435456
+default-by-variant:
+- value: 268435456
+ variants:
+ - arm/xilinx_zynq_a9_qemu
+- value: 1073741824
+ variants:
+ - arm/xilinx_zynq_zc702
+- value: 1073741824
+ variants:
+ - arm/xilinx_zynq_zc706
+- value: 536870912
+ variants:
+ - arm/xilinx_zynq_zedboard
+description: |
+ override a BSP's default RAM length
+enabled-by: true
+format: '{:#010x}'
+links: []
+name: ZYNQ_RAM_LENGTH
+type: build
diff --git a/spec/build/bsps/arm/xilinx-zynq/optramori.yml b/spec/build/bsps/arm/xilinx-zynq/optramori.yml
new file mode 100644
index 0000000000..5723b73d53
--- /dev/null
+++ b/spec/build/bsps/arm/xilinx-zynq/optramori.yml
@@ -0,0 +1,21 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- assert-uint32: null
+- assert-aligned: 1048576
+- env-assign: null
+- format-and-define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 1048576
+default-by-variant:
+- value: 4194304
+ variants:
+ - arm/xilinx_zynq_zc706
+description: ''
+enabled-by: true
+format: '{:#010x}'
+links: []
+name: ZYNQ_RAM_ORIGIN
+type: build
diff --git a/spec/build/bsps/arm/xilinx-zynq/optresetvec.yml b/spec/build/bsps/arm/xilinx-zynq/optresetvec.yml
new file mode 100644
index 0000000000..efd1ea2b2a
--- /dev/null
+++ b/spec/build/bsps/arm/xilinx-zynq/optresetvec.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant: []
+description: |
+ reset vector address for BSP start
+enabled-by: true
+links: []
+name: BSP_START_RESET_VECTOR
+type: build
diff --git a/spec/build/bsps/arm/xilinx-zynqmp/abi.yml b/spec/build/bsps/arm/xilinx-zynqmp/abi.yml
new file mode 100644
index 0000000000..23c66bb5b8
--- /dev/null
+++ b/spec/build/bsps/arm/xilinx-zynqmp/abi.yml
@@ -0,0 +1,21 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-string: null
+- split: null
+- env-append: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default:
+- -march=armv7-a
+- -mthumb
+- -mfpu=neon
+- -mfloat-abi=hard
+- -mtune=cortex-a53
+default-by-variant: []
+description: |
+ ABI flags
+enabled-by: true
+links: []
+name: ABI_FLAGS
+type: build
diff --git a/spec/build/bsps/arm/xilinx-zynqmp/bspxilinxzynqmp.yml b/spec/build/bsps/arm/xilinx-zynqmp/bspxilinxzynqmp.yml
new file mode 100644
index 0000000000..fe56228c38
--- /dev/null
+++ b/spec/build/bsps/arm/xilinx-zynqmp/bspxilinxzynqmp.yml
@@ -0,0 +1,95 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: xilinx_zynqmp_ultra96
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: xilinx-zynqmp
+includes: []
+install:
+- destination: ${BSP_INCLUDEDIR}
+ source:
+ - bsps/arm/xilinx-zynqmp/include/bsp.h
+ - bsps/arm/xilinx-zynqmp/include/tm27.h
+- destination: ${BSP_INCLUDEDIR}/bsp
+ source:
+ - bsps/arm/xilinx-zynqmp/include/bsp/irq.h
+links:
+- role: build-dependency
+ uid: ../grp
+- role: build-dependency
+ uid: ../start
+- role: build-dependency
+ uid: abi
+- role: build-dependency
+ uid: objsmp
+- role: build-dependency
+ uid: optcachedata
+- role: build-dependency
+ uid: optcacheinst
+- role: build-dependency
+ uid: optclkfastidle
+- role: build-dependency
+ uid: optclkuart
+- role: build-dependency
+ uid: optconirq
+- role: build-dependency
+ uid: optconminor
+- role: build-dependency
+ uid: optgentmrfreq
+- role: build-dependency
+ uid: optgentmrusevirt
+- role: build-dependency
+ uid: optint0len
+- role: build-dependency
+ uid: optint0ori
+- role: build-dependency
+ uid: optint1len
+- role: build-dependency
+ uid: optint1ori
+- role: build-dependency
+ uid: ../optmmusz
+- role: build-dependency
+ uid: optnocachelen
+- role: build-dependency
+ uid: optramlen
+- role: build-dependency
+ uid: optramori
+- role: build-dependency
+ uid: optresetvec
+- role: build-dependency
+ uid: ../../obj
+- role: build-dependency
+ uid: ../../objirq
+- role: build-dependency
+ uid: ../../opto2
+- role: build-dependency
+ uid: linkcmds
+- role: build-dependency
+ uid: ../../bspopts
+source:
+- bsps/arm/shared/cache/cache-cp15.c
+- bsps/arm/shared/clock/clock-generic-timer.c
+- bsps/arm/shared/cp15/arm-cp15-set-exception-handler.c
+- bsps/arm/shared/cp15/arm-cp15-set-ttb-entries.c
+- bsps/arm/shared/irq/irq-gic.c
+- bsps/arm/shared/serial/zynq-uart.c
+- bsps/arm/shared/serial/zynq-uart-polled.c
+- bsps/arm/shared/start/bsp-start-memcpy.S
+- bsps/arm/xilinx-zynqmp/console/console-config.c
+- bsps/arm/xilinx-zynqmp/start/bspreset.c
+- bsps/arm/xilinx-zynqmp/start/bspstart.c
+- bsps/arm/xilinx-zynqmp/start/bspstarthooks.c
+- bsps/arm/xilinx-zynqmp/start/bspstartmmu.c
+- bsps/shared/dev/btimer/btimer-stub.c
+- bsps/shared/dev/getentropy/getentropy-cpucounter.c
+- bsps/shared/dev/serial/console-termios.c
+- bsps/shared/irq/irq-default-handler.c
+- bsps/shared/start/bspfatal-default.c
+- bsps/shared/start/bspgetworkarea-default.c
+- bsps/shared/start/sbrk.c
+- bsps/shared/start/stackalloc.c
+type: build
diff --git a/spec/build/bsps/arm/xilinx-zynqmp/linkcmds.yml b/spec/build/bsps/arm/xilinx-zynqmp/linkcmds.yml
new file mode 100644
index 0000000000..77bd5fb763
--- /dev/null
+++ b/spec/build/bsps/arm/xilinx-zynqmp/linkcmds.yml
@@ -0,0 +1,46 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: config-file
+content: |
+ MEMORY {
+ RAM_INT_0 : ORIGIN = ${ZYNQMP_RAM_INT_0_ORIGIN:#010x}, LENGTH = ${ZYNQMP_RAM_INT_0_LENGTH:#010x}
+ RAM_INT_1 : ORIGIN = ${ZYNQMP_RAM_INT_1_ORIGIN:#010x}, LENGTH = ${ZYNQMP_RAM_INT_1_LENGTH:#010x}
+ RAM_MMU : ORIGIN = ${ZYNQMP_RAM_ORIGIN:#010x}, LENGTH = ${ARM_MMU_TRANSLATION_TABLE_SIZE:#010x}
+ RAM : ORIGIN = ${ZYNQMP_RAM_ORIGIN:#010x} + ${ARM_MMU_TRANSLATION_TABLE_SIZE:#010x}, LENGTH = ${ZYNQMP_RAM_LENGTH:#010x} - ${ZYNQMP_RAM_ORIGIN:#010x} - ${ARM_MMU_TRANSLATION_TABLE_SIZE:#010x} - ${ZYNQMP_RAM_NOCACHE_LENGTH:#010x}
+ NOCACHE : ORIGIN = ${ZYNQMP_RAM_LENGTH:#010x} - ${ZYNQMP_RAM_NOCACHE_LENGTH:#010x}, LENGTH = ${ZYNQMP_RAM_NOCACHE_LENGTH:#010x}
+ }
+
+ REGION_ALIAS ("REGION_START", RAM);
+ REGION_ALIAS ("REGION_VECTOR", RAM);
+ REGION_ALIAS ("REGION_TEXT", RAM);
+ REGION_ALIAS ("REGION_TEXT_LOAD", RAM);
+ REGION_ALIAS ("REGION_RODATA", RAM);
+ REGION_ALIAS ("REGION_RODATA_LOAD", RAM);
+ REGION_ALIAS ("REGION_DATA", RAM);
+ REGION_ALIAS ("REGION_DATA_LOAD", RAM);
+ REGION_ALIAS ("REGION_FAST_TEXT", RAM);
+ REGION_ALIAS ("REGION_FAST_TEXT_LOAD", RAM);
+ REGION_ALIAS ("REGION_FAST_DATA", RAM);
+ REGION_ALIAS ("REGION_FAST_DATA_LOAD", RAM);
+ REGION_ALIAS ("REGION_BSS", RAM);
+ REGION_ALIAS ("REGION_WORK", RAM);
+ REGION_ALIAS ("REGION_STACK", RAM);
+ REGION_ALIAS ("REGION_NOCACHE", NOCACHE);
+ REGION_ALIAS ("REGION_NOCACHE_LOAD", NOCACHE);
+
+ bsp_stack_abt_size = DEFINED (bsp_stack_abt_size) ? bsp_stack_abt_size : 1024;
+
+ bsp_section_rwbarrier_align = DEFINED (bsp_section_rwbarrier_align) ? bsp_section_rwbarrier_align : 1M;
+
+ bsp_vector_table_in_start_section = 1;
+
+ bsp_translation_table_base = ORIGIN (RAM_MMU);
+ bsp_translation_table_end = ORIGIN (RAM_MMU) + LENGTH (RAM_MMU);
+
+ INCLUDE linkcmds.armv4
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+enabled-by: true
+install-path: ${BSP_LIBDIR}
+links: []
+target: linkcmds
+type: build
diff --git a/spec/build/bsps/arm/xilinx-zynqmp/objsmp.yml b/spec/build/bsps/arm/xilinx-zynqmp/objsmp.yml
new file mode 100644
index 0000000000..e8b954b5cb
--- /dev/null
+++ b/spec/build/bsps/arm/xilinx-zynqmp/objsmp.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: objects
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+cxxflags: []
+enabled-by:
+- RTEMS_SMP
+includes: []
+install: []
+links: []
+source:
+- bsps/arm/shared/start/arm-a9mpcore-smp.c
+- bsps/arm/xilinx-zynqmp/start/bspsmp.c
+type: build
diff --git a/spec/build/bsps/arm/xilinx-zynqmp/optcachedata.yml b/spec/build/bsps/arm/xilinx-zynqmp/optcachedata.yml
new file mode 100644
index 0000000000..1664b0fc31
--- /dev/null
+++ b/spec/build/bsps/arm/xilinx-zynqmp/optcachedata.yml
@@ -0,0 +1,18 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant:
+- value: false
+ variants:
+ - arm/.*qemu
+description: |
+ enable data cache
+enabled-by: true
+links: []
+name: BSP_DATA_CACHE_ENABLED
+type: build
diff --git a/spec/build/bsps/arm/xilinx-zynqmp/optcacheinst.yml b/spec/build/bsps/arm/xilinx-zynqmp/optcacheinst.yml
new file mode 100644
index 0000000000..b191133af9
--- /dev/null
+++ b/spec/build/bsps/arm/xilinx-zynqmp/optcacheinst.yml
@@ -0,0 +1,18 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant:
+- value: false
+ variants:
+ - arm/.*qemu
+description: |
+ enable instruction cache
+enabled-by: true
+links: []
+name: BSP_INSTRUCTION_CACHE_ENABLED
+type: build
diff --git a/spec/build/bsps/arm/xilinx-zynqmp/optclkfastidle.yml b/spec/build/bsps/arm/xilinx-zynqmp/optclkfastidle.yml
new file mode 100644
index 0000000000..b800b20428
--- /dev/null
+++ b/spec/build/bsps/arm/xilinx-zynqmp/optclkfastidle.yml
@@ -0,0 +1,18 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant:
+- value: true
+ variants:
+ - arm/.*qemu
+description: |
+ This sets a mode where the time runs as fast as possible when a clock ISR occurs while the IDLE thread is executing. This can significantly reduce simulation times.
+enabled-by: true
+links: []
+name: CLOCK_DRIVER_USE_FAST_IDLE
+type: build
diff --git a/spec/build/bsps/arm/xilinx-zynqmp/optclkuart.yml b/spec/build/bsps/arm/xilinx-zynqmp/optclkuart.yml
new file mode 100644
index 0000000000..a2def36606
--- /dev/null
+++ b/spec/build/bsps/arm/xilinx-zynqmp/optclkuart.yml
@@ -0,0 +1,19 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 100000000
+default-by-variant:
+- value: 100000000
+ variants:
+ - arm/xilinx_zynqmp_ultra96.*
+description: |
+ Zynq UART clock frequency in Hz
+enabled-by: true
+format: '{}'
+links: []
+name: ZYNQ_CLOCK_UART
+type: build
diff --git a/spec/build/bsps/arm/xilinx-zynqmp/optconirq.yml b/spec/build/bsps/arm/xilinx-zynqmp/optconirq.yml
new file mode 100644
index 0000000000..ecb91d81a3
--- /dev/null
+++ b/spec/build/bsps/arm/xilinx-zynqmp/optconirq.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+ use interrupt driven mode for console devices (used by default)
+enabled-by: true
+links: []
+name: ZYNQ_CONSOLE_USE_INTERRUPTS
+type: build
diff --git a/spec/build/bsps/arm/xilinx-zynqmp/optconminor.yml b/spec/build/bsps/arm/xilinx-zynqmp/optconminor.yml
new file mode 100644
index 0000000000..55074c6dac
--- /dev/null
+++ b/spec/build/bsps/arm/xilinx-zynqmp/optconminor.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+ minor number of console device
+enabled-by: true
+links: []
+name: BSP_CONSOLE_MINOR
+type: build
diff --git a/spec/build/bsps/arm/xilinx-zynqmp/optgentmrfreq.yml b/spec/build/bsps/arm/xilinx-zynqmp/optgentmrfreq.yml
new file mode 100644
index 0000000000..a31630ebd6
--- /dev/null
+++ b/spec/build/bsps/arm/xilinx-zynqmp/optgentmrfreq.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant: []
+description: |
+ ARM generic timer frequency in Hz
+enabled-by: true
+links: []
+name: ARM_GENERIC_TIMER_FREQ
+type: build
diff --git a/spec/build/bsps/arm/xilinx-zynqmp/optgentmrusevirt.yml b/spec/build/bsps/arm/xilinx-zynqmp/optgentmrusevirt.yml
new file mode 100644
index 0000000000..794f66244b
--- /dev/null
+++ b/spec/build/bsps/arm/xilinx-zynqmp/optgentmrusevirt.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant: []
+description: |
+ Use virtual ARM generic timer
+enabled-by: true
+links: []
+name: ARM_GENERIC_TIMER_USE_VIRTUAL
+type: build
diff --git a/spec/build/bsps/arm/xilinx-zynqmp/optint0len.yml b/spec/build/bsps/arm/xilinx-zynqmp/optint0len.yml
new file mode 100644
index 0000000000..55b3487553
--- /dev/null
+++ b/spec/build/bsps/arm/xilinx-zynqmp/optint0len.yml
@@ -0,0 +1,17 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- assert-