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author | Alex White <alex.white@oarcorp.com> | 2021-09-30 23:57:01 -0500 |
---|---|---|
committer | Joel Sherrill <joel@rtems.org> | 2021-10-13 14:45:37 -0500 |
commit | d03776e804e2cb190442d2a2debf297714ca8049 (patch) | |
tree | 108aba7fb973915a52c407751ce23abf77eccac6 /spec/build/bsps/microblaze/microblaze_fpga/optintcbaseaddress.yml | |
parent | bsps: Add MicroBlaze FPGA BSP (diff) | |
download | rtems-d03776e804e2cb190442d2a2debf297714ca8049.tar.bz2 |
microblaze: Rework for RTEMS 6
This reworks the existing MicroBlaze architecture port and BSP to
achieve basic functionality using the latest RTEMS APIs.
Diffstat (limited to 'spec/build/bsps/microblaze/microblaze_fpga/optintcbaseaddress.yml')
-rw-r--r-- | spec/build/bsps/microblaze/microblaze_fpga/optintcbaseaddress.yml | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/spec/build/bsps/microblaze/microblaze_fpga/optintcbaseaddress.yml b/spec/build/bsps/microblaze/microblaze_fpga/optintcbaseaddress.yml new file mode 100644 index 0000000000..5ed9294ff6 --- /dev/null +++ b/spec/build/bsps/microblaze/microblaze_fpga/optintcbaseaddress.yml @@ -0,0 +1,18 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-integer: null +- assert-uint32: null +- env-assign: null +- format-and-define: null +build-type: option +copyrights: +- Copyright (C) 2021 On-Line Applications Research Corporation (OAR) +default: 0x41200000 +default-by-variant: [] +description: | + base address of the AXI Interrupt Controller +enabled-by: true +format: '{:#010x}' +links: [] +name: BSP_MICROBLAZE_FPGA_INTC_BASE +type: build |