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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2022-09-12 10:35:21 +0200 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2023-01-17 08:31:48 +0100 |
| commit | f20078acea88f7c38f14cbc206053e50c313c357 (patch) | |
| tree | b00ad4ff46b7da85f4b5206561961d0317b86375 /spec/build/bsps/dev/irq/optarmgic-icc-igrpen0.yml | |
| parent | build: Replace variant patterns with a list (diff) | |
| download | rtems-f20078acea88f7c38f14cbc206053e50c313c357.tar.bz2 | |
build: Use enabled by for defaults
Merge the "default" and "default-by-variant" attributes. Use an
"enabled-by" expression to select the default value based on the enabled
set. This makes it possible to select default values depending on other
options. For example you could choose memory settings based on whether
RTEMS_SMP is enabled or disabled.
The change was tested by comparing the output of
./waf bspdefaults
before and after the change.
Diffstat (limited to 'spec/build/bsps/dev/irq/optarmgic-icc-igrpen0.yml')
| -rw-r--r-- | spec/build/bsps/dev/irq/optarmgic-icc-igrpen0.yml | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/spec/build/bsps/dev/irq/optarmgic-icc-igrpen0.yml b/spec/build/bsps/dev/irq/optarmgic-icc-igrpen0.yml index 86bdcf64ee..ea5eaff3e7 100644 --- a/spec/build/bsps/dev/irq/optarmgic-icc-igrpen0.yml +++ b/spec/build/bsps/dev/irq/optarmgic-icc-igrpen0.yml @@ -5,10 +5,8 @@ actions: build-type: option copyrights: - Copyright (C) 2022 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x00000001 -default-by-variant: -- value: null - variants: +default: +- enabled-by: - aarch64/a53_ilp32_qemu - aarch64/a53_lp64_qemu - aarch64/a72_ilp32_qemu @@ -22,6 +20,9 @@ default-by-variant: - aarch64/xilinx_zynqmp_lp64_cfc400x - aarch64/xilinx_zynqmp_lp64_qemu - aarch64/xilinx_zynqmp_lp64_zu3eg + value: null +- enabled-by: true + value: 0x00000001 description: | Defines the initial value of the ICC_IGRPEN0 register of the ARM GIC CPU Interface. The value is optional. If it is not defined, then the register |