diff options
| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2023-01-12 10:26:38 +0100 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2023-01-17 08:31:48 +0100 |
| commit | d2664faa39cfd17fa20c84d0ff1623335c21bdac (patch) | |
| tree | c6503cc795816f0c4f03ed74fd764878e017979b /spec/build/bsps/dev/irq/optarmgic-icc-igrpen0.yml | |
| parent | build: Format build items (diff) | |
| download | rtems-d2664faa39cfd17fa20c84d0ff1623335c21bdac.tar.bz2 | |
build: Replace variant patterns with a list
Replace the variant patterns in the default-by-variant list with an
explicit list of matching BSPs.
The change was tested by comparing the output of
./waf bspdefaults
before and after the change.
Diffstat (limited to 'spec/build/bsps/dev/irq/optarmgic-icc-igrpen0.yml')
| -rw-r--r-- | spec/build/bsps/dev/irq/optarmgic-icc-igrpen0.yml | 14 |
1 files changed, 13 insertions, 1 deletions
diff --git a/spec/build/bsps/dev/irq/optarmgic-icc-igrpen0.yml b/spec/build/bsps/dev/irq/optarmgic-icc-igrpen0.yml index df1701ce74..86bdcf64ee 100644 --- a/spec/build/bsps/dev/irq/optarmgic-icc-igrpen0.yml +++ b/spec/build/bsps/dev/irq/optarmgic-icc-igrpen0.yml @@ -9,7 +9,19 @@ default: 0x00000001 default-by-variant: - value: null variants: - - aarch64/.* + - aarch64/a53_ilp32_qemu + - aarch64/a53_lp64_qemu + - aarch64/a72_ilp32_qemu + - aarch64/a72_lp64_qemu + - aarch64/raspberrypi4b + - aarch64/xilinx_versal_aiedge + - aarch64/xilinx_versal_qemu + - aarch64/xilinx_versal_vck190 + - aarch64/xilinx_zynqmp_ilp32_qemu + - aarch64/xilinx_zynqmp_ilp32_zu3eg + - aarch64/xilinx_zynqmp_lp64_cfc400x + - aarch64/xilinx_zynqmp_lp64_qemu + - aarch64/xilinx_zynqmp_lp64_zu3eg description: | Defines the initial value of the ICC_IGRPEN0 register of the ARM GIC CPU Interface. The value is optional. If it is not defined, then the register |