diff options
| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2023-01-12 10:26:38 +0100 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2023-01-17 08:31:48 +0100 |
| commit | d2664faa39cfd17fa20c84d0ff1623335c21bdac (patch) | |
| tree | c6503cc795816f0c4f03ed74fd764878e017979b /spec/build/bsps/aarch64 | |
| parent | build: Format build items (diff) | |
| download | rtems-d2664faa39cfd17fa20c84d0ff1623335c21bdac.tar.bz2 | |
build: Replace variant patterns with a list
Replace the variant patterns in the default-by-variant list with an
explicit list of matching BSPs.
The change was tested by comparing the output of
./waf bspdefaults
before and after the change.
Diffstat (limited to 'spec/build/bsps/aarch64')
5 files changed, 15 insertions, 12 deletions
diff --git a/spec/build/bsps/aarch64/xilinx-zynqmp/optclki2c0.yml b/spec/build/bsps/aarch64/xilinx-zynqmp/optclki2c0.yml index 98a2222353..1005594abe 100644 --- a/spec/build/bsps/aarch64/xilinx-zynqmp/optclki2c0.yml +++ b/spec/build/bsps/aarch64/xilinx-zynqmp/optclki2c0.yml @@ -10,16 +10,16 @@ default: 111111111 default-by-variant: - value: 111111111 variants: - - aarch64/xilinx_zynqmp_ilp32_qemu.* + - aarch64/xilinx_zynqmp_ilp32_qemu - value: 111111111 variants: - - aarch64/xilinx_zynqmp_ilp32_zu3eg.* + - aarch64/xilinx_zynqmp_ilp32_zu3eg - value: 111111111 variants: - - aarch64/xilinx_zynqmp_lp64_qemu.* + - aarch64/xilinx_zynqmp_lp64_qemu - value: 111111111 variants: - - aarch64/xilinx_zynqmp_lp64_zu3eg.* + - aarch64/xilinx_zynqmp_lp64_zu3eg description: | ZynqMP i2c0 clock frequency in Hz. This is the frequency after the signal has been processed using the values passed to the I2C0_REF_CTRL register. diff --git a/spec/build/bsps/aarch64/xilinx-zynqmp/optclki2c1.yml b/spec/build/bsps/aarch64/xilinx-zynqmp/optclki2c1.yml index 6fe6c18dfa..f1b26578e0 100644 --- a/spec/build/bsps/aarch64/xilinx-zynqmp/optclki2c1.yml +++ b/spec/build/bsps/aarch64/xilinx-zynqmp/optclki2c1.yml @@ -10,16 +10,16 @@ default: 111111111 default-by-variant: - value: 111111111 variants: - - aarch64/xilinx_zynqmp_ilp32_qemu.* + - aarch64/xilinx_zynqmp_ilp32_qemu - value: 111111111 variants: - - aarch64/xilinx_zynqmp_ilp32_zu3eg.* + - aarch64/xilinx_zynqmp_ilp32_zu3eg - value: 111111111 variants: - - aarch64/xilinx_zynqmp_lp64_qemu.* + - aarch64/xilinx_zynqmp_lp64_qemu - value: 111111111 variants: - - aarch64/xilinx_zynqmp_lp64_zu3eg.* + - aarch64/xilinx_zynqmp_lp64_zu3eg description: | ZynqMP i2c1 clock frequency in Hz. This is the frequency after the signal has been processed using the values passed to the I2C1_REF_CTRL register. diff --git a/spec/build/bsps/aarch64/xilinx-zynqmp/optclkuart.yml b/spec/build/bsps/aarch64/xilinx-zynqmp/optclkuart.yml index d663d6f640..24f232e711 100644 --- a/spec/build/bsps/aarch64/xilinx-zynqmp/optclkuart.yml +++ b/spec/build/bsps/aarch64/xilinx-zynqmp/optclkuart.yml @@ -9,8 +9,11 @@ default: 100000000 default-by-variant: - value: 100000000 variants: - - aarch64/xilinx_zynqmp_ilp32.* - - aarch64/xilinx_zynqmp_lp64.* + - aarch64/xilinx_zynqmp_ilp32_qemu + - aarch64/xilinx_zynqmp_ilp32_zu3eg + - aarch64/xilinx_zynqmp_lp64_cfc400x + - aarch64/xilinx_zynqmp_lp64_qemu + - aarch64/xilinx_zynqmp_lp64_zu3eg description: | Zynq UART clock frequency in Hz enabled-by: true diff --git a/spec/build/bsps/aarch64/xilinx-zynqmp/optloadoff.yml b/spec/build/bsps/aarch64/xilinx-zynqmp/optloadoff.yml index 0711fe3f79..3e89085eb3 100644 --- a/spec/build/bsps/aarch64/xilinx-zynqmp/optloadoff.yml +++ b/spec/build/bsps/aarch64/xilinx-zynqmp/optloadoff.yml @@ -11,9 +11,9 @@ default: 0x00008000 default-by-variant: - value: 0x00000000 variants: + - aarch64/xilinx_zynqmp_ilp32_zu3eg - aarch64/xilinx_zynqmp_lp64_cfc400x - aarch64/xilinx_zynqmp_lp64_zu3eg - - aarch64/xilinx_zynqmp_ilp32_zu3eg description: | offset of RAM region from memory area base enabled-by: true diff --git a/spec/build/bsps/aarch64/xilinx-zynqmp/optramori.yml b/spec/build/bsps/aarch64/xilinx-zynqmp/optramori.yml index 427f14c7c8..c67358f0d5 100644 --- a/spec/build/bsps/aarch64/xilinx-zynqmp/optramori.yml +++ b/spec/build/bsps/aarch64/xilinx-zynqmp/optramori.yml @@ -11,9 +11,9 @@ default: 0x40018000 default-by-variant: - value: 0x10000000 variants: + - aarch64/xilinx_zynqmp_ilp32_zu3eg - aarch64/xilinx_zynqmp_lp64_cfc400x - aarch64/xilinx_zynqmp_lp64_zu3eg - - aarch64/xilinx_zynqmp_ilp32_zu3eg description: | base address of memory area available to the BSP enabled-by: true |