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| author | Joel Sherrill <joel.sherrill@OARcorp.com> | 1997-07-31 18:45:58 +0000 |
|---|---|---|
| committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 1997-07-31 18:45:58 +0000 |
| commit | db9152036258e231ec0a1ac3c67426700dc3d7e7 (patch) | |
| tree | a770ce05aba5ce96cb646df5ffb209797bde4a06 /doc/supplements/sparc/cpumodel.t | |
| parent | Added more info. (diff) | |
| download | rtems-db9152036258e231ec0a1ac3c67426700dc3d7e7.tar.bz2 | |
corrected typos and changes LANGUAGE to RTEMS-LANGUAGE.
Diffstat (limited to 'doc/supplements/sparc/cpumodel.t')
| -rw-r--r-- | doc/supplements/sparc/cpumodel.t | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/doc/supplements/sparc/cpumodel.t b/doc/supplements/sparc/cpumodel.t index af1605572c..85afb3f48f 100644 --- a/doc/supplements/sparc/cpumodel.t +++ b/doc/supplements/sparc/cpumodel.t @@ -141,7 +141,7 @@ The code required to enter low power mode is CPU model specific. @end ifinfo @section CPU Model Implementation Notes -The ERC is a custom SPARC V7 implementation based on the Cypress 601/602 +The ERC32 is a custom SPARC V7 implementation based on the Cypress 601/602 chipset. This CPU has a number of on-board peripherals and was developed by the European Space Agency to target space applications. RTEMS currently provides support for the following peripherals: |