From db9152036258e231ec0a1ac3c67426700dc3d7e7 Mon Sep 17 00:00:00 2001 From: Joel Sherrill Date: Thu, 31 Jul 1997 18:45:58 +0000 Subject: corrected typos and changes LANGUAGE to RTEMS-LANGUAGE. --- doc/supplements/sparc/cpumodel.t | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'doc/supplements/sparc/cpumodel.t') diff --git a/doc/supplements/sparc/cpumodel.t b/doc/supplements/sparc/cpumodel.t index af1605572c..85afb3f48f 100644 --- a/doc/supplements/sparc/cpumodel.t +++ b/doc/supplements/sparc/cpumodel.t @@ -141,7 +141,7 @@ The code required to enter low power mode is CPU model specific. @end ifinfo @section CPU Model Implementation Notes -The ERC is a custom SPARC V7 implementation based on the Cypress 601/602 +The ERC32 is a custom SPARC V7 implementation based on the Cypress 601/602 chipset. This CPU has a number of on-board peripherals and was developed by the European Space Agency to target space applications. RTEMS currently provides support for the following peripherals: -- cgit v1.2.3