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authorJoel Sherrill <joel.sherrill@OARcorp.com>1998-10-19 19:38:19 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>1998-10-19 19:38:19 +0000
commitf0c38647c1d7d5a659ce2a8eb13e999e0a08746d (patch)
treebe6d0134ca502e0b3e7b9683469c4f5373a08e21 /doc/supplements/powerpc/memmodel.t
parentRenamed. (diff)
downloadrtems-f0c38647c1d7d5a659ce2a8eb13e999e0a08746d.tar.bz2
Renamed a lot and got as much as possible automatically generated.
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diff --git a/doc/supplements/powerpc/memmodel.t b/doc/supplements/powerpc/memmodel.t
index 2865c75e98..a8bd0f66ab 100644
--- a/doc/supplements/powerpc/memmodel.t
+++ b/doc/supplements/powerpc/memmodel.t
@@ -6,20 +6,8 @@
@c $Id$
@c
-@ifinfo
-@node Memory Model, Memory Model Introduction, Calling Conventions User-Provided Routines, Top
-@end ifinfo
@chapter Memory Model
-@ifinfo
-@menu
-* Memory Model Introduction::
-* Memory Model Flat Memory Model::
-@end menu
-@end ifinfo
-@ifinfo
-@node Memory Model Introduction, Memory Model Flat Memory Model, Memory Model, Memory Model
-@end ifinfo
@section Introduction
A processor may support any combination of memory
@@ -31,9 +19,6 @@ memory of any kind. The appropriate memory model for RTEMS
provided by the targeted processor and related characteristics
of that model are described in this chapter.
-@ifinfo
-@node Memory Model Flat Memory Model, Interrupt Processing, Memory Model Introduction, Memory Model
-@end ifinfo
@section Flat Memory Model
The PowerPC architecture supports a variety of memory models.