summaryrefslogtreecommitdiffstats
path: root/cpukit/score/cpu/sparc/rtems/score/sparc.h
diff options
context:
space:
mode:
authorSebastian Huber <sebastian.huber@embedded-brains.de>2014-02-13 13:00:00 +0100
committerSebastian Huber <sebastian.huber@embedded-brains.de>2014-02-14 10:28:30 +0100
commitad563618ca49816e8db755cb44a101dacc270a2a (patch)
tree23941c95b7118e43cb64239e0527e77cc903a42f /cpukit/score/cpu/sparc/rtems/score/sparc.h
parentscore: Add Atomic_Uint (diff)
downloadrtems-ad563618ca49816e8db755cb44a101dacc270a2a.tar.bz2
sparc: Add LEON3_ASR17_PROCESSOR_INDEX_SHIFT
Add _LEON3_Get_current_processor().
Diffstat (limited to 'cpukit/score/cpu/sparc/rtems/score/sparc.h')
-rw-r--r--cpukit/score/cpu/sparc/rtems/score/sparc.h14
1 files changed, 14 insertions, 0 deletions
diff --git a/cpukit/score/cpu/sparc/rtems/score/sparc.h b/cpukit/score/cpu/sparc/rtems/score/sparc.h
index 0c00ac4ac9..4539e7d6df 100644
--- a/cpukit/score/cpu/sparc/rtems/score/sparc.h
+++ b/cpukit/score/cpu/sparc/rtems/score/sparc.h
@@ -147,6 +147,8 @@ extern "C" {
/** This constant is the starting bit position of the IMPL in the PSR. */
#define SPARC_PSR_IMPL_BIT_POSITION 28 /* bits 28 - 31 */
+#define LEON3_ASR17_PROCESSOR_INDEX_SHIFT 28
+
#ifndef ASM
/**
@@ -292,6 +294,18 @@ void sparc_enable_interrupts(uint32_t psr);
(_psr_level & SPARC_PSR_PIL_MASK) >> SPARC_PSR_PIL_BIT_POSITION; \
} while ( 0 )
+static inline uint32_t _LEON3_Get_current_processor( void )
+{
+ uint32_t asr17;
+
+ __asm__ (
+ "rd %%asr17, %0"
+ : "=&r" (asr17)
+ );
+
+ return asr17 >> LEON3_ASR17_PROCESSOR_INDEX_SHIFT;
+}
+
#endif
#ifdef __cplusplus