summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorSebastian Huber <sebastian.huber@embedded-brains.de>2014-02-13 13:00:00 +0100
committerSebastian Huber <sebastian.huber@embedded-brains.de>2014-02-14 10:28:30 +0100
commitad563618ca49816e8db755cb44a101dacc270a2a (patch)
tree23941c95b7118e43cb64239e0527e77cc903a42f
parent945853b7cf35f55fc8a749aa106bd77a491fe125 (diff)
downloadrtems-ad563618ca49816e8db755cb44a101dacc270a2a.tar.bz2
sparc: Add LEON3_ASR17_PROCESSOR_INDEX_SHIFT
Add _LEON3_Get_current_processor().
-rw-r--r--c/src/lib/libbsp/sparc/leon3/include/leon.h2
-rw-r--r--c/src/lib/libbsp/sparc/leon3/smp/getcpuid.c5
-rw-r--r--c/src/lib/libbsp/sparc/leon3/startup/bspstart.c12
-rw-r--r--c/src/lib/libbsp/sparc/shared/irq_asm.S2
-rw-r--r--c/src/lib/libbsp/sparc/shared/start/start.S2
-rw-r--r--cpukit/score/cpu/sparc/rtems/score/sparc.h14
6 files changed, 20 insertions, 17 deletions
diff --git a/c/src/lib/libbsp/sparc/leon3/include/leon.h b/c/src/lib/libbsp/sparc/leon3/include/leon.h
index 84567e46cd..ade04ab202 100644
--- a/c/src/lib/libbsp/sparc/leon3/include/leon.h
+++ b/c/src/lib/libbsp/sparc/leon3/include/leon.h
@@ -123,7 +123,7 @@ extern volatile struct irqmp_regs *LEON3_IrqCtrl_Regs; /* LEON3 Interrupt Contr
extern volatile struct gptimer_regs *LEON3_Timer_Regs; /* LEON3 GP Timer */
/* LEON3 CPU Index of boot CPU */
-extern int LEON3_Cpu_Index;
+extern uint32_t LEON3_Cpu_Index;
/* The external IRQ number, -1 if not external interrupts */
extern int LEON3_IrqCtrl_EIrq;
diff --git a/c/src/lib/libbsp/sparc/leon3/smp/getcpuid.c b/c/src/lib/libbsp/sparc/leon3/smp/getcpuid.c
index 099a83b925..4f46d18c93 100644
--- a/c/src/lib/libbsp/sparc/leon3/smp/getcpuid.c
+++ b/c/src/lib/libbsp/sparc/leon3/smp/getcpuid.c
@@ -17,9 +17,6 @@
uint32_t _CPU_SMP_Get_current_processor( void )
{
- uint32_t id;
- __asm__ __volatile__( "rd %%asr17,%0\n\t" : "=r" (id) : );
-
- return ((id >> 28) & 0xff);
+ return _LEON3_Get_current_processor();
}
diff --git a/c/src/lib/libbsp/sparc/leon3/startup/bspstart.c b/c/src/lib/libbsp/sparc/leon3/startup/bspstart.c
index 4b9450d2df..dea2a1166c 100644
--- a/c/src/lib/libbsp/sparc/leon3/startup/bspstart.c
+++ b/c/src/lib/libbsp/sparc/leon3/startup/bspstart.c
@@ -27,7 +27,7 @@
int CPU_SPARC_HAS_SNOOPING;
/* Index of CPU, in an AMP system CPU-index may be non-zero */
-int LEON3_Cpu_Index = 0;
+uint32_t LEON3_Cpu_Index = 0;
extern void amba_initialize(void);
@@ -50,14 +50,6 @@ static inline int set_snooping(void)
return (tmp >> 23) & 1;
}
-/* ASM-function used to get the CPU-Index on calling LEON3 CPUs */
-static inline unsigned int get_asr17(void)
-{
- unsigned int reg;
- __asm__ (" mov %%asr17, %0 " : "=r"(reg) :);
- return reg;
-}
-
/*
* bsp_start
*
@@ -72,7 +64,7 @@ void bsp_start( void )
* and RTEMS on this CPU, and AMP system with mixed operating
* systems
*/
- LEON3_Cpu_Index = (get_asr17() >> 28) & 3;
+ LEON3_Cpu_Index = _LEON3_Get_current_processor();
/* Scan AMBA Plug&Play and parse it into a RAM description (ambapp_plb),
* find GPTIMER for bus frequency, find IRQ Controller and initialize
diff --git a/c/src/lib/libbsp/sparc/shared/irq_asm.S b/c/src/lib/libbsp/sparc/shared/irq_asm.S
index 684e7835cb..c32981b31c 100644
--- a/c/src/lib/libbsp/sparc/shared/irq_asm.S
+++ b/c/src/lib/libbsp/sparc/shared/irq_asm.S
@@ -31,7 +31,7 @@
#if BSP_LEON3_SMP
/* LEON3 SMP support */
rd %asr17, \TMP
- srl \TMP, 28, \TMP /* CPU number is upper 4 bits so shift */
+ srl \TMP, LEON3_ASR17_PROCESSOR_INDEX_SHIFT, \TMP
#else
mov 0, \TMP
#endif
diff --git a/c/src/lib/libbsp/sparc/shared/start/start.S b/c/src/lib/libbsp/sparc/shared/start/start.S
index 756a06e918..df17a9bfe4 100644
--- a/c/src/lib/libbsp/sparc/shared/start/start.S
+++ b/c/src/lib/libbsp/sparc/shared/start/start.S
@@ -224,7 +224,7 @@ SYM(hard_reset):
#if defined(START_LEON3_ENABLE_SMP)
rd %asr17, %o0 ! get CPU identifier
- srl %o0, 28, %o0 ! CPU index is upper 4 bits so shift
+ srl %o0, LEON3_ASR17_PROCESSOR_INDEX_SHIFT, %o0
cmp %o0, 0
beq cpu0
diff --git a/cpukit/score/cpu/sparc/rtems/score/sparc.h b/cpukit/score/cpu/sparc/rtems/score/sparc.h
index 0c00ac4ac9..4539e7d6df 100644
--- a/cpukit/score/cpu/sparc/rtems/score/sparc.h
+++ b/cpukit/score/cpu/sparc/rtems/score/sparc.h
@@ -147,6 +147,8 @@ extern "C" {
/** This constant is the starting bit position of the IMPL in the PSR. */
#define SPARC_PSR_IMPL_BIT_POSITION 28 /* bits 28 - 31 */
+#define LEON3_ASR17_PROCESSOR_INDEX_SHIFT 28
+
#ifndef ASM
/**
@@ -292,6 +294,18 @@ void sparc_enable_interrupts(uint32_t psr);
(_psr_level & SPARC_PSR_PIL_MASK) >> SPARC_PSR_PIL_BIT_POSITION; \
} while ( 0 )
+static inline uint32_t _LEON3_Get_current_processor( void )
+{
+ uint32_t asr17;
+
+ __asm__ (
+ "rd %%asr17, %0"
+ : "=&r" (asr17)
+ );
+
+ return asr17 >> LEON3_ASR17_PROCESSOR_INDEX_SHIFT;
+}
+
#endif
#ifdef __cplusplus