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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2021-06-18 16:44:11 +0200 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2021-06-24 11:36:28 +0200 |
| commit | be96cb4345554fac614b252fe8f78dbf32c3a981 (patch) | |
| tree | e69c244a4e5ab5dd11bdd4c14ea2c5ef66ef6c34 /cpukit/score/cpu/sparc/include/rtems/score/cpu.h | |
| parent | bsps: bsp_interrupt_handler_dispatch_unchecked() (diff) | |
| download | rtems-be96cb4345554fac614b252fe8f78dbf32c3a981.tar.bz2 | |
sparc: Simplify trap table initialization
Move _ISR_Handler() to a separate file since it is now only used if a handler
is installed by _CPU_ISR_install_raw_handler().
Statically initialize the traps for external interrupts to use the new
_SPARC_Interrupt_trap() which directly dispatches the interrupt handlers
installed by rtems_interrupt_handler_install() via the BSP-provided
_SPARC_Interrupt_dispatch().
Since the trap table is now fully statically initialized, there is no longer a
dependency on the Cache Manager in the default configuration.
Update #4458.
Diffstat (limited to 'cpukit/score/cpu/sparc/include/rtems/score/cpu.h')
| -rw-r--r-- | cpukit/score/cpu/sparc/include/rtems/score/cpu.h | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/cpukit/score/cpu/sparc/include/rtems/score/cpu.h b/cpukit/score/cpu/sparc/include/rtems/score/cpu.h index f3f50d4f78..0abc929c54 100644 --- a/cpukit/score/cpu/sparc/include/rtems/score/cpu.h +++ b/cpukit/score/cpu/sparc/include/rtems/score/cpu.h @@ -743,9 +743,13 @@ extern const CPU_Trap_table_entry _CPU_Trap_slot_template; #ifndef ASM -/* - * ISR handler macros +/** + * @brief Dispatches the installed interrupt handlers. + * + * @param irq is the interrupt vector number of the external interrupt ranging + * from 0 to 15. This is not a trap number. */ +void _SPARC_Interrupt_dispatch( uint32_t irq ); /** * Disable all interrupts for a critical section. The previous |