From be96cb4345554fac614b252fe8f78dbf32c3a981 Mon Sep 17 00:00:00 2001 From: Sebastian Huber Date: Fri, 18 Jun 2021 16:44:11 +0200 Subject: sparc: Simplify trap table initialization Move _ISR_Handler() to a separate file since it is now only used if a handler is installed by _CPU_ISR_install_raw_handler(). Statically initialize the traps for external interrupts to use the new _SPARC_Interrupt_trap() which directly dispatches the interrupt handlers installed by rtems_interrupt_handler_install() via the BSP-provided _SPARC_Interrupt_dispatch(). Since the trap table is now fully statically initialized, there is no longer a dependency on the Cache Manager in the default configuration. Update #4458. --- cpukit/score/cpu/sparc/include/rtems/score/cpu.h | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) (limited to 'cpukit/score/cpu/sparc/include/rtems/score/cpu.h') diff --git a/cpukit/score/cpu/sparc/include/rtems/score/cpu.h b/cpukit/score/cpu/sparc/include/rtems/score/cpu.h index f3f50d4f78..0abc929c54 100644 --- a/cpukit/score/cpu/sparc/include/rtems/score/cpu.h +++ b/cpukit/score/cpu/sparc/include/rtems/score/cpu.h @@ -743,9 +743,13 @@ extern const CPU_Trap_table_entry _CPU_Trap_slot_template; #ifndef ASM -/* - * ISR handler macros +/** + * @brief Dispatches the installed interrupt handlers. + * + * @param irq is the interrupt vector number of the external interrupt ranging + * from 0 to 15. This is not a trap number. */ +void _SPARC_Interrupt_dispatch( uint32_t irq ); /** * Disable all interrupts for a critical section. The previous -- cgit v1.2.3