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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2022-09-27 07:43:37 +0200 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2022-10-14 10:48:22 +0200 |
| commit | 4c89fbcd316ca99fa16a0acc31f88fb80cb3060f (patch) | |
| tree | 1d5fb6dac956308d141bd7d9b20ec74bee38427b /cpukit/score/cpu/riscv | |
| parent | score: Move Thread_Control::Registers member (diff) | |
| download | rtems-4c89fbcd316ca99fa16a0acc31f88fb80cb3060f.tar.bz2 | |
score: Add CPU_THREAD_LOCAL_STORAGE_VARIANT
Update #3835.
Diffstat (limited to 'cpukit/score/cpu/riscv')
| -rw-r--r-- | cpukit/score/cpu/riscv/include/rtems/score/cpuimpl.h | 2 | ||||
| -rw-r--r-- | cpukit/score/cpu/riscv/riscv-context-initialize.c | 2 |
2 files changed, 3 insertions, 1 deletions
diff --git a/cpukit/score/cpu/riscv/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/riscv/include/rtems/score/cpuimpl.h index 5fd25e32cf..627c48f94c 100644 --- a/cpukit/score/cpu/riscv/include/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/riscv/include/rtems/score/cpuimpl.h @@ -54,6 +54,8 @@ #define CPU_PER_CPU_CONTROL_SIZE 16 #endif +#define CPU_THREAD_LOCAL_STORAGE_VARIANT 10 + #ifdef RTEMS_SMP #define RISCV_CONTEXT_IS_EXECUTING 0 #endif diff --git a/cpukit/score/cpu/riscv/riscv-context-initialize.c b/cpukit/score/cpu/riscv/riscv-context-initialize.c index c6bd99ebbd..572dc3ede3 100644 --- a/cpukit/score/cpu/riscv/riscv-context-initialize.c +++ b/cpukit/score/cpu/riscv/riscv-context-initialize.c @@ -68,7 +68,7 @@ void _CPU_Context_Initialize( if ( tls_area != NULL ) { void *tls_block; - tls_block = _TLS_TCB_before_TLS_block_initialize( tls_area ); + tls_block = _TLS_Initialize_area( tls_area ); context->tp = (uintptr_t) tls_block; } } |