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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2018-06-22 09:03:19 +0200 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2018-06-27 08:58:17 +0200 |
| commit | fef0a414cf9ee2ef0f3557687f3b9139e48af9f5 (patch) | |
| tree | 2b97f64957cc33c915e19722a655c948771f1c34 /cpukit/score/cpu/riscv/riscv-exception-handler.S | |
| parent | bsp/riscv: Fix some warnings (diff) | |
| download | rtems-fef0a414cf9ee2ef0f3557687f3b9139e48af9f5.tar.bz2 | |
bsp/riscv: Do not clear integer registers at start
There is no need to do this.
Update #3433.
Diffstat (limited to 'cpukit/score/cpu/riscv/riscv-exception-handler.S')
0 files changed, 0 insertions, 0 deletions