diff options
author | Ralf Corsepius <ralf.corsepius@rtems.org> | 2009-12-04 05:25:30 +0000 |
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committer | Ralf Corsepius <ralf.corsepius@rtems.org> | 2009-12-04 05:25:30 +0000 |
commit | 5bb38e15667c03ef44420cdeb7889db42649ece3 (patch) | |
tree | 82cf091802d6c2895f2a69ee74ad7373ec77607a /cpukit/score/cpu/powerpc/rtems | |
parent | Whitespace removal. (diff) | |
download | rtems-5bb38e15667c03ef44420cdeb7889db42649ece3.tar.bz2 |
Whitespace removal.
Diffstat (limited to 'cpukit/score/cpu/powerpc/rtems')
-rw-r--r-- | cpukit/score/cpu/powerpc/rtems/asm.h | 6 | ||||
-rw-r--r-- | cpukit/score/cpu/powerpc/rtems/new-exceptions/cpu.h | 10 | ||||
-rw-r--r-- | cpukit/score/cpu/powerpc/rtems/powerpc/registers.h | 2 | ||||
-rw-r--r-- | cpukit/score/cpu/powerpc/rtems/score/cpu.h | 6 | ||||
-rw-r--r-- | cpukit/score/cpu/powerpc/rtems/score/powerpc.h | 6 |
5 files changed, 15 insertions, 15 deletions
diff --git a/cpukit/score/cpu/powerpc/rtems/asm.h b/cpukit/score/cpu/powerpc/rtems/asm.h index 1afc422d31..d54c0607e2 100644 --- a/cpukit/score/cpu/powerpc/rtems/asm.h +++ b/cpukit/score/cpu/powerpc/rtems/asm.h @@ -49,7 +49,7 @@ */ #ifndef __USER_LABEL_PREFIX__ -#define __USER_LABEL_PREFIX__ +#define __USER_LABEL_PREFIX__ #endif #ifndef __REGISTER_PREFIX__ @@ -210,8 +210,8 @@ /* The following registers are for the MPC5xx */ #define eie 0x050 /* External Interrupt Enable Register */ #define eid 0x051 /* External Interrupt Disable Register */ -#define nri 0x052 /* Non-Recoverable Interrupt Register */ - +#define nri 0x052 /* Non-Recoverable Interrupt Register */ + #elif defined(mpc860) || defined(mpc821) /* The following registers are for the MPC8x0 */ #define der 0x095 /* Debug Enable Register */ diff --git a/cpukit/score/cpu/powerpc/rtems/new-exceptions/cpu.h b/cpukit/score/cpu/powerpc/rtems/new-exceptions/cpu.h index d620c5eb5d..e61cebd982 100644 --- a/cpukit/score/cpu/powerpc/rtems/new-exceptions/cpu.h +++ b/cpukit/score/cpu/powerpc/rtems/new-exceptions/cpu.h @@ -104,7 +104,7 @@ extern "C" { /* * Does the RTEMS invoke the user's ISR with the vector number and - * a pointer to the saved interrupt frame (1) or just the vector + * a pointer to the saved interrupt frame (1) or just the vector * number (0)? */ @@ -153,7 +153,7 @@ extern "C" { */ #ifndef ASM - + /* * This variable is optional. It is used on CPUs on which it is difficult * to generate an "uninitialized" FP context. It is filled in by @@ -194,7 +194,7 @@ SCORE_EXTERN void *_CPU_Interrupt_stack_high; */ #ifndef ASM - + SCORE_EXTERN struct { uint32_t *Disable_level; void *Stack; @@ -259,7 +259,7 @@ SCORE_EXTERN struct { */ #ifndef ASM - + static inline uint32_t _CPU_ISR_Get_level( void ) { register unsigned int msr; @@ -280,7 +280,7 @@ static inline void _CPU_ISR_Set_level( uint32_t level ) } _CPU_MSR_SET(msr); } - + void BSP_panic(char *); /* Fatal Error manager macros */ diff --git a/cpukit/score/cpu/powerpc/rtems/powerpc/registers.h b/cpukit/score/cpu/powerpc/rtems/powerpc/registers.h index 6d6144a59b..841ac50b17 100644 --- a/cpukit/score/cpu/powerpc/rtems/powerpc/registers.h +++ b/cpukit/score/cpu/powerpc/rtems/powerpc/registers.h @@ -43,7 +43,7 @@ /* Bit encodings for Hardware Implementation Register (HID0) on PowerPC 603, 604, etc. processors (not 601). */ -/* WARNING: HID0/HID1 are *truely* implementation dependent! +/* WARNING: HID0/HID1 are *truely* implementation dependent! * you *cannot* rely on the same bits to be present, * at the same place or even in the same register * on different CPU familys. diff --git a/cpukit/score/cpu/powerpc/rtems/score/cpu.h b/cpukit/score/cpu/powerpc/rtems/score/cpu.h index 1933308fac..01cd591a58 100644 --- a/cpukit/score/cpu/powerpc/rtems/score/cpu.h +++ b/cpukit/score/cpu/powerpc/rtems/score/cpu.h @@ -12,7 +12,7 @@ * * $Id$ */ - + #ifndef _RTEMS_SCORE_CPU_H #define _RTEMS_SCORE_CPU_H @@ -394,13 +394,13 @@ typedef struct CPU_Interrupt_frame { * endianness for ALL fetches -- both code and data -- so the code * will be fetched incorrectly. */ - + static inline uint32_t CPU_swap_u32( uint32_t value ) { uint32_t swapped; - + asm volatile("rlwimi %0,%1,8,24,31;" "rlwimi %0,%1,24,16,23;" "rlwimi %0,%1,8,8,15;" diff --git a/cpukit/score/cpu/powerpc/rtems/score/powerpc.h b/cpukit/score/cpu/powerpc/rtems/score/powerpc.h index efe7666c42..93ab3b6499 100644 --- a/cpukit/score/cpu/powerpc/rtems/score/powerpc.h +++ b/cpukit/score/cpu/powerpc/rtems/score/powerpc.h @@ -61,7 +61,7 @@ extern "C" { * This file contains the information required to build * RTEMS for the PowerPC family. */ - + /* Generic ppc */ #ifdef _SOFT_FLOAT @@ -72,7 +72,7 @@ extern "C" { #define CPU_MODEL_NAME "Generic (classic FPU)" #endif -#define PPC_ALIGNMENT 8 +#define PPC_ALIGNMENT 8 #define PPC_STRUCTURE_ALIGNMENT 32 /* @@ -132,7 +132,7 @@ extern "C" { * support doubles (8-byte floating point numbers). * * If the model does NOT have FP support, then the model does - * NOT have double length FP registers. + * NOT have double length FP registers. */ #if (PPC_HAS_FPU) |