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-rw-r--r--cpukit/score/cpu/powerpc/rtems/new-exceptions/cpu.h10
1 files changed, 5 insertions, 5 deletions
diff --git a/cpukit/score/cpu/powerpc/rtems/new-exceptions/cpu.h b/cpukit/score/cpu/powerpc/rtems/new-exceptions/cpu.h
index d620c5eb5d..e61cebd982 100644
--- a/cpukit/score/cpu/powerpc/rtems/new-exceptions/cpu.h
+++ b/cpukit/score/cpu/powerpc/rtems/new-exceptions/cpu.h
@@ -104,7 +104,7 @@ extern "C" {
/*
* Does the RTEMS invoke the user's ISR with the vector number and
- * a pointer to the saved interrupt frame (1) or just the vector
+ * a pointer to the saved interrupt frame (1) or just the vector
* number (0)?
*/
@@ -153,7 +153,7 @@ extern "C" {
*/
#ifndef ASM
-
+
/*
* This variable is optional. It is used on CPUs on which it is difficult
* to generate an "uninitialized" FP context. It is filled in by
@@ -194,7 +194,7 @@ SCORE_EXTERN void *_CPU_Interrupt_stack_high;
*/
#ifndef ASM
-
+
SCORE_EXTERN struct {
uint32_t *Disable_level;
void *Stack;
@@ -259,7 +259,7 @@ SCORE_EXTERN struct {
*/
#ifndef ASM
-
+
static inline uint32_t _CPU_ISR_Get_level( void )
{
register unsigned int msr;
@@ -280,7 +280,7 @@ static inline void _CPU_ISR_Set_level( uint32_t level )
}
_CPU_MSR_SET(msr);
}
-
+
void BSP_panic(char *);
/* Fatal Error manager macros */