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| author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2004-04-12 22:10:27 +0000 |
|---|---|---|
| committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2004-04-12 22:10:27 +0000 |
| commit | e69307b790d84b3ae83c6a9a314a81935dd7b1a4 (patch) | |
| tree | b51aefa098a0d0e1219a9738613aa4c223392508 /cpukit/score/cpu/powerpc/rtems/asm.h | |
| parent | 2004-04-12 David Querbach <querbach@realtime.bc.ca> (diff) | |
| download | rtems-e69307b790d84b3ae83c6a9a314a81935dd7b1a4.tar.bz2 | |
2004-04-12 David Querbach <querbach@realtime.bc.ca>
* asm.h, rtems/new-exceptions/cpu.h, rtems/score/ppc.h: addition of
MPC555 support as part of the addition of the SS555 BSP.
Diffstat (limited to 'cpukit/score/cpu/powerpc/rtems/asm.h')
| -rw-r--r-- | cpukit/score/cpu/powerpc/rtems/asm.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/cpukit/score/cpu/powerpc/rtems/asm.h b/cpukit/score/cpu/powerpc/rtems/asm.h index 419202eb26..74dc28e57d 100644 --- a/cpukit/score/cpu/powerpc/rtems/asm.h +++ b/cpukit/score/cpu/powerpc/rtems/asm.h @@ -203,6 +203,12 @@ #define br7 0x087 /* DCR: memory bank register 7 */ /* end of IBM400 series register definitions */ +#elif defined(mpc555) +/* The following registers are for the MPC5xx */ +#define eie 0x050 /* External Interrupt Enable Register */ +#define eid 0x051 /* External Interrupt Disable Register */ +#define nri 0x052 /* Non-Recoverable Interrupt Register */ + #elif defined(mpc860) || defined(mpc821) /* The following registers are for the MPC8x0 */ #define der 0x095 /* Debug Enable Register */ |