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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2022-09-27 07:43:37 +0200 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2022-10-14 10:48:22 +0200 |
| commit | 4c89fbcd316ca99fa16a0acc31f88fb80cb3060f (patch) | |
| tree | 1d5fb6dac956308d141bd7d9b20ec74bee38427b /cpukit/score/cpu/no_cpu/include/rtems/score | |
| parent | score: Move Thread_Control::Registers member (diff) | |
| download | rtems-4c89fbcd316ca99fa16a0acc31f88fb80cb3060f.tar.bz2 | |
score: Add CPU_THREAD_LOCAL_STORAGE_VARIANT
Update #3835.
Diffstat (limited to 'cpukit/score/cpu/no_cpu/include/rtems/score')
| -rw-r--r-- | cpukit/score/cpu/no_cpu/include/rtems/score/cpuimpl.h | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/cpukit/score/cpu/no_cpu/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/no_cpu/include/rtems/score/cpuimpl.h index d5082383e8..72d223de24 100644 --- a/cpukit/score/cpu/no_cpu/include/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/no_cpu/include/rtems/score/cpuimpl.h @@ -54,6 +54,24 @@ */ #define CPU_PER_CPU_CONTROL_SIZE 0 +/** + * @brief Defines the thread-local storage (TLS) variant. + * + * Use one of the following values: + * + * 10: The architecture uses Variant I and the TLS offsets emitted by the + * linker neglect the TCB (examples: nios2, m68k, microblaze, powerpc, + * riscv). The thread pointer directly references the thread-local data + * area. + * + * 11: The architecture uses Variant I and the TLS offsets emitted by the + * linker take the TCB into account (examples: arm, aarch64). + * The thread pointer references the TCB. + * + * 20: The architecture uses Variant II (examples: i386, sparc). + */ +#define CPU_THREAD_LOCAL_STORAGE_VARIANT 10 + #ifndef ASM #ifdef __cplusplus |