2010-06-28 Joel Sherrill <joel.sherrill@oarcorp.com>

	PR 1573/cpukit
	* irq.c, rtems/score/cpu.h: Add a per cpu data structure which contains
	the information required by RTEMS for each CPU core. This
	encapsulates information such as thread executing, heir, idle and
	dispatch needed.

1 files changed, 3 insertions, 10 deletions

diff --git a/cpukit/score/cpu/nios2/irq.c b/cpukit/score/cpu/nios2/irq.c
index 2f13d86e3d..a083cc7cae 100644
--- a/cpukit/score/cpu/nios2/irq.c
+++ b/cpukit/score/cpu/nios2/irq.c
@@ -64,28 +64,21 @@ void __ISR_Handler(uint32_t vector, CPU_Interrupt_frame *ifr)
 
   _ISR_Nest_level--;
 
-  if( _ISR_Nest_level == 0)
-  {
+  if( _ISR_Nest_level == 0) {
 #if( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE)
     stack_ptr = _old_stack_ptr;
 #endif
 
     if( _Thread_Dispatch_disable_level == 0 )
     {
-      if ( _Context_Switch_necessary || _ISR_Signals_to_thread_executing )
-      {
-        _ISR_Signals_to_thread_executing = FALSE;
+      if ( _Context_Switch_necessary ) {
         _CPU_ISR_Enable( level );
         _Thread_Dispatch();
         /* may have switched to another task and not return here immed. */
         _CPU_ISR_Disable( level ); /* Keep _pairs_ of Enable/Disable */
       }
     }
-    else
-    {
-      _ISR_Signals_to_thread_executing = FALSE;
-    };
-  };
+  }
 
   _CPU_ISR_Enable( level );
 }