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authorJoel Sherrill <joel.sherrill@OARcorp.com>2010-06-29 00:31:47 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>2010-06-29 00:31:47 +0000
commit9939ecc41208d44263d76df4da2a302bc197f7bb (patch)
treedc5e0e3bde4a3c71b2d8470474c0ec3d41beb5da
parent2010-06-28 Joel Sherrill <joel.sherrill@oarcorp.com> (diff)
downloadrtems-9939ecc41208d44263d76df4da2a302bc197f7bb.tar.bz2
2010-06-28 Joel Sherrill <joel.sherrill@oarcorp.com>
PR 1573/cpukit * irq.c, rtems/score/cpu.h: Add a per cpu data structure which contains the information required by RTEMS for each CPU core. This encapsulates information such as thread executing, heir, idle and dispatch needed.
-rw-r--r--cpukit/score/cpu/lm32/ChangeLog8
-rw-r--r--cpukit/score/cpu/lm32/irq.c11
-rw-r--r--cpukit/score/cpu/lm32/rtems/score/cpu.h14
-rw-r--r--cpukit/score/cpu/nios2/ChangeLog8
-rw-r--r--cpukit/score/cpu/nios2/irq.c13
-rw-r--r--cpukit/score/cpu/nios2/rtems/score/cpu.h14
6 files changed, 22 insertions, 46 deletions
diff --git a/cpukit/score/cpu/lm32/ChangeLog b/cpukit/score/cpu/lm32/ChangeLog
index 43beca0f6c..e3ae4fdead 100644
--- a/cpukit/score/cpu/lm32/ChangeLog
+++ b/cpukit/score/cpu/lm32/ChangeLog
@@ -1,3 +1,11 @@
+2010-06-28 Joel Sherrill <joel.sherrill@oarcorp.com>
+
+ PR 1573/cpukit
+ * irq.c, rtems/score/cpu.h: Add a per cpu data structure which contains
+ the information required by RTEMS for each CPU core. This
+ encapsulates information such as thread executing, heir, idle and
+ dispatch needed.
+
2010-05-29 Ralf Corsépius <ralf.corsepius@rtems.org>
* irq.c: Change _exception_stack_frame into void*.
diff --git a/cpukit/score/cpu/lm32/irq.c b/cpukit/score/cpu/lm32/irq.c
index d2c38b9fd5..0dd2605e30 100644
--- a/cpukit/score/cpu/lm32/irq.c
+++ b/cpukit/score/cpu/lm32/irq.c
@@ -19,8 +19,9 @@
#include <rtems/system.h>
#include <rtems/score/cpu.h>
-#include <rtems/score/isr.h>
#include <rtems/score/thread.h>
+#include <rtems/score/isr.h>
+#include <rtems/score/percpu.h>
/*
* This routine provides the RTEMS interrupt management.
@@ -77,13 +78,7 @@ void __ISR_Handler(uint32_t vector, CPU_Interrupt_frame *ifr)
if ( _ISR_Nest_level )
return;
- if ( _Thread_Dispatch_disable_level ) {
- _ISR_Signals_to_thread_executing = FALSE;
- return;
- }
-
- if ( _Context_Switch_necessary || _ISR_Signals_to_thread_executing ) {
- _ISR_Signals_to_thread_executing = FALSE;
+ if ( _Context_Switch_necessary ) {
/* save off our stack frame so the context switcher can get to it */
_exception_stack_frame = ifr;
diff --git a/cpukit/score/cpu/lm32/rtems/score/cpu.h b/cpukit/score/cpu/lm32/rtems/score/cpu.h
index 973fad29b8..7f8d4ba53f 100644
--- a/cpukit/score/cpu/lm32/rtems/score/cpu.h
+++ b/cpukit/score/cpu/lm32/rtems/score/cpu.h
@@ -560,20 +560,6 @@ SCORE_EXTERN Context_Control_fp _CPU_Null_fp_context;
* XXX document implementation including references if appropriate
*/
-/**
- * @ingroup CPUInterrupt
- * This variable points to the lowest physical address of the interrupt
- * stack.
- */
-SCORE_EXTERN void *_CPU_Interrupt_stack_low;
-
-/**
- * @ingroup CPUInterrupt
- * This variable points to the lowest physical address of the interrupt
- * stack.
- */
-SCORE_EXTERN void *_CPU_Interrupt_stack_high;
-
/*
* Nothing prevents the porter from declaring more CPU specific variables.
*
diff --git a/cpukit/score/cpu/nios2/ChangeLog b/cpukit/score/cpu/nios2/ChangeLog
index d1670cf8a8..18fee9a2b4 100644
--- a/cpukit/score/cpu/nios2/ChangeLog
+++ b/cpukit/score/cpu/nios2/ChangeLog
@@ -1,3 +1,11 @@
+2010-06-28 Joel Sherrill <joel.sherrill@oarcorp.com>
+
+ PR 1573/cpukit
+ * irq.c, rtems/score/cpu.h: Add a per cpu data structure which contains
+ the information required by RTEMS for each CPU core. This
+ encapsulates information such as thread executing, heir, idle and
+ dispatch needed.
+
2010-03-27 Joel Sherrill <joel.sherrill@oarcorp.com>
* cpu.c, cpu_asm.S, irq.c: Add include of config.h
diff --git a/cpukit/score/cpu/nios2/irq.c b/cpukit/score/cpu/nios2/irq.c
index 2f13d86e3d..a083cc7cae 100644
--- a/cpukit/score/cpu/nios2/irq.c
+++ b/cpukit/score/cpu/nios2/irq.c
@@ -64,28 +64,21 @@ void __ISR_Handler(uint32_t vector, CPU_Interrupt_frame *ifr)
_ISR_Nest_level--;
- if( _ISR_Nest_level == 0)
- {
+ if( _ISR_Nest_level == 0) {
#if( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE)
stack_ptr = _old_stack_ptr;
#endif
if( _Thread_Dispatch_disable_level == 0 )
{
- if ( _Context_Switch_necessary || _ISR_Signals_to_thread_executing )
- {
- _ISR_Signals_to_thread_executing = FALSE;
+ if ( _Context_Switch_necessary ) {
_CPU_ISR_Enable( level );
_Thread_Dispatch();
/* may have switched to another task and not return here immed. */
_CPU_ISR_Disable( level ); /* Keep _pairs_ of Enable/Disable */
}
}
- else
- {
- _ISR_Signals_to_thread_executing = FALSE;
- };
- };
+ }
_CPU_ISR_Enable( level );
}
diff --git a/cpukit/score/cpu/nios2/rtems/score/cpu.h b/cpukit/score/cpu/nios2/rtems/score/cpu.h
index c4e113e783..f6ca30c691 100644
--- a/cpukit/score/cpu/nios2/rtems/score/cpu.h
+++ b/cpukit/score/cpu/nios2/rtems/score/cpu.h
@@ -590,20 +590,6 @@ SCORE_EXTERN Context_Control_fp _CPU_Null_fp_context;
* XXX document implementation including references if appropriate
*/
-/**
- * @ingroup CPUInterrupt
- * This variable points to the lowest physical address of the interrupt
- * stack.
- */
-SCORE_EXTERN void *_CPU_Interrupt_stack_low;
-
-/**
- * @ingroup CPUInterrupt
- * This variable points to the lowest physical address of the interrupt
- * stack.
- */
-SCORE_EXTERN void *_CPU_Interrupt_stack_high;
-
/*
* Nothing prevents the porter from declaring more CPU specific variables.
*