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author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2000-10-24 21:48:33 +0000 |
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committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2000-10-24 21:48:33 +0000 |
commit | fda47cd1b90921c52ec995ec946560c51307c553 (patch) | |
tree | 2fbe1e7496e494b835a9e0a00cccdc81550f18d9 /cpukit/score/cpu/mips/rtems/score/mips.h | |
parent | 2000-10-23 Joel Sherrill <joel@OARcorp.com> (diff) | |
download | rtems-fda47cd1b90921c52ec995ec946560c51307c553.tar.bz2 |
2000-10-24 Alan Cudmore <alanc@linuxstart.com> and
Joel Sherrill <joel@OARcorp.com>
* This is a major reworking of the mips64orion port to use
gcc predefines as much as possible and a big push to multilib
the mips port. The mips64orion port was copied/renamed to mips
to be more like other GNU tools. Alan did most of the technical
work of determining how to map old macro names used by the mips64orion
port to standard compiler macro definitions. Joel did the merge
with CVS magic to keep individual file history and did the BSP
modifications. Details follow:
* Makefile.am: idtmon.h in mips64orion port not present.
* asm.h: MIPS64ORION replaced with MIPS. Frame setup macros added.
* cpu.c: Comments added.
* cpu_asm.S: Conditionals changed. MIPS ISA level 1 support added.
First attempt at exception/interrupt processing for ISA level 1
and minus any use of IDT/MON added.
* idtcpu.h: Conditionals changed to use gcc predefines.
* iregdef.h: Ditto.
* cpu_asm.h: No real change. Merger required commit.
* rtems/Makefile.am: Ditto.
* rtems/score/Makefile.am: Ditto.
* rtems/score/cpu.h: Change MIPS64ORION to MIPS.
* rtems/score/mips64orion.h: Change MIPS64ORION to MIPS. Convert
from using RTEMS_CPU_MODEL to gcc predefines to figre things out.
Diffstat (limited to 'cpukit/score/cpu/mips/rtems/score/mips.h')
-rw-r--r-- | cpukit/score/cpu/mips/rtems/score/mips.h | 45 |
1 files changed, 19 insertions, 26 deletions
diff --git a/cpukit/score/cpu/mips/rtems/score/mips.h b/cpukit/score/cpu/mips/rtems/score/mips.h index 2ec96da0a4..90e959bd47 100644 --- a/cpukit/score/cpu/mips/rtems/score/mips.h +++ b/cpukit/score/cpu/mips/rtems/score/mips.h @@ -15,7 +15,7 @@ * Transition Networks makes no representations about the suitability * of this software for any purpose. * - * Derived from source copyrighted as follows: + * Derived from c/src/exec/score/cpu/no_cpu/no_cpu.h: * * COPYRIGHT (c) 1989-1999. * On-Line Applications Research Corporation (OAR). @@ -28,8 +28,8 @@ */ /* @(#)mips64orion.h 08/29/96 1.3 */ -#ifndef _INCLUDE_MIPS64ORION_h -#define _INCLUDE_MIPS64ORION_h +#ifndef _INCLUDE_MIPS_h +#define _INCLUDE_MIPS_h #ifdef __cplusplus extern "C" { @@ -44,40 +44,33 @@ extern "C" { * of the family. */ -#if defined(rtems_multilib) -/* - * Figure out all CPU Model Feature Flags based upon compiler - * predefines. - */ - -#define CPU_MODEL_NAME "rtems_multilib" -#define MIPS64ORION_HAS_FPU 1 - -#elif defined(R4650) - -#define CPU_MODEL_NAME "R4650" -#define MIPS64ORION_HAS_FPU 1 - -#elif defined(R4600) - -#define CPU_MODEL_NAME "R4600" -#define MIPS64ORION_HAS_FPU 1 +#if defined(__mips_soft_float) +#define MIPS_HAS_FPU 0 +#else +#define MIPS_HAS_FPU 1 +#endif +#if (__mips == 1) +#define CPU_MODEL_NAME "ISA Level 1 or 2" +#elif (__mips == 3) +#if defined(__mips64) +#define CPU_MODEL_NAME "ISA Level 4" #else - -#error "Unsupported CPU Model" - +#define CPU_MODEL_NAME "ISA Level 3" +#endif +#else +#error "Unknown MIPS ISA level" #endif /* * Define the name of the CPU family. */ -#define CPU_NAME "MIPS R46xxx" +#define CPU_NAME "MIPS" #ifdef __cplusplus } #endif -#endif /* ! _INCLUDE_MIPS64ORION_h */ +#endif /* ! _INCLUDE_MIPS_h */ /* end of include file */ |