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| author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2000-10-24 21:48:33 +0000 |
|---|---|---|
| committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2000-10-24 21:48:33 +0000 |
| commit | fda47cd1b90921c52ec995ec946560c51307c553 (patch) | |
| tree | 2fbe1e7496e494b835a9e0a00cccdc81550f18d9 /cpukit/score/cpu/mips/rtems/score/cpu.h | |
| parent | 2000-10-23 Joel Sherrill <joel@OARcorp.com> (diff) | |
| download | rtems-fda47cd1b90921c52ec995ec946560c51307c553.tar.bz2 | |
2000-10-24 Alan Cudmore <alanc@linuxstart.com> and
Joel Sherrill <joel@OARcorp.com>
* This is a major reworking of the mips64orion port to use
gcc predefines as much as possible and a big push to multilib
the mips port. The mips64orion port was copied/renamed to mips
to be more like other GNU tools. Alan did most of the technical
work of determining how to map old macro names used by the mips64orion
port to standard compiler macro definitions. Joel did the merge
with CVS magic to keep individual file history and did the BSP
modifications. Details follow:
* Makefile.am: idtmon.h in mips64orion port not present.
* asm.h: MIPS64ORION replaced with MIPS. Frame setup macros added.
* cpu.c: Comments added.
* cpu_asm.S: Conditionals changed. MIPS ISA level 1 support added.
First attempt at exception/interrupt processing for ISA level 1
and minus any use of IDT/MON added.
* idtcpu.h: Conditionals changed to use gcc predefines.
* iregdef.h: Ditto.
* cpu_asm.h: No real change. Merger required commit.
* rtems/Makefile.am: Ditto.
* rtems/score/Makefile.am: Ditto.
* rtems/score/cpu.h: Change MIPS64ORION to MIPS.
* rtems/score/mips64orion.h: Change MIPS64ORION to MIPS. Convert
from using RTEMS_CPU_MODEL to gcc predefines to figre things out.
Diffstat (limited to 'cpukit/score/cpu/mips/rtems/score/cpu.h')
| -rw-r--r-- | cpukit/score/cpu/mips/rtems/score/cpu.h | 11 |
1 files changed, 5 insertions, 6 deletions
diff --git a/cpukit/score/cpu/mips/rtems/score/cpu.h b/cpukit/score/cpu/mips/rtems/score/cpu.h index 35d936ec7e..7527ddecdf 100644 --- a/cpukit/score/cpu/mips/rtems/score/cpu.h +++ b/cpukit/score/cpu/mips/rtems/score/cpu.h @@ -18,7 +18,7 @@ * Transition Networks makes no representations about the suitability * of this software for any purpose. * - * Derived from source copyrighted as follows: + * Derived from c/src/exec/score/cpu/no_cpu/cpu.h: * * COPYRIGHT (c) 1989-1999. * On-Line Applications Research Corporation (OAR). @@ -93,7 +93,7 @@ extern void mips_fatal_error ( int error ); /* * Does RTEMS manage a dedicated interrupt stack in software? * - * If TRUE, then a stack is allocated in _ISR_Handler_initialization. + * If TRUE, then a stack is allocated in _Interrupt_Manager_initialization. * If FALSE, nothing is done. * * If the CPU supports a dedicated interrupt stack in hardware, @@ -162,19 +162,18 @@ extern void mips_fatal_error ( int error ); * If there is a FP coprocessor such as the i387 or mc68881, then * the answer is TRUE. * - * The macro name "MIPS64ORION_HAS_FPU" should be made CPU specific. + * The macro name "MIPS_HAS_FPU" should be made CPU specific. * It indicates whether or not this CPU model has FP support. For * example, it would be possible to have an i386_nofp CPU model * which set this to false to indicate that you have an i386 without * an i387 and wish to leave floating point support out of RTEMS. */ -#if ( MIPS64ORION_HAS_FPU == 1 ) +#if ( MIPS_HAS_FPU == 1 ) #define CPU_HARDWARE_FP TRUE #else #define CPU_HARDWARE_FP FALSE #endif -#define CPU_SOFTWARE_FP FALSE /* * Are all tasks RTEMS_FLOATING_POINT tasks implicitly? @@ -444,7 +443,7 @@ typedef struct { */ /* - * Macros to access MIPS64ORION specific additions to the CPU Table + * Macros to access MIPS specific additions to the CPU Table */ #define rtems_cpu_configuration_get_clicks_per_microsecond() \ |