diff options
| author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2001-01-12 13:36:30 +0000 |
|---|---|---|
| committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2001-01-12 13:36:30 +0000 |
| commit | 9c1dc8cd2ad173ffa889ff0ff577f92ff33ad1aa (patch) | |
| tree | 6ba6802ca769d834ab6a57bc353ec7267b7527b2 /cpukit/score/cpu/mips/ChangeLog | |
| parent | 2001-01-12 Joel Sherrill <joel@OARcorp.com> (diff) | |
| download | rtems-9c1dc8cd2ad173ffa889ff0ff577f92ff33ad1aa.tar.bz2 | |
2001-01-12 Joel Sherrill <joel@OARcorp.com>
* rtems/score/mips.h (mips_get_sr, mips_set_sr): Corrected
register constraints from "general" to "register".
Diffstat (limited to 'cpukit/score/cpu/mips/ChangeLog')
| -rw-r--r-- | cpukit/score/cpu/mips/ChangeLog | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/cpukit/score/cpu/mips/ChangeLog b/cpukit/score/cpu/mips/ChangeLog index 0a3eca1838..c90be4053a 100644 --- a/cpukit/score/cpu/mips/ChangeLog +++ b/cpukit/score/cpu/mips/ChangeLog @@ -1,3 +1,8 @@ +2001-01-12 Joel Sherrill <joel@OARcorp.com> + + * rtems/score/mips.h (mips_get_sr, mips_set_sr): Corrected + register constraints from "general" to "register". + 2001-01-09 Joel Sherrill <joel@OARcorp.com> * cpu_asm.S: Use SR_INTERRUPT_ENABLE_BITS instead of SR_XXX constants |