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| author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2001-01-12 13:36:30 +0000 |
|---|---|---|
| committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2001-01-12 13:36:30 +0000 |
| commit | 9c1dc8cd2ad173ffa889ff0ff577f92ff33ad1aa (patch) | |
| tree | 6ba6802ca769d834ab6a57bc353ec7267b7527b2 /cpukit | |
| parent | 2001-01-12 Joel Sherrill <joel@OARcorp.com> (diff) | |
| download | rtems-9c1dc8cd2ad173ffa889ff0ff577f92ff33ad1aa.tar.bz2 | |
2001-01-12 Joel Sherrill <joel@OARcorp.com>
* rtems/score/mips.h (mips_get_sr, mips_set_sr): Corrected
register constraints from "general" to "register".
Diffstat (limited to 'cpukit')
| -rw-r--r-- | cpukit/score/cpu/mips/ChangeLog | 5 | ||||
| -rw-r--r-- | cpukit/score/cpu/mips/rtems/score/mips.h | 4 |
2 files changed, 7 insertions, 2 deletions
diff --git a/cpukit/score/cpu/mips/ChangeLog b/cpukit/score/cpu/mips/ChangeLog index 0a3eca1838..c90be4053a 100644 --- a/cpukit/score/cpu/mips/ChangeLog +++ b/cpukit/score/cpu/mips/ChangeLog @@ -1,3 +1,8 @@ +2001-01-12 Joel Sherrill <joel@OARcorp.com> + + * rtems/score/mips.h (mips_get_sr, mips_set_sr): Corrected + register constraints from "general" to "register". + 2001-01-09 Joel Sherrill <joel@OARcorp.com> * cpu_asm.S: Use SR_INTERRUPT_ENABLE_BITS instead of SR_XXX constants diff --git a/cpukit/score/cpu/mips/rtems/score/mips.h b/cpukit/score/cpu/mips/rtems/score/mips.h index e85540f892..4ef807971d 100644 --- a/cpukit/score/cpu/mips/rtems/score/mips.h +++ b/cpukit/score/cpu/mips/rtems/score/mips.h @@ -77,12 +77,12 @@ extern "C" { #define mips_get_sr( _x ) \ do { \ - asm volatile( "mfc0 %0, $12; nop" : "=g" (_x) : ); \ + asm volatile( "mfc0 %0, $12; nop" : "=r" (_x) : ); \ } while (0) #define mips_set_sr( _x ) \ do { \ - unsigned int __x = (_x); \ + register unsigned int __x = (_x); \ asm volatile( "mtc0 %0, $12; nop" : : "r" (__x) ); \ } while (0) |