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author | Eric Norum <WENorum@lbl.gov> | 2005-01-28 19:48:25 +0000 |
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committer | Eric Norum <WENorum@lbl.gov> | 2005-01-28 19:48:25 +0000 |
commit | fa9fa1e42233f5ee7da7d4a2b4ed0c5d848926f4 (patch) | |
tree | f63b5a273a2857c88c6fddb96e4a623295d0fc29 /cpukit/score/cpu/m68k/rtems/score/cpu.h | |
parent | New BSP/CPU. (diff) | |
download | rtems-fa9fa1e42233f5ee7da7d4a2b4ed0c5d848926f4.tar.bz2 |
ColdFire ISA A+ instructions.
Diffstat (limited to 'cpukit/score/cpu/m68k/rtems/score/cpu.h')
-rw-r--r-- | cpukit/score/cpu/m68k/rtems/score/cpu.h | 12 |
1 files changed, 11 insertions, 1 deletions
diff --git a/cpukit/score/cpu/m68k/rtems/score/cpu.h b/cpukit/score/cpu/m68k/rtems/score/cpu.h index 8f25254b4e..94dfdbfb02 100644 --- a/cpukit/score/cpu/m68k/rtems/score/cpu.h +++ b/cpukit/score/cpu/m68k/rtems/score/cpu.h @@ -480,8 +480,18 @@ void _CPU_Thread_Idle_body( void ); #define _CPU_Bitfield_Find_first_bit( _value, _output ) \ asm volatile( "bfffo (%1),#0,#16,%0" : "=d" (_output) : "a" (&_value)); -#else +#elif ( M68K_HAS_ISA_APLUS == 1 ) + /* This is simplified by the fact that RTEMS never calls it with _value=0 */ +#define _CPU_Bitfield_Find_first_bit( _value, _output ) \ + asm volatile ( \ + " swap %0\n" \ + " ff1.l %0\n" \ + : "=d" ((_output)) \ + : "0" ((_value)) \ + : "cc" ) ; + +#else /* duplicates BFFFO results for 16 bits (i.e., 15-(_priority) in _CPU_Priority_bits_index is not needed), handles the 0 case, and does not molest _value -- jsg */ |