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author | Alex Ivanov <alexivanov97@gmail.com> | 2012-11-30 15:34:17 -0600 |
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committer | Joel Sherrill <joel.sherrill@oarcorp.com> | 2012-11-30 15:35:36 -0600 |
commit | e0f91da505b5c907b545016645c07a3132696236 (patch) | |
tree | a3cbe53af4f52687425266b19082eb42ce34218b /cpukit/score/cpu/lm32/cpu.c | |
parent | sparc cpu.h: Correct spacing (diff) | |
download | rtems-e0f91da505b5c907b545016645c07a3132696236.tar.bz2 |
score misc: Score misc: Clean up Doxygen #9 (GCI 2012)
This patch is a task from GCI 2012 which improves the Doxygen
comments in the RTEMS source.
https://google-melange.appspot.com/gci/task/view/google/gci2012/7977211
Diffstat (limited to 'cpukit/score/cpu/lm32/cpu.c')
-rw-r--r-- | cpukit/score/cpu/lm32/cpu.c | 36 |
1 files changed, 6 insertions, 30 deletions
diff --git a/cpukit/score/cpu/lm32/cpu.c b/cpukit/score/cpu/lm32/cpu.c index d668dd4de6..6df5576e15 100644 --- a/cpukit/score/cpu/lm32/cpu.c +++ b/cpukit/score/cpu/lm32/cpu.c @@ -1,7 +1,10 @@ -/* - * Lattice Mico32 (lm32) CPU Dependent Source - * +/** + * @file * + * @brief LM32 CPU Dependent Source + */ + +/* * COPYRIGHT (c) 1989-1999. * On-Line Applications Research Corporation (OAR). * @@ -44,14 +47,6 @@ void _CPU_Initialize(void) /* FP context initialization support goes here */ } -/* - * _CPU_ISR_Get_level - * - * LM32 Specific Information: - * - * XXX document implementation including references if appropriate - */ - uint32_t _CPU_ISR_Get_level( void ) { /* @@ -81,25 +76,6 @@ void _CPU_ISR_install_raw_handler( */ } -/* - * _CPU_ISR_install_vector - * - * This kernel routine installs the RTEMS handler for the - * specified vector. - * - * Input parameters: - * vector - interrupt vector number - * old_handler - former ISR for this vector number - * new_handler - replacement ISR for this vector number - * - * Output parameters: NONE - * - * - * LM32 Specific Information: - * - * XXX document implementation including references if appropriate - */ - void _CPU_ISR_install_vector( uint32_t vector, proc_ptr new_handler, |