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authorRalf Corsepius <ralf.corsepius@rtems.org>2009-12-04 04:27:21 +0000
committerRalf Corsepius <ralf.corsepius@rtems.org>2009-12-04 04:27:21 +0000
commit42e243eeef1dd20a5053dbe53ed9ef5eebd7d181 (patch)
treecc00b82136f3cb923861f051c40d3dd978d89feb /cpukit/score/cpu/i386
parent2009-12-03 Joel Sherrill <joel.sherrill@oarcorp.com> (diff)
downloadrtems-42e243eeef1dd20a5053dbe53ed9ef5eebd7d181.tar.bz2
Whitespace removal.
Diffstat (limited to 'cpukit/score/cpu/i386')
-rw-r--r--cpukit/score/cpu/i386/cpu.c2
-rw-r--r--cpukit/score/cpu/i386/rtems/score/cpu.h6
-rw-r--r--cpukit/score/cpu/i386/sse_test.c26
3 files changed, 17 insertions, 17 deletions
diff --git a/cpukit/score/cpu/i386/cpu.c b/cpukit/score/cpu/i386/cpu.c
index e9c2dc64e0..d5300e1006 100644
--- a/cpukit/score/cpu/i386/cpu.c
+++ b/cpukit/score/cpu/i386/cpu.c
@@ -76,7 +76,7 @@ void _CPU_Initialize(void)
* As a courtesy, we double-check here but it
* may be too late (which is also why we don't
* enable SSE here).
- */
+ */
{
uint32_t cr4;
__asm__ __volatile__("mov %%cr4, %0":"=r"(cr4));
diff --git a/cpukit/score/cpu/i386/rtems/score/cpu.h b/cpukit/score/cpu/i386/rtems/score/cpu.h
index 77e6c6bff3..731fcd73c7 100644
--- a/cpukit/score/cpu/i386/rtems/score/cpu.h
+++ b/cpukit/score/cpu/i386/rtems/score/cpu.h
@@ -360,7 +360,7 @@ SCORE_EXTERN void *_CPU_Interrupt_stack_high;
uint32_t _CPU_ISR_Get_level( void );
-/* Make sure interrupt stack has space for ISR
+/* Make sure interrupt stack has space for ISR
* 'vector' arg at the top and that it is aligned
* properly.
*/
@@ -391,7 +391,7 @@ uint32_t _CPU_ISR_Get_level( void );
/*
* Stack alignment note:
- *
+ *
* We want the stack to look to the '_entry_point' routine
* like an ordinary stack frame as if '_entry_point' was
* called from C-code.
@@ -405,7 +405,7 @@ uint32_t _CPU_ISR_Get_level( void );
* ------ (alignment boundary)
* SP-> return_addr return here when _entry_point returns which (never happens)
*
- *
+ *
* Hence we must initialize the stack as follows
*
* [arg1 ]: n/a
diff --git a/cpukit/score/cpu/i386/sse_test.c b/cpukit/score/cpu/i386/sse_test.c
index a6e0fbd6bd..e54b77830b 100644
--- a/cpukit/score/cpu/i386/sse_test.c
+++ b/cpukit/score/cpu/i386/sse_test.c
@@ -1,18 +1,18 @@
/* $Id$ */
-/*
+/*
* Authorship
* ----------
* This software was created by
* Till Straumann <strauman@slac.stanford.edu>, 2009,
* Stanford Linear Accelerator Center, Stanford University.
- *
+ *
* Acknowledgement of sponsorship
* ------------------------------
* This software was produced by
* the Stanford Linear Accelerator Center, Stanford University,
* under Contract DE-AC03-76SFO0515 with the Department of Energy.
- *
+ *
* Government disclaimer of liability
* ----------------------------------
* Neither the United States nor the United States Department of Energy,
@@ -21,18 +21,18 @@
* completeness, or usefulness of any data, apparatus, product, or process
* disclosed, or represents that its use would not infringe privately owned
* rights.
- *
+ *
* Stanford disclaimer of liability
* --------------------------------
* Stanford University makes no representations or warranties, express or
* implied, nor assumes any liability for the use of this software.
- *
+ *
* Stanford disclaimer of copyright
* --------------------------------
* Stanford University, owner of the copyright, hereby disclaims its
* copyright and all other rights in this software. Hence, anyone may
- * freely use it for any purpose without restriction.
- *
+ * freely use it for any purpose without restriction.
+ *
* Maintenance of notices
* ----------------------
* In the interest of clarity regarding the origin and status of this
@@ -41,10 +41,10 @@
* or distributed by the recipient and are to be affixed to any copy of
* software made or distributed by the recipient that contains a copy or
* derivative of this software.
- *
+ *
* ------------------ SLAC Software Notices, Set 4 OTT.002a, 2004 FEB 03
*/
-
+
/* Code for testing FPU/SSE context save/restore across exceptions
* (including interrupts).
@@ -60,7 +60,7 @@
* 2b loads context from 1) into FPU/SSE
* 2c raises an exception or interrupt
*
- * * (2d save FPU/SSE context after irq/exception returns to
+ * * (2d save FPU/SSE context after irq/exception returns to
* separate area for verification
* 2e reload original FP/SSE context.)
*
@@ -228,7 +228,7 @@ fp_ld(Context_Control_sse *p_ctxt, int i)
#define SSECLOBBER \
"xmm0","xmm1","xmm2","xmm3", \
- "xmm4","xmm5","xmm6","xmm7"
+ "xmm4","xmm5","xmm6","xmm7"
static void
sse_clobber(uint32_t x)
@@ -308,7 +308,7 @@ stor_ctxt(Context_Control_sse *p_ctxt)
rval = 1; \
if ( !quiet ) \
fprintf(stderr,#fld" mismatch ("fmt" != "fmt")\n",a->fld, b->fld); \
- }
+ }
#define FLTCMP(i) \
do { \
@@ -664,7 +664,7 @@ int errs = 0;
/* Test if FP/SSE context is saved/restored across an exception */
sse_test_ohdl = _currentExcHandler;
- _currentExcHandler = sse_test_ehdl;
+ _currentExcHandler = sse_test_ehdl;
if ( (sse_tests & SSE_TEST_FPU_EXC) ) {
if ( (st = exc_raise(FP_EXC)) ) {