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author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2001-01-03 16:36:23 +0000 |
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committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2001-01-03 16:36:23 +0000 |
commit | fe7acdcf8b56a38212a7212493b4e07a70914d0f (patch) | |
tree | 9bd123ee54ad23b7ee3ce7455d7a35514828445a /cpukit/score/cpu/hppa1.1/rtems/score/cpu.h | |
parent | 2001-01-03 Joel Sherrill <joel@OARcorp.com> (diff) | |
download | rtems-fe7acdcf8b56a38212a7212493b4e07a70914d0f.tar.bz2 |
2001-01-03 Joel Sherrill <joel@OARcorp.com>
* rtems/score/cpu.h: Added _CPU_Initialize_vectors().
* cpu_asm.S: Modify to properly dereference _ISR_Vector_table
now that it is dynamically allocated.
Diffstat (limited to 'cpukit/score/cpu/hppa1.1/rtems/score/cpu.h')
-rw-r--r-- | cpukit/score/cpu/hppa1.1/rtems/score/cpu.h | 12 |
1 files changed, 11 insertions, 1 deletions
diff --git a/cpukit/score/cpu/hppa1.1/rtems/score/cpu.h b/cpukit/score/cpu/hppa1.1/rtems/score/cpu.h index 037226fa21..469b071532 100644 --- a/cpukit/score/cpu/hppa1.1/rtems/score/cpu.h +++ b/cpukit/score/cpu/hppa1.1/rtems/score/cpu.h @@ -338,13 +338,21 @@ SCORE_EXTERN void *_CPU_Interrupt_stack_high; * ISR handler macros * * These macros perform the following functions: + * + initialize the RTEMS vector table * + disable all maskable CPU interrupts * + restore previous interrupt level (enable) * + temporarily restore interrupts (flash) * + set a particular level */ +/* + * Support routine to initialize the RTEMS vector table after it is allocated. + */ + +#define _CPU_Initialize_vectors() + /* Disable interrupts; returning previous psw bits in _isr_level */ + #define _CPU_ISR_Disable( _isr_level ) \ do { \ HPPA_ASM_RSM(HPPA_PSW_I, _isr_level); \ @@ -353,7 +361,9 @@ SCORE_EXTERN void *_CPU_Interrupt_stack_high; } while(0) /* Enable interrupts to previous level from _CPU_ISR_Disable - * does not change 'level' */ + * does not change 'level' + */ + #define _CPU_ISR_Enable( _isr_level ) \ { \ register int _ignore; \ |