diff options
author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2011-03-28 09:00:01 +0000 |
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committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2011-03-28 09:00:01 +0000 |
commit | f4371073f279beafdee65329ae910e4b87469cf3 (patch) | |
tree | 5bc9f1bc8e3e4016f7413ec51069ad27d4e6b055 /c/src | |
parent | 2011-03-29 Sebastian Huber <sebastian.huber@embedded-brains.de> (diff) | |
download | rtems-f4371073f279beafdee65329ae910e4b87469cf3.tar.bz2 |
2011-03-29 Sebastian Huber <sebastian.huber@embedded-brains.de>
* configure.ac, include/bspopts.h.in: New BSP option
LPC32XX_SCRATCH_AREA_SIZE. Disable BSP option
LPC32XX_DISABLE_READ_ONLY_PROTECTION for all BSPs.
* include/boot.h: Removed application specific defines.
* include/nand-mlc.h, misc/nand-mlc.c: Changed configuration layout.
* include/mmu.h, misc/mmu.c: Documentation. Bugfix.
* include/bsp.h, startup/bspstarthooks.c, misc/restart.c,
startup/linkcmds.lpc32xx_mzx, startup/linkcmds.lpc32xx_mzx_stage_1,
startup/linkcmds.lpc32xx_mzx_stage_2,
startup/linkcmds.lpc32xx_phycore: Support for scratch area. Moved
code into macros for reusability.
Diffstat (limited to 'c/src')
-rw-r--r-- | c/src/lib/libbsp/arm/lpc32xx/ChangeLog | 14 | ||||
-rw-r--r-- | c/src/lib/libbsp/arm/lpc32xx/configure.ac | 4 | ||||
-rw-r--r-- | c/src/lib/libbsp/arm/lpc32xx/include/boot.h | 5 | ||||
-rw-r--r-- | c/src/lib/libbsp/arm/lpc32xx/include/bsp.h | 65 | ||||
-rw-r--r-- | c/src/lib/libbsp/arm/lpc32xx/include/bspopts.h.in | 3 | ||||
-rw-r--r-- | c/src/lib/libbsp/arm/lpc32xx/include/mmu.h | 20 | ||||
-rw-r--r-- | c/src/lib/libbsp/arm/lpc32xx/include/nand-mlc.h | 34 | ||||
-rw-r--r-- | c/src/lib/libbsp/arm/lpc32xx/misc/mmu.c | 46 | ||||
-rw-r--r-- | c/src/lib/libbsp/arm/lpc32xx/misc/nand-mlc.c | 57 | ||||
-rw-r--r-- | c/src/lib/libbsp/arm/lpc32xx/misc/restart.c | 21 | ||||
-rw-r--r-- | c/src/lib/libbsp/arm/lpc32xx/startup/bspstarthooks.c | 31 | ||||
-rw-r--r-- | c/src/lib/libbsp/arm/lpc32xx/startup/linkcmds.lpc32xx_mzx | 7 | ||||
-rw-r--r-- | c/src/lib/libbsp/arm/lpc32xx/startup/linkcmds.lpc32xx_mzx_stage_1 | 3 | ||||
-rw-r--r-- | c/src/lib/libbsp/arm/lpc32xx/startup/linkcmds.lpc32xx_mzx_stage_2 | 14 | ||||
-rw-r--r-- | c/src/lib/libbsp/arm/lpc32xx/startup/linkcmds.lpc32xx_phycore | 2 |
15 files changed, 223 insertions, 103 deletions
diff --git a/c/src/lib/libbsp/arm/lpc32xx/ChangeLog b/c/src/lib/libbsp/arm/lpc32xx/ChangeLog index caf7b04d71..5964e03dcd 100644 --- a/c/src/lib/libbsp/arm/lpc32xx/ChangeLog +++ b/c/src/lib/libbsp/arm/lpc32xx/ChangeLog @@ -1,3 +1,17 @@ +2011-03-29 Sebastian Huber <sebastian.huber@embedded-brains.de> + + * configure.ac, include/bspopts.h.in: New BSP option + LPC32XX_SCRATCH_AREA_SIZE. Disable BSP option + LPC32XX_DISABLE_READ_ONLY_PROTECTION for all BSPs. + * include/boot.h: Removed application specific defines. + * include/nand-mlc.h, misc/nand-mlc.c: Changed configuration layout. + * include/mmu.h, misc/mmu.c: Documentation. Bugfix. + * include/bsp.h, startup/bspstarthooks.c, misc/restart.c, + startup/linkcmds.lpc32xx_mzx, startup/linkcmds.lpc32xx_mzx_stage_1, + startup/linkcmds.lpc32xx_mzx_stage_2, + startup/linkcmds.lpc32xx_phycore: Support for scratch area. Moved + code into macros for reusability. + 2011-02-21 Sebastian Huber <sebastian.huber@embedded-brains.de> * include/bsp.h, lpc32xx/misc/restart.c: Renamed lpc32xx_restart() in diff --git a/c/src/lib/libbsp/arm/lpc32xx/configure.ac b/c/src/lib/libbsp/arm/lpc32xx/configure.ac index 31e8a6a360..a52c45029b 100644 --- a/c/src/lib/libbsp/arm/lpc32xx/configure.ac +++ b/c/src/lib/libbsp/arm/lpc32xx/configure.ac @@ -73,10 +73,12 @@ RTEMS_BSPOPTS_HELP([LPC32XX_DISABLE_MMU],[disable MMU]) RTEMS_BSPOPTS_SET([LPC32XX_DISABLE_READ_WRITE_DATA_CACHE],[*],[]) RTEMS_BSPOPTS_HELP([LPC32XX_DISABLE_READ_WRITE_DATA_CACHE],[disable cache for read-write data sections]) -RTEMS_BSPOPTS_SET([LPC32XX_DISABLE_READ_ONLY_PROTECTION],[lpc32xx_mzx*],[1]) RTEMS_BSPOPTS_SET([LPC32XX_DISABLE_READ_ONLY_PROTECTION],[*],[]) RTEMS_BSPOPTS_HELP([LPC32XX_DISABLE_READ_ONLY_PROTECTION],[disable MMU protection of read-only sections]) +RTEMS_BSPOPTS_SET([LPC32XX_SCRATCH_AREA_SIZE],[lpc32xx_mzx*],[4096]) +RTEMS_BSPOPTS_HELP([LPC32XX_SCRATCH_AREA_SIZE],[size of scratch area]) + RTEMS_BSPOPTS_SET([LPC32XX_STOP_GPDMA],[*],[1]) RTEMS_BSPOPTS_HELP([LPC32XX_STOP_GPDMA],[stop general purpose DMA at start-up to avoid DMA interference]) diff --git a/c/src/lib/libbsp/arm/lpc32xx/include/boot.h b/c/src/lib/libbsp/arm/lpc32xx/include/boot.h index cb8ab5c392..3d11da47d1 100644 --- a/c/src/lib/libbsp/arm/lpc32xx/include/boot.h +++ b/c/src/lib/libbsp/arm/lpc32xx/include/boot.h @@ -55,9 +55,8 @@ extern "C" { * @{ */ -#define LPC32XX_BOOT_STAGE_1_BLOCK_0 0 -#define LPC32XX_BOOT_STAGE_1_BLOCK_1 1 -#define LPC32XX_BOOT_STAGE_2_BLOCK_0 2 +#define LPC32XX_BOOT_BLOCK_0 0 +#define LPC32XX_BOOT_BLOCK_1 1 #define LPC32XX_BOOT_ICR_SP_3AC_8IF 0xf0 #define LPC32XX_BOOT_ICR_SP_4AC_8IF 0xd2 diff --git a/c/src/lib/libbsp/arm/lpc32xx/include/bsp.h b/c/src/lib/libbsp/arm/lpc32xx/include/bsp.h index 29dd08e5eb..886c0385fb 100644 --- a/c/src/lib/libbsp/arm/lpc32xx/include/bsp.h +++ b/c/src/lib/libbsp/arm/lpc32xx/include/bsp.h @@ -135,6 +135,71 @@ extern uint32_t lpc32xx_magic_zero_end []; */ extern uint32_t lpc32xx_magic_zero_size []; +#ifdef LPC32XX_SCRATCH_AREA_SIZE + /** + * @rief Scratch area. + * + * The usage is application specific. + */ + extern uint8_t lpc32xx_scratch_area [LPC32XX_SCRATCH_AREA_SIZE]; +#endif + +#define LPC32XX_DO_STOP_GPDMA \ + do { \ + if ((LPC32XX_DMACLK_CTRL & 0x1) != 0) { \ + if ((lpc32xx.dma.cfg & LPC_DMA_CFG_EN) != 0) { \ + int i = 0; \ + for (i = 0; i < 8; ++i) { \ + lpc32xx.dma.channels [i].cfg = 0; \ + } \ + lpc32xx.dma.cfg &= ~LPC_DMA_CFG_EN; \ + } \ + LPC32XX_DMACLK_CTRL = 0; \ + } \ + } while (0) + +#define LPC32XX_DO_STOP_ETHERNET \ + do { \ + if ((LPC32XX_MAC_CLK_CTRL & 0x7) == 0x7) { \ + lpc32xx.eth.command = 0x38; \ + lpc32xx.eth.mac1 = 0xcf00; \ + lpc32xx.eth.mac1 = 0; \ + LPC32XX_MAC_CLK_CTRL = 0; \ + } \ + } while (0) + +#define LPC32XX_DO_STOP_USB \ + do { \ + if ((LPC32XX_USB_CTRL & 0x010e8000) != 0) { \ + LPC32XX_OTG_CLK_CTRL = 0; \ + LPC32XX_USB_CTRL = 0x80000; \ + } \ + } while (0) + +#define LPC32XX_DO_RESTART(addr) \ + do { \ + ARM_SWITCH_REGISTERS; \ + rtems_interrupt_level level; \ + uint32_t ctrl = 0; \ + \ + rtems_interrupt_disable(level); \ + \ + arm_cp15_data_cache_test_and_clean(); \ + arm_cp15_instruction_cache_invalidate(); \ + \ + ctrl = arm_cp15_get_control(); \ + ctrl &= ~(ARM_CP15_CTRL_I | ARM_CP15_CTRL_C | ARM_CP15_CTRL_M); \ + arm_cp15_set_control(ctrl); \ + \ + __asm__ volatile ( \ + ARM_SWITCH_TO_ARM \ + "mov pc, %[addr]\n" \ + ARM_SWITCH_BACK \ + : ARM_SWITCH_OUTPUT \ + : [addr] "r" (addr) \ + ); \ + } while (0) + /** @} */ /** diff --git a/c/src/lib/libbsp/arm/lpc32xx/include/bspopts.h.in b/c/src/lib/libbsp/arm/lpc32xx/include/bspopts.h.in index c408b8b28f..849aaa27f1 100644 --- a/c/src/lib/libbsp/arm/lpc32xx/include/bspopts.h.in +++ b/c/src/lib/libbsp/arm/lpc32xx/include/bspopts.h.in @@ -63,6 +63,9 @@ /* peripheral clock in Hz */ #undef LPC32XX_PERIPH_CLK +/* size of scratch area */ +#undef LPC32XX_SCRATCH_AREA_SIZE + /* stop Ethernet controller at start-up to avoid DMA interference */ #undef LPC32XX_STOP_ETHERNET diff --git a/c/src/lib/libbsp/arm/lpc32xx/include/mmu.h b/c/src/lib/libbsp/arm/lpc32xx/include/mmu.h index 679be89666..eeebe59d20 100644 --- a/c/src/lib/libbsp/arm/lpc32xx/include/mmu.h +++ b/c/src/lib/libbsp/arm/lpc32xx/include/mmu.h @@ -7,12 +7,13 @@ */ /* - * Copyright (c) 2009 - * embedded brains GmbH - * Obere Lagerstr. 30 - * D-82178 Puchheim - * Germany - * <rtems@embedded-brains.de> + * Copyright (c) 2009-2011 embedded brains GmbH. All rights reserved. + * + * embedded brains GmbH + * Obere Lagerstr. 30 + * 82178 Puchheim + * Germany + * <rtems@embedded-brains.de> * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at @@ -55,7 +56,12 @@ extern "C" { #define LPC32XX_MMU_READ_WRITE_CACHED \ (LPC32XX_MMU_READ_WRITE | ARM_MMU_SECT_C | ARM_MMU_SECT_B) -void lpc32xx_set_translation_table_entries( +/** + * @brief Sets the @a section_flags for the address range [@a begin, @a end). + * + * @return Previous section flags of the first modified entry. + */ +uint32_t lpc32xx_set_translation_table_entries( const void *begin, const void *end, uint32_t section_flags diff --git a/c/src/lib/libbsp/arm/lpc32xx/include/nand-mlc.h b/c/src/lib/libbsp/arm/lpc32xx/include/nand-mlc.h index b783e08736..4e70345716 100644 --- a/c/src/lib/libbsp/arm/lpc32xx/include/nand-mlc.h +++ b/c/src/lib/libbsp/arm/lpc32xx/include/nand-mlc.h @@ -181,22 +181,7 @@ extern "C" { * @brief MLC NAND controller configuration. */ typedef struct { - /** - * @brief Selects small pages (512 Bytes user data and 16 Bytes spare data) - * or large pages (2048 Bytes user data and 64 Bytes spare data). - */ - bool small_pages; - - /** - * @brief Selects 3/4 address cycles for small pages/large pages or 4/5 - * address cycles. - */ - bool many_address_cycles; - - /** - * @brief Selects 64 or 128 pages per block in case of large pages. - */ - bool normal_blocks; + uint32_t flags; uint32_t block_count; @@ -207,6 +192,23 @@ typedef struct { } lpc32xx_mlc_config; /** + * @brief Selects small pages (512 Bytes user data and 16 Bytes spare data) + * or large pages (2048 Bytes user data and 64 Bytes spare data). + */ +#define MLC_SMALL_PAGES 0x1U + +/** + * @Brief Selects 3/4 address cycles for small pages/large pages or 4/5 + * address cycles. + */ +#define MLC_MANY_ADDRESS_CYCLES 0x2U + +/** + * @brief Selects 64 or 128 pages per block in case of large pages. + */ +#define MLC_NORMAL_BLOCKS 0x4U + +/** * @brief Initializes the MLC NAND controller according to @a cfg. */ void lpc32xx_mlc_init(const lpc32xx_mlc_config *cfg); diff --git a/c/src/lib/libbsp/arm/lpc32xx/misc/mmu.c b/c/src/lib/libbsp/arm/lpc32xx/misc/mmu.c index e4d1ddd060..a6a06aa8bb 100644 --- a/c/src/lib/libbsp/arm/lpc32xx/misc/mmu.c +++ b/c/src/lib/libbsp/arm/lpc32xx/misc/mmu.c @@ -7,7 +7,7 @@ */ /* - * Copyright (c) 2010 embedded brains GmbH. All rights reserved. + * Copyright (c) 2010-2011 embedded brains GmbH. All rights reserved. * * embedded brains GmbH * Obere Lagerstr. 30 @@ -22,7 +22,26 @@ #include <bsp/mmu.h> -void lpc32xx_set_translation_table_entries( +static uint32_t disable_mmu(void) +{ + uint32_t ctrl = 0; + + arm_cp15_data_cache_test_and_clean_and_invalidate(); + + ctrl = arm_cp15_get_control(); + arm_cp15_set_control(ctrl & ~ARM_CP15_CTRL_M); + + arm_cp15_tlb_invalidate(); + + return ctrl; +} + +static void restore_mmu_control(uint32_t ctrl) +{ + arm_cp15_set_control(ctrl); +} + +uint32_t set_translation_table_entries( const void *begin, const void *end, uint32_t section_flags @@ -31,9 +50,32 @@ void lpc32xx_set_translation_table_entries( uint32_t *ttb = arm_cp15_get_translation_table_base(); uint32_t i = ARM_MMU_SECT_GET_INDEX(begin); uint32_t iend = ARM_MMU_SECT_GET_INDEX(ARM_MMU_SECT_MVA_ALIGN_UP(end)); + uint32_t ctrl = disable_mmu(); + uint32_t section_flags_of_first_entry = ttb [i]; while (i < iend) { ttb [i] = (i << ARM_MMU_SECT_BASE_SHIFT) | section_flags; ++i; } + + restore_mmu_control(ctrl); + + return section_flags_of_first_entry; +} + +uint32_t lpc32xx_set_translation_table_entries( + const void *begin, + const void *end, + uint32_t section_flags +) +{ + rtems_interrupt_level level; + uint32_t section_flags_of_first_entry = 0; + + rtems_interrupt_disable(level); + section_flags_of_first_entry = + set_translation_table_entries(begin, end, section_flags); + rtems_interrupt_enable(level); + + return section_flags_of_first_entry; } diff --git a/c/src/lib/libbsp/arm/lpc32xx/misc/nand-mlc.c b/c/src/lib/libbsp/arm/lpc32xx/misc/nand-mlc.c index 16be2c98c2..643987a52a 100644 --- a/c/src/lib/libbsp/arm/lpc32xx/misc/nand-mlc.c +++ b/c/src/lib/libbsp/arm/lpc32xx/misc/nand-mlc.c @@ -24,19 +24,30 @@ static volatile lpc32xx_nand_mlc *const mlc = &lpc32xx.nand_mlc; -static bool mlc_small_pages; - -static bool mlc_many_address_cycles; - -static bool mlc_normal_blocks; +static uint32_t mlc_flags; static uint32_t mlc_block_count; static uint32_t mlc_page_count; +static bool mlc_small_pages(void) +{ + return (mlc_flags & MLC_SMALL_PAGES) != 0; +} + +static bool mlc_many_address_cycles(void) +{ + return (mlc_flags & MLC_MANY_ADDRESS_CYCLES) != 0; +} + +static bool mlc_normal_blocks(void) +{ + return (mlc_flags & MLC_NORMAL_BLOCKS) != 0; +} + uint32_t lpc32xx_mlc_page_size(void) { - if (mlc_small_pages) { + if (mlc_small_pages()) { return 512; } else { return 2048; @@ -45,10 +56,10 @@ uint32_t lpc32xx_mlc_page_size(void) uint32_t lpc32xx_mlc_pages_per_block(void) { - if (mlc_small_pages) { + if (mlc_small_pages()) { return 32; } else { - if (mlc_normal_blocks) { + if (mlc_normal_blocks()) { return 64; } else { return 128; @@ -99,23 +110,23 @@ static bool mlc_was_operation_successful(void) static void mlc_set_block_address(uint32_t block_index) { - if (mlc_small_pages) { + if (mlc_small_pages()) { mlc->addr = (uint8_t) (block_index << 5); mlc->addr = (uint8_t) (block_index >> 3); - if (mlc_many_address_cycles) { + if (mlc_many_address_cycles()) { mlc->addr = (uint8_t) (block_index >> 11); } } else { - if (mlc_normal_blocks) { + if (mlc_normal_blocks()) { mlc->addr = (uint8_t) (block_index << 6); mlc->addr = (uint8_t) (block_index >> 2); - if (mlc_many_address_cycles) { + if (mlc_many_address_cycles()) { mlc->addr = (uint8_t) (block_index >> 10); } } else { mlc->addr = (uint8_t) (block_index << 7); mlc->addr = (uint8_t) (block_index >> 1); - if (mlc_many_address_cycles) { + if (mlc_many_address_cycles()) { mlc->addr = (uint8_t) (block_index >> 9); } } @@ -125,17 +136,17 @@ static void mlc_set_block_address(uint32_t block_index) static void mlc_set_page_address(uint32_t page_index) { mlc->addr = 0; - if (mlc_small_pages) { + if (mlc_small_pages()) { mlc->addr = (uint8_t) page_index; mlc->addr = (uint8_t) (page_index >> 8); - if (mlc_many_address_cycles) { + if (mlc_many_address_cycles()) { mlc->addr = (uint8_t) (page_index >> 16); } } else { mlc->addr = 0; mlc->addr = (uint8_t) page_index; mlc->addr = (uint8_t) (page_index >> 8); - if (mlc_many_address_cycles) { + if (mlc_many_address_cycles()) { mlc->addr = (uint8_t) (page_index >> 16); } } @@ -145,9 +156,7 @@ void lpc32xx_mlc_init(const lpc32xx_mlc_config *cfg) { uint32_t icr = 0; - mlc_small_pages = cfg->small_pages; - mlc_many_address_cycles = cfg->many_address_cycles; - mlc_normal_blocks = cfg->normal_blocks; + mlc_flags = cfg->flags; mlc_block_count = cfg->block_count; mlc_page_count = cfg->block_count * lpc32xx_mlc_pages_per_block(); @@ -159,10 +168,10 @@ void lpc32xx_mlc_init(const lpc32xx_mlc_config *cfg) mlc->time = cfg->time; /* Configuration */ - if (!mlc_small_pages) { + if (!mlc_small_pages()) { icr |= MLC_ICR_LARGE_PAGES; } - if (mlc_many_address_cycles) { + if (mlc_many_address_cycles()) { icr |= MLC_ICR_ADDR_WORD_COUNT_4_5; } mlc_unlock(); @@ -191,7 +200,7 @@ rtems_status_code lpc32xx_mlc_read_page( ) { rtems_status_code sc = RTEMS_SUCCESSFUL; - size_t small_pages_count = mlc_small_pages ? 1 : MLC_SMALL_PAGES_PER_LARGE_PAGE; + size_t small_pages_count = mlc_small_pages() ? 1 : MLC_SMALL_PAGES_PER_LARGE_PAGE; size_t sp = 0; size_t i = 0; uint32_t isr = 0; @@ -202,7 +211,7 @@ rtems_status_code lpc32xx_mlc_read_page( mlc_wait_until_ready(); mlc->cmd = 0x00; - if (!mlc_small_pages) { + if (!mlc_small_pages()) { mlc->cmd = 0x30; } mlc_set_page_address(page_index); @@ -284,7 +293,7 @@ rtems_status_code lpc32xx_mlc_write_page_with_ecc( ) { rtems_status_code sc = RTEMS_IO_ERROR; - size_t small_pages_count = mlc_small_pages ? 1 : MLC_SMALL_PAGES_PER_LARGE_PAGE; + size_t small_pages_count = mlc_small_pages() ? 1 : MLC_SMALL_PAGES_PER_LARGE_PAGE; size_t sp = 0; size_t i = 0; diff --git a/c/src/lib/libbsp/arm/lpc32xx/misc/restart.c b/c/src/lib/libbsp/arm/lpc32xx/misc/restart.c index 68bf2c3ba2..2abacf0e38 100644 --- a/c/src/lib/libbsp/arm/lpc32xx/misc/restart.c +++ b/c/src/lib/libbsp/arm/lpc32xx/misc/restart.c @@ -30,24 +30,5 @@ void bsp_restart(void *addr) { - ARM_SWITCH_REGISTERS; - rtems_interrupt_level level; - uint32_t ctrl = 0; - - rtems_interrupt_disable(level); - - arm_cp15_data_cache_test_and_clean(); - arm_cp15_instruction_cache_invalidate(); - - ctrl = arm_cp15_get_control(); - ctrl &= ~(ARM_CP15_CTRL_I | ARM_CP15_CTRL_C | ARM_CP15_CTRL_M); - arm_cp15_set_control(ctrl); - - __asm__ volatile ( - ARM_SWITCH_TO_ARM - "mov pc, %[addr]\n" - ARM_SWITCH_BACK - : ARM_SWITCH_OUTPUT - : [addr] "r" (addr) - ); + LPC32XX_DO_RESTART(addr); } diff --git a/c/src/lib/libbsp/arm/lpc32xx/startup/bspstarthooks.c b/c/src/lib/libbsp/arm/lpc32xx/startup/bspstarthooks.c index d8559866ef..05fcdba6b6 100644 --- a/c/src/lib/libbsp/arm/lpc32xx/startup/bspstarthooks.c +++ b/c/src/lib/libbsp/arm/lpc32xx/startup/bspstarthooks.c @@ -73,6 +73,12 @@ static void BSP_START_TEXT_SECTION clear_bss(void) .begin = (uint32_t) bsp_section_fast_data_begin, .end = (uint32_t) bsp_section_fast_data_end, .flags = LPC32XX_MMU_READ_WRITE_DATA +#ifdef LPC32XX_SCRATCH_AREA_SIZE + }, { + .begin = (uint32_t) &lpc32xx_scratch_area [0], + .end = (uint32_t) &lpc32xx_scratch_area [LPC32XX_SCRATCH_AREA_SIZE], + .flags = LPC32XX_MMU_READ_ONLY_DATA +#endif }, { .begin = (uint32_t) bsp_section_start_begin, .end = (uint32_t) bsp_section_start_end, @@ -224,34 +230,15 @@ void BSP_START_TEXT_SECTION bsp_start_hook_0(void) static void BSP_START_TEXT_SECTION stop_dma_activities(void) { #ifdef LPC32XX_STOP_GPDMA - if ((LPC32XX_DMACLK_CTRL & 0x1) != 0) { - if ((lpc32xx.dma.cfg & LPC_DMA_CFG_EN) != 0) { - int i = 0; - - for (i = 0; i < 8; ++i) { - lpc32xx.dma.channels [i].cfg = 0; - } - - lpc32xx.dma.cfg &= ~LPC_DMA_CFG_EN; - } - LPC32XX_DMACLK_CTRL = 0; - } + LPC32XX_DO_STOP_GPDMA; #endif #ifdef LPC32XX_STOP_ETHERNET - if ((LPC32XX_MAC_CLK_CTRL & 0x7) == 0x7) { - lpc32xx.eth.command = 0x38; - lpc32xx.eth.mac1 = 0xcf00; - lpc32xx.eth.mac1 = 0; - LPC32XX_MAC_CLK_CTRL = 0; - } + LPC32XX_DO_STOP_ETHERNET; #endif #ifdef LPC32XX_STOP_USB - if ((LPC32XX_USB_CTRL & 0x010e8000) != 0) { - LPC32XX_OTG_CLK_CTRL = 0; - LPC32XX_USB_CTRL = 0x80000; - } + LPC32XX_DO_STOP_USB; #endif } diff --git a/c/src/lib/libbsp/arm/lpc32xx/startup/linkcmds.lpc32xx_mzx b/c/src/lib/libbsp/arm/lpc32xx/startup/linkcmds.lpc32xx_mzx index cd86bf3b21..810d187b5b 100644 --- a/c/src/lib/libbsp/arm/lpc32xx/startup/linkcmds.lpc32xx_mzx +++ b/c/src/lib/libbsp/arm/lpc32xx/startup/linkcmds.lpc32xx_mzx @@ -37,7 +37,8 @@ MEMORY { RAM_INT : ORIGIN = 0x08000000, LENGTH = 256k RAM_MMU : ORIGIN = 0x80000000, LENGTH = 16k /* SDRAM on DYCS0 */ - RAM_EXT : ORIGIN = 0x80004000, LENGTH = 32M - 16k /* SDRAM on DYCS0 */ + RAM_SCRATCH : ORIGIN = 0x80004000, LENGTH = 4k /* SDRAM on DYCS0 */ + RAM_EXT : ORIGIN = 0x80005000, LENGTH = 32M - 20k /* SDRAM on DYCS0 */ NIRVANA : ORIGIN = 0, LENGTH = 0 } @@ -57,9 +58,11 @@ REGION_ALIAS ("REGION_BSS", RAM_EXT); REGION_ALIAS ("REGION_WORK", RAM_EXT); REGION_ALIAS ("REGION_STACK", RAM_INT); +lpc32xx_scratch_area = ORIGIN (RAM_SCRATCH); + bsp_stack_irq_size = DEFINED (bsp_stack_irq_size) ? bsp_stack_irq_size : 4096; bsp_stack_abt_size = DEFINED (bsp_stack_abt_size) ? bsp_stack_abt_size : 1024; -bsp_section_robarrier_align = DEFINED (bsp_section_robarrier_align) ? bsp_section_robarrier_align : 1M; +bsp_section_rwbarrier_align = DEFINED (bsp_section_rwbarrier_align) ? bsp_section_rwbarrier_align : 1M; INCLUDE linkcmds.lpc32xx diff --git a/c/src/lib/libbsp/arm/lpc32xx/startup/linkcmds.lpc32xx_mzx_stage_1 b/c/src/lib/libbsp/arm/lpc32xx/startup/linkcmds.lpc32xx_mzx_stage_1 index 9b4d41d224..67d18e0340 100644 --- a/c/src/lib/libbsp/arm/lpc32xx/startup/linkcmds.lpc32xx_mzx_stage_1 +++ b/c/src/lib/libbsp/arm/lpc32xx/startup/linkcmds.lpc32xx_mzx_stage_1 @@ -38,6 +38,7 @@ MEMORY { RAM_INT : ORIGIN = 0x08000000, LENGTH = 232k RAM_VEC : ORIGIN = 0x0803a000, LENGTH = 8k RAM_MMU : ORIGIN = 0x0803c000, LENGTH = 16k + RAM_SCRATCH : ORIGIN = 0x80004000, LENGTH = 4k /* SDRAM on DYCS0 */ NIRVANA : ORIGIN = 0, LENGTH = 0 } @@ -57,6 +58,8 @@ REGION_ALIAS ("REGION_BSS", RAM_INT); REGION_ALIAS ("REGION_WORK", RAM_INT); REGION_ALIAS ("REGION_STACK", RAM_INT); +lpc32xx_scratch_area = ORIGIN (RAM_SCRATCH); + bsp_stack_svc_size = DEFINED (bsp_stack_svc_size) ? bsp_stack_svc_size : 7296; bsp_vector_table_in_start_section = 1; diff --git a/c/src/lib/libbsp/arm/lpc32xx/startup/linkcmds.lpc32xx_mzx_stage_2 b/c/src/lib/libbsp/arm/lpc32xx/startup/linkcmds.lpc32xx_mzx_stage_2 index e2b3fc1a3f..9fc98859e5 100644 --- a/c/src/lib/libbsp/arm/lpc32xx/startup/linkcmds.lpc32xx_mzx_stage_2 +++ b/c/src/lib/libbsp/arm/lpc32xx/startup/linkcmds.lpc32xx_mzx_stage_2 @@ -35,9 +35,11 @@ */ MEMORY { - RAM_INT : ORIGIN = 0x08000000, LENGTH = 256k - RAM_MMU : ORIGIN = 0x81c00000, LENGTH = 16k /* SDRAM on DYCS0 */ - RAM_EXT : ORIGIN = 0x81c04000, LENGTH = 4M - 16k /* SDRAM on DYCS0 */ + RAM_INT : ORIGIN = 0x08000000, LENGTH = 240k + RAM_FAST : ORIGIN = 0x0803c000, LENGTH = 16k + RAM_MMU : ORIGIN = 0x80000000, LENGTH = 16k /* SDRAM on DYCS0 */ + RAM_SCRATCH : ORIGIN = 0x80004000, LENGTH = 4k /* SDRAM on DYCS0 */ + RAM_EXT : ORIGIN = 0x81c00000, LENGTH = 4M /* SDRAM on DYCS0 */ NIRVANA : ORIGIN = 0, LENGTH = 0 } @@ -49,14 +51,16 @@ REGION_ALIAS ("REGION_RODATA", RAM_EXT); REGION_ALIAS ("REGION_RODATA_LOAD", RAM_EXT); REGION_ALIAS ("REGION_DATA", RAM_EXT); REGION_ALIAS ("REGION_DATA_LOAD", RAM_EXT); -REGION_ALIAS ("REGION_FAST_TEXT", RAM_EXT); +REGION_ALIAS ("REGION_FAST_TEXT", RAM_FAST); REGION_ALIAS ("REGION_FAST_TEXT_LOAD", RAM_EXT); -REGION_ALIAS ("REGION_FAST_DATA", RAM_EXT); +REGION_ALIAS ("REGION_FAST_DATA", RAM_FAST); REGION_ALIAS ("REGION_FAST_DATA_LOAD", RAM_EXT); REGION_ALIAS ("REGION_BSS", RAM_EXT); REGION_ALIAS ("REGION_WORK", RAM_EXT); REGION_ALIAS ("REGION_STACK", RAM_INT); +lpc32xx_scratch_area = ORIGIN (RAM_SCRATCH); + bsp_stack_svc_size = DEFINED (bsp_stack_svc_size) ? bsp_stack_svc_size : 8192; INCLUDE linkcmds.lpc32xx diff --git a/c/src/lib/libbsp/arm/lpc32xx/startup/linkcmds.lpc32xx_phycore b/c/src/lib/libbsp/arm/lpc32xx/startup/linkcmds.lpc32xx_phycore index 1e8b4339f4..4f448268e0 100644 --- a/c/src/lib/libbsp/arm/lpc32xx/startup/linkcmds.lpc32xx_phycore +++ b/c/src/lib/libbsp/arm/lpc32xx/startup/linkcmds.lpc32xx_phycore @@ -62,6 +62,6 @@ REGION_ALIAS ("REGION_STACK", RAM_INT); bsp_stack_irq_size = DEFINED (bsp_stack_irq_size) ? bsp_stack_irq_size : 4096; bsp_stack_abt_size = DEFINED (bsp_stack_abt_size) ? bsp_stack_abt_size : 1024; -bsp_section_robarrier_align = DEFINED (bsp_section_robarrier_align) ? bsp_section_robarrier_align : 1M; +bsp_section_rwbarrier_align = DEFINED (bsp_section_rwbarrier_align) ? bsp_section_rwbarrier_align : 1M; INCLUDE linkcmds.lpc32xx |