diff options
| author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2001-05-24 19:54:22 +0000 |
|---|---|---|
| committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2001-05-24 19:54:22 +0000 |
| commit | 7c05d2806c7283a1849d8336b08c869bd6ad8b20 (patch) | |
| tree | 8e8267495604d4a9d346229cffce4fd0188f7054 /c/src/lib/libcpu/mips/shared/interrupts/maxvectors.c | |
| parent | 2000-05-24 Joel Sherrill <joel@OARcorp.com> (diff) | |
| download | rtems-7c05d2806c7283a1849d8336b08c869bd6ad8b20.tar.bz2 | |
2000-05-24 Joel Sherrill <joel@OARcorp.com>
* mongoosev/include/mongoose-v.h, mongoosev/vectorisrs/vectorisrs.c,
r46xx/vectorisrs/vectorisrs.c, tx39/vectorisrs/vectorisrs.c,
tx39/include/tx3904.h: All exceptions were given low numbers and thus
can be now be installed and processed in a uniform manner just like interrupts.
Variances between various MIPS ISA levels are not accounted for at this time.
* mongoosev/vectorisrs/Makefile.am, mongoosev/vectorisrs/maxvectors.c,
r46xx/vectorisrs/Makefile.am, r46xx/vectorisrs/maxvectors.c,
tx39/vectorisrs/Makefile.am, tx39/vectorisrs/maxvectors.c,
shared/interrupts/maxvectors.c, shared/interrupts/Makefile.am: Split the
shared maxvectors.c into a variety of CPU model specific versions to simplify
the build process and reduce depdencies. Deleted shared/interrupts/maxvectors.c
and created various CPU model versions.
Diffstat (limited to 'c/src/lib/libcpu/mips/shared/interrupts/maxvectors.c')
| -rw-r--r-- | c/src/lib/libcpu/mips/shared/interrupts/maxvectors.c | 47 |
1 files changed, 0 insertions, 47 deletions
diff --git a/c/src/lib/libcpu/mips/shared/interrupts/maxvectors.c b/c/src/lib/libcpu/mips/shared/interrupts/maxvectors.c deleted file mode 100644 index f2fb9d2e17..0000000000 --- a/c/src/lib/libcpu/mips/shared/interrupts/maxvectors.c +++ /dev/null @@ -1,47 +0,0 @@ -/* - * This file contains the maximum number of vectors. This can not - * be determined without knowing the RTEMS CPU model. - * - * COPYRIGHT (c) 1989-2000. - * On-Line Applications Research Corporation (OAR). - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.OARcorp.com/rtems/license.html. - * - * $Id$ - */ - - -/* - * The Toshiba TX3904 attaches 4 of the eight interrupt bits to an - * on-CPU interrupt controller so that these four bits map to 16 - * unique interrupts. So you have: 2 software interrupts, an NMI, - * and 16 others. - */ - -#if defined(TX39) -#define MAX_VECTORS 19 -#endif - -/* - * The Synova Mongoose-V attached one of the eight interrupt bits - * to a Peripheral Function Interrupt Cause Register on-CPU. - * This results in: 2 software interrupts, 5 interrupts - * through the IP bits, and 32 more from the PFICR. Some of - * these are reserved but for simplicity in processing, we - * reserve slots for those bits anyway. - * - * gdm, 5/14, added 15 more slots so exceptions can be vectored as well. - */ - -#if defined(MONGOOSEV) -#define MAX_VECTORS (38+10) -#endif - -#ifndef MAX_VECTORS -#define MAX_VECTORS 8 -#endif - -unsigned int mips_interrupt_number_of_vectors = MAX_VECTORS; - |