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| author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2001-05-24 19:54:22 +0000 |
|---|---|---|
| committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2001-05-24 19:54:22 +0000 |
| commit | 7c05d2806c7283a1849d8336b08c869bd6ad8b20 (patch) | |
| tree | 8e8267495604d4a9d346229cffce4fd0188f7054 /c/src/lib/libcpu/mips/r46xx/vectorisrs/vectorisrs.c | |
| parent | 2000-05-24 Joel Sherrill <joel@OARcorp.com> (diff) | |
| download | rtems-7c05d2806c7283a1849d8336b08c869bd6ad8b20.tar.bz2 | |
2000-05-24 Joel Sherrill <joel@OARcorp.com>
* mongoosev/include/mongoose-v.h, mongoosev/vectorisrs/vectorisrs.c,
r46xx/vectorisrs/vectorisrs.c, tx39/vectorisrs/vectorisrs.c,
tx39/include/tx3904.h: All exceptions were given low numbers and thus
can be now be installed and processed in a uniform manner just like interrupts.
Variances between various MIPS ISA levels are not accounted for at this time.
* mongoosev/vectorisrs/Makefile.am, mongoosev/vectorisrs/maxvectors.c,
r46xx/vectorisrs/Makefile.am, r46xx/vectorisrs/maxvectors.c,
tx39/vectorisrs/Makefile.am, tx39/vectorisrs/maxvectors.c,
shared/interrupts/maxvectors.c, shared/interrupts/Makefile.am: Split the
shared maxvectors.c into a variety of CPU model specific versions to simplify
the build process and reduce depdencies. Deleted shared/interrupts/maxvectors.c
and created various CPU model versions.
Diffstat (limited to 'c/src/lib/libcpu/mips/r46xx/vectorisrs/vectorisrs.c')
| -rw-r--r-- | c/src/lib/libcpu/mips/r46xx/vectorisrs/vectorisrs.c | 36 |
1 files changed, 22 insertions, 14 deletions
diff --git a/c/src/lib/libcpu/mips/r46xx/vectorisrs/vectorisrs.c b/c/src/lib/libcpu/mips/r46xx/vectorisrs/vectorisrs.c index 31059e7d57..79e52409a7 100644 --- a/c/src/lib/libcpu/mips/r46xx/vectorisrs/vectorisrs.c +++ b/c/src/lib/libcpu/mips/r46xx/vectorisrs/vectorisrs.c @@ -5,26 +5,20 @@ #include <rtems.h> #include <stdlib.h> -#define mips_get_cause( _cause ) \ - do { \ - asm volatile( "mfc0 %0, $13; nop" : "=r" (_cause) : ); \ - } while (0) -#define CALL_ISR(_vector) \ +void mips_default_isr( int vector ); + +#define CALL_ISR(_vector,_frame) \ do { \ if ( _ISR_Vector_table[_vector] ) \ - (_ISR_Vector_table[_vector])(_vector); \ + (_ISR_Vector_table[_vector])(_vector,_frame); \ else \ - mips_default_exception(_vector); \ + mips_default_isr(_vector); \ } while (0) -void mips_default_exception( int vector ) -{ - printk( "Unhandled exception %d\n", vector ); - rtems_fatal_error_occurred(1); -} +#include <bspIo.h> /* for printk */ -void mips_vector_isr_handlers( void ) +void mips_vector_isr_handlers( CPU_Interrupt_frame *frame ) { unsigned int sr; unsigned int cause; @@ -41,6 +35,20 @@ void mips_vector_isr_handlers( void ) for ( i=1, mask=0x80 ; i<=8 ; i++, mask >>= 1 ) { if ( cause & mask ) - CALL_ISR( 8 - i ); + CALL_ISR( MIPS_EXCEPTION_BASE + 8 - i, frame ); } } + +void mips_default_isr( int vector ) +{ + unsigned int sr; + unsigned int cause; + + mips_get_sr( sr ); + mips_get_cause( cause ); + + printk( "Unhandled isr exception: vector 0x%02x, cause 0x%08X, sr 0x%08X\n", + vector, cause, sr ); + rtems_fatal_error_occurred(1); +} + |