diff options
author | Joel Sherrill <joel.sherrill@OARcorp.com> | 1996-09-06 18:11:41 +0000 |
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committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 1996-09-06 18:11:41 +0000 |
commit | f198c63d6a1d172aef422353e42b41f8cb128275 (patch) | |
tree | f9f975562c842273fe349148c7bd58f9f38a8ee0 /c/src/lib/libcpu/mips/clock/clock.S | |
parent | added MIPS port by Craig Lebakken (lebakken@minn.net) and Derrick Ostertag (diff) | |
download | rtems-f198c63d6a1d172aef422353e42b41f8cb128275.tar.bz2 |
new file for MIPS port by Craig Lebakken (lebakken@minn.net) and
Derrick Ostertag (ostertag@transition.com).
Diffstat (limited to 'c/src/lib/libcpu/mips/clock/clock.S')
-rw-r--r-- | c/src/lib/libcpu/mips/clock/clock.S | 44 |
1 files changed, 44 insertions, 0 deletions
diff --git a/c/src/lib/libcpu/mips/clock/clock.S b/c/src/lib/libcpu/mips/clock/clock.S new file mode 100644 index 0000000000..a41edf5ea5 --- /dev/null +++ b/c/src/lib/libcpu/mips/clock/clock.S @@ -0,0 +1,44 @@ +/* clock.s + * + * This file contains the assembly code for the IDT 4650 clock driver. + * + * Author: Craig Lebakken <craigl@transition.com> + * + * COPYRIGHT (c) 1996 by Transition Networks Inc. + * + * To anyone who acknowledges that this file is provided "AS IS" + * without any express or implied warranty: + * permission to use, copy, modify, and distribute this file + * for any purpose is hereby granted without fee, provided that + * the above copyright notice and this notice appears in all + * copies, and that the name of Transition Networks not be used in + * advertising or publicity pertaining to distribution of the + * software without specific, written prior permission. + * Transition Networks makes no representations about the suitability + * of this software for any purpose. + * + */ +/* @(#)clock.S 08/20/96 1.2 */ + +#include <rtems/score/iregdef.h> +#include <rtems/score/idtcpu.h> +#include <rtems/score/idtmon.h> + +FRAME(mips_set_timer,sp,0,ra) + .set noreorder + mfc0 t0,C0_COUNT + nop + addu t0,a0,t0 + mtc0 t0,C0_COMPARE + nop + j ra + .set reorder +ENDFRAME(mips_set_timer) + +FRAME(mips_get_timer,sp,0,ra) + .set noreorder + mfc0 v0,C0_COUNT + nop + j ra + .set reorder +ENDFRAME(mips_get_timer) |