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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2018-01-27 14:37:51 +0100 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2018-01-31 12:49:09 +0100 |
| commit | 4cf93658eff5cf6b0c02e98a0d1ec33dea5ed85c (patch) | |
| tree | 8ce105a37991b79f38da9da31c1cb6ce13ef6beb /c/src/lib/libcpu/arm | |
| parent | bsps: Move network define to source files (diff) | |
| download | rtems-4cf93658eff5cf6b0c02e98a0d1ec33dea5ed85c.tar.bz2 | |
bsps: Rework cache manager implementation
The previous cache manager support used a single souce file
(cache_manager.c) which included an implementation header (cache_.h).
This required the use of specialized include paths to find the right
header file. Change this to include a generic implementation header
(cacheimpl.h) in specialized source files.
Use the following directories and files:
* bsps/shared/cache
* bsps/@RTEMS_CPU@/shared/cache
* bsps/@RTEMS_CPU@/@RTEMS_BSP_FAMILY/start/cache.c
Update #3285.
Diffstat (limited to 'c/src/lib/libcpu/arm')
| -rw-r--r-- | c/src/lib/libcpu/arm/shared/include/cache_.h | 58 |
1 files changed, 0 insertions, 58 deletions
diff --git a/c/src/lib/libcpu/arm/shared/include/cache_.h b/c/src/lib/libcpu/arm/shared/include/cache_.h deleted file mode 100644 index 9db399edf7..0000000000 --- a/c/src/lib/libcpu/arm/shared/include/cache_.h +++ /dev/null @@ -1,58 +0,0 @@ -/** - * @file - * - * @ingroup arm - * - * @brief ARM cache dummy include for chips without cache - */ - -/* - * Copyright (c) 2009-2011 embedded brains GmbH. All rights reserved. - * - * embedded brains GmbH - * Obere Lagerstr. 30 - * 82178 Puchheim - * Germany - * <rtems@embedded-brains.de> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBCPU_ARM_CACHE__H -#define LIBCPU_ARM_CACHE__H - -/* - * The ARM targets equipped by cache should include - * which kind and implementation they support. - * Next options are available - * - * c/src/lib/libbsp/arm/shared/armv467ar-basic-cache/cache_.h - * basic ARM cache integrated on the CPU core directly - * which requires only CP15 oparations - * - * c/src/lib/libbsp/arm/shared/arm-l2c-310/cache_.h - * support for case where ARM L2C-310 cache controller - * is used. It is accessible as mmaped peripheral. - * - * c/src/lib/libbsp/arm/shared/armv7m/include/cache_.h - * Cortex-M specific cache support - * - * Cache support should be included in BSP Makefile.am - * - * Example how to include cache support - * - * # Cache - * libbsp_a_SOURCES += ../../../libcpu/shared/src/cache_manager.c - * libbsp_a_SOURCES += ../shared/include/arm-cache-l1.h - * libbsp_a_SOURCES += ../shared/armv467ar-basic-cache/cache_.h - * libbsp_a_CPPFLAGS += -I$(srcdir)/../shared/armv467ar-basic-cache - */ - -#if defined(__ARM_ARCH_5TEJ__) || defined(__ARM_ARCH_7A__) -#warning ARM 5TEJ and ARMv7/Cortex-A cores include usually cache -#warning change BSP to include appropriate cache implementation -#endif - -#endif /* LIBCPU_ARM_CACHE__H */ |