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authorJoel Sherrill <joel.sherrill@oarcorp.com>2012-06-11 13:37:29 -0500
committerJoel Sherrill <joel.sherrill@oarcorp.com>2012-06-11 13:37:29 -0500
commit2d7ae960bbdbc82f795814ee6c600e93200ddf4d (patch)
treead12bf1ac7f551a70f004a897a7246cf0b9ea716 /c/src/lib/libbsp/v850/gdbv850sim/make
parentpowerpc/cpu.h: Define CPU_SIMPLE_VECTORED_INTERRUPTS and remove _CPU_ISR_Init... (diff)
downloadrtems-2d7ae960bbdbc82f795814ee6c600e93200ddf4d.tar.bz2
v850 port: Initial addition with BSP for simulator in GDB
Port + v850 does not have appear to have any optimized bit scan instructions + v850 does have single instructions for wap u16 and u32 + Code path optimization preferences set + Add BSP variants for each GCC CPU model flag and a README - v850e1 variant does not work (fails during BSP initialization) BSP for GDB v850 Simulator + linkcmds matches defaults in GDB simulator with RTEMS mods + crt1.c added from v850 newlib port for __main() + BSP exits cleanly + printk and console I/O work + uses clock tick from IDLE task + Tests not requiring real clock ISR work Documentation + CPU Supplment chapter for v850 added
Diffstat (limited to 'c/src/lib/libbsp/v850/gdbv850sim/make')
-rw-r--r--c/src/lib/libbsp/v850/gdbv850sim/make/custom/v850e1sim.cfg7
-rw-r--r--c/src/lib/libbsp/v850/gdbv850sim/make/custom/v850e2sim.cfg7
-rw-r--r--c/src/lib/libbsp/v850/gdbv850sim/make/custom/v850e2v3sim.cfg7
-rw-r--r--c/src/lib/libbsp/v850/gdbv850sim/make/custom/v850esim.cfg7
-rw-r--r--c/src/lib/libbsp/v850/gdbv850sim/make/custom/v850essim.cfg7
-rw-r--r--c/src/lib/libbsp/v850/gdbv850sim/make/custom/v850sim.cfg8
-rw-r--r--c/src/lib/libbsp/v850/gdbv850sim/make/custom/v850sim.inc12
7 files changed, 55 insertions, 0 deletions
diff --git a/c/src/lib/libbsp/v850/gdbv850sim/make/custom/v850e1sim.cfg b/c/src/lib/libbsp/v850/gdbv850sim/make/custom/v850e1sim.cfg
new file mode 100644
index 0000000000..7aefdcf31c
--- /dev/null
+++ b/c/src/lib/libbsp/v850/gdbv850sim/make/custom/v850e1sim.cfg
@@ -0,0 +1,7 @@
+#
+# Base Config file for the v850 GDB Simulator as v850e1
+#
+
+CPU_CFLAGS = -mv850e1
+
+include $(RTEMS_ROOT)/make/custom/v850sim.inc
diff --git a/c/src/lib/libbsp/v850/gdbv850sim/make/custom/v850e2sim.cfg b/c/src/lib/libbsp/v850/gdbv850sim/make/custom/v850e2sim.cfg
new file mode 100644
index 0000000000..0313ab82cd
--- /dev/null
+++ b/c/src/lib/libbsp/v850/gdbv850sim/make/custom/v850e2sim.cfg
@@ -0,0 +1,7 @@
+#
+# Base Config file for the v850 GDB Simulator as v850e2
+#
+
+CPU_CFLAGS = -mv850e2
+
+include $(RTEMS_ROOT)/make/custom/v850sim.inc
diff --git a/c/src/lib/libbsp/v850/gdbv850sim/make/custom/v850e2v3sim.cfg b/c/src/lib/libbsp/v850/gdbv850sim/make/custom/v850e2v3sim.cfg
new file mode 100644
index 0000000000..ac2740ed52
--- /dev/null
+++ b/c/src/lib/libbsp/v850/gdbv850sim/make/custom/v850e2v3sim.cfg
@@ -0,0 +1,7 @@
+#
+# Base Config file for the v850 GDB Simulator as v850e2v3
+#
+
+CPU_CFLAGS = -mv850e2v3
+
+include $(RTEMS_ROOT)/make/custom/v850sim.inc
diff --git a/c/src/lib/libbsp/v850/gdbv850sim/make/custom/v850esim.cfg b/c/src/lib/libbsp/v850/gdbv850sim/make/custom/v850esim.cfg
new file mode 100644
index 0000000000..0c0a4a9bed
--- /dev/null
+++ b/c/src/lib/libbsp/v850/gdbv850sim/make/custom/v850esim.cfg
@@ -0,0 +1,7 @@
+#
+# Base Config file for the v850 GDB Simulator as v850e
+#
+
+CPU_CFLAGS = -mv850e
+
+include $(RTEMS_ROOT)/make/custom/v850sim.inc
diff --git a/c/src/lib/libbsp/v850/gdbv850sim/make/custom/v850essim.cfg b/c/src/lib/libbsp/v850/gdbv850sim/make/custom/v850essim.cfg
new file mode 100644
index 0000000000..77594591ec
--- /dev/null
+++ b/c/src/lib/libbsp/v850/gdbv850sim/make/custom/v850essim.cfg
@@ -0,0 +1,7 @@
+#
+# Base Config file for the v850 GDB Simulator as v850es
+#
+
+CPU_CFLAGS = -mv850es
+
+include $(RTEMS_ROOT)/make/custom/v850sim.inc
diff --git a/c/src/lib/libbsp/v850/gdbv850sim/make/custom/v850sim.cfg b/c/src/lib/libbsp/v850/gdbv850sim/make/custom/v850sim.cfg
new file mode 100644
index 0000000000..9dcc918423
--- /dev/null
+++ b/c/src/lib/libbsp/v850/gdbv850sim/make/custom/v850sim.cfg
@@ -0,0 +1,8 @@
+#
+# Base Config file for the v850 GDB Simulator as v850
+#
+
+# This is the same as not specifying a CPU model flag.
+CPU_CFLAGS = -mv850
+
+include $(RTEMS_ROOT)/make/custom/v850sim.inc
diff --git a/c/src/lib/libbsp/v850/gdbv850sim/make/custom/v850sim.inc b/c/src/lib/libbsp/v850/gdbv850sim/make/custom/v850sim.inc
new file mode 100644
index 0000000000..50de3fa9f7
--- /dev/null
+++ b/c/src/lib/libbsp/v850/gdbv850sim/make/custom/v850sim.inc
@@ -0,0 +1,12 @@
+#
+# Shared config file for the v850 GDB Simulator
+#
+# CPU_CFLAGS is set by each specific variant.
+
+include $(RTEMS_ROOT)/make/custom/default.cfg
+
+RTEMS_CPU=v850
+RTEMS_CPU_MODEL=v850
+
+# optimize flag: typically -O2
+CFLAGS_OPTIMIZE_V = -O2 -g