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| author | Ralf Corsepius <ralf.corsepius@rtems.org> | 2004-04-21 10:43:04 +0000 |
|---|---|---|
| committer | Ralf Corsepius <ralf.corsepius@rtems.org> | 2004-04-21 10:43:04 +0000 |
| commit | 6128a4aa5e791ed4e0a655bfd346a52d92da7883 (patch) | |
| tree | af53ca3f67ce405b6fbc6c98399c8e0c87e01a9e /c/src/lib/libbsp/powerpc/support/new_exception_processing | |
| parent | 2004-04-20 Ralf Corsepius <ralf_corsepius@rtems.org> (diff) | |
| download | rtems-6128a4aa5e791ed4e0a655bfd346a52d92da7883.tar.bz2 | |
Remove stray white spaces.
Diffstat (limited to 'c/src/lib/libbsp/powerpc/support/new_exception_processing')
| -rw-r--r-- | c/src/lib/libbsp/powerpc/support/new_exception_processing/cpu.c | 8 | ||||
| -rw-r--r-- | c/src/lib/libbsp/powerpc/support/new_exception_processing/cpu_asm.S | 12 |
2 files changed, 10 insertions, 10 deletions
diff --git a/c/src/lib/libbsp/powerpc/support/new_exception_processing/cpu.c b/c/src/lib/libbsp/powerpc/support/new_exception_processing/cpu.c index f31add1feb..660747d5b8 100644 --- a/c/src/lib/libbsp/powerpc/support/new_exception_processing/cpu.c +++ b/c/src/lib/libbsp/powerpc/support/new_exception_processing/cpu.c @@ -83,7 +83,7 @@ void _CPU_Context_Initialize( *((uint32_t*)sp) = 0; the_context->gpr1 = sp; - + _CPU_MSR_GET( msr_value ); if (!(new_level & CPU_MODES_INTERRUPT_MASK)) { @@ -97,7 +97,7 @@ void _CPU_Context_Initialize( /* * The FP bit of the MSR should only be enabled if this is a floating - * point task. Unfortunately, the vfprintf_r routine in newlib + * point task. Unfortunately, the vfprintf_r routine in newlib * ends up pushing a floating point register regardless of whether or * not a floating point number is being printed. Serious restructuring * of vfprintf.c will be required to avoid this behavior. At this @@ -124,14 +124,14 @@ void _CPU_Context_Initialize( #if (PPC_ABI == PPC_ABI_SVR4) { unsigned r13 = 0; asm volatile ("mr %0, 13" : "=r" ((r13))); - + the_context->gpr13 = r13; } #elif (PPC_ABI == PPC_ABI_EABI) { uint32_t r2 = 0; unsigned r13 = 0; asm volatile ("mr %0,2; mr %1,13" : "=r" ((r2)), "=r" ((r13))); - + the_context->gpr2 = r2; the_context->gpr13 = r13; } diff --git a/c/src/lib/libbsp/powerpc/support/new_exception_processing/cpu_asm.S b/c/src/lib/libbsp/powerpc/support/new_exception_processing/cpu_asm.S index 847091f6c9..74845982b2 100644 --- a/c/src/lib/libbsp/powerpc/support/new_exception_processing/cpu_asm.S +++ b/c/src/lib/libbsp/powerpc/support/new_exception_processing/cpu_asm.S @@ -109,7 +109,7 @@ .set FP_30, (FP_29 + FP_SIZE) .set FP_31, (FP_30 + FP_SIZE) .set FP_FPSCR, (FP_31 + FP_SIZE) - + .set IP_LINK, 0 .set IP_0, (IP_LINK + 8) .set IP_2, (IP_0 + 4) @@ -118,12 +118,12 @@ .set IP_4, (IP_3 + 4) .set IP_5, (IP_4 + 4) .set IP_6, (IP_5 + 4) - + .set IP_7, (IP_6 + 4) .set IP_8, (IP_7 + 4) .set IP_9, (IP_8 + 4) .set IP_10, (IP_9 + 4) - + .set IP_11, (IP_10 + 4) .set IP_12, (IP_11 + 4) .set IP_13, (IP_12 + 4) @@ -133,15 +133,15 @@ .set IP_30, (IP_29 + 4) .set IP_31, (IP_30 + 4) .set IP_CR, (IP_31 + 4) - + .set IP_CTR, (IP_CR + 4) .set IP_XER, (IP_CTR + 4) .set IP_LR, (IP_XER + 4) .set IP_PC, (IP_LR + 4) - + .set IP_MSR, (IP_PC + 4) .set IP_END, (IP_MSR + 16) - + BEGIN_CODE /* * _CPU_Context_save_fp_context |