bsps: Move startup files to bsps

Adjust build support files to new directory layout.

This patch is a part of the BSP source reorganization.

Update #3285.

6 files changed, 4 insertions, 600 deletions

diff --git a/c/src/lib/libbsp/powerpc/ss555/Makefile.am b/c/src/lib/libbsp/powerpc/ss555/Makefile.am
index 94d1e18bd8..86dc3c56ac 100644
--- a/c/src/lib/libbsp/powerpc/ss555/Makefile.am
+++ b/c/src/lib/libbsp/powerpc/ss555/Makefile.am
@@ -3,7 +3,7 @@ ACLOCAL_AMFLAGS = -I ../../../../aclocal
 include $(top_srcdir)/../../../../automake/compile.am
 include $(top_srcdir)/../../bsp.am
 
-dist_project_lib_DATA = startup/bsp_specs
+dist_project_lib_DATA = ../../../../../../bsps/powerpc/ss555/start/bsp_specs
 
 
 
@@ -22,15 +22,15 @@ librtemsbsp_a_SOURCES +=../../../../../../bsps/powerpc/ss555/clock/p_clock.c
 librtemsbsp_a_SOURCES += ../../../../../../bsps/powerpc/ss555/console/console.c
 # startup
 librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/start/bspfatal-default.c
-librtemsbsp_a_SOURCES += startup/bspstart.c
-librtemsbsp_a_SOURCES += startup/iss555.c
+librtemsbsp_a_SOURCES += ../../../../../../bsps/powerpc/ss555/start/bspstart.c
+librtemsbsp_a_SOURCES += ../../../../../../bsps/powerpc/ss555/start/iss555.c
 librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/dev/getentropy/getentropy-cpucounter.c
 librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/start/sbrk.c
 librtemsbsp_a_SOURCES += ../../../../../../bsps/powerpc/ss555/start/start.S
 librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/start/bspgetworkarea-default.c
 librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/start/bspreset-empty.c
 # tm27supp
-librtemsbsp_a_SOURCES += startup/tm27supp.c
+librtemsbsp_a_SOURCES += ../../../../../../bsps/powerpc/ss555/start/tm27supp.c
 
 librtemsbsp_a_SOURCES += ../../../../../../bsps/powerpc/shared/cache/cache.c
 librtemsbsp_a_SOURCES += ../../../../../../bsps/powerpc/shared/btimer/btimer-ppc-dec.c
diff --git a/c/src/lib/libbsp/powerpc/ss555/startup/bsp_specs b/c/src/lib/libbsp/powerpc/ss555/startup/bsp_specs
deleted file mode 100644
index 2625609327..0000000000
--- a/c/src/lib/libbsp/powerpc/ss555/startup/bsp_specs
+++ /dev/null
@@ -1,9 +0,0 @@
-%rename endfile old_endfile
-%rename startfile old_startfile
-
-*startfile:
-%{!qrtems: %(old_startfile)} \
-%{!nostdlib: %{qrtems: ecrti%O%s rtems_crti%O%s crtbegin.o%s}}
-
-*endfile:
-%{!qrtems: %(old_endfile)} %{qrtems: crtend.o%s ecrtn.o%s}
diff --git a/c/src/lib/libbsp/powerpc/ss555/startup/bspstart.c b/c/src/lib/libbsp/powerpc/ss555/startup/bspstart.c
deleted file mode 100644
index f47ca7d5be..0000000000
--- a/c/src/lib/libbsp/powerpc/ss555/startup/bspstart.c
+++ /dev/null
@@ -1,97 +0,0 @@
-/*
- *  This routine does the bulk of the system initialization.
- */
-
-/*
- *  COPYRIGHT (c) 1989-2007.
- *  On-Line Applications Research Corporation (OAR).
- *
- *  The license and distribution terms for this file may be
- *  found in the file LICENSE in this distribution or at
- *  http://www.rtems.org/license/LICENSE.
- *
- *  SS555 port sponsored by Defence Research and Development Canada - Suffield
- *  Copyright (C) 2004, Real-Time Systems Inc. (querbach@realtime.bc.ca)
- *
- *  Derived from c/src/lib/libbsp/powerpc/mbx8xx/startup/bspstart.c:
- *
- *  Modifications for MBX860:
- *  Copyright (c) 1999, National Research Council of Canada
- */
-
-#include <rtems/bspIo.h>
-#include <rtems/counter.h>
-#include <bsp/bootcard.h>
-#include <rtems/powerpc/powerpc.h>
-
-#include <libcpu/cpuIdent.h>
-#include <libcpu/spr.h>
-
-#include <bsp/irq.h>
-#include <bsp.h>
-
-SPR_RW(SPRG1)
-
-extern unsigned long intrStackPtr;
-
-/*
- *  Driver configuration parameters
- */
-uint32_t   bsp_clicks_per_usec;
-uint32_t   bsp_clock_speed;	       /* Serial clocks per second */
-
-/*
- *  bsp_start()
- *
- *  Board-specific initialization code. Called from the generic boot_card()
- *  function defined in rtems/c/src/lib/libbsp/shared/main.c. That function
- *  does some of the board independent initialization. It is called from the
- *  SS555 entry point _start() defined in
- *  rtems/c/src/lib/libbsp/powerpc/ss555/start/start.S
- *
- *  _start() has set up a stack, has zeroed the .bss section, has set up the
- *  .data section from contents stored in ROM, has turned off interrupts,
- *  and placed the processor in the supervisor mode.  boot_card() has left
- *  the processor in that state when bsp_start() was called.
- *
- *  Input parameters: NONE
- *
- *  Output parameters: NONE
- *
- *  Return values: NONE
- */
-void bsp_start(void)
-{
-  register unsigned char* intrStack;
-
-  /*
-   * Get CPU identification dynamically.  Note that the get_ppc_cpu_type()
-   * function stores the result in global variables so that it can be used
-   * later.
-   */
-  get_ppc_cpu_type();
-  get_ppc_cpu_revision();
-
-  /*
-   * Initialize some SPRG registers related to irq handling
-   */
-  intrStack = (((unsigned char*)&intrStackPtr) - PPC_MINIMUM_STACK_FRAME_SIZE);
-  _write_SPRG1((unsigned int)intrStack);
-
-  /*
-   * Install our own set of exception vectors
-   */
-  initialize_exceptions();
-
-  /*
-   *  initialize the device driver parameters
-   */
-  bsp_clicks_per_usec = BSP_CRYSTAL_HZ / 4 / 1000000;
-  bsp_clock_speed     = BSP_CLOCK_HZ;	/* for SCI baud rate generator */
-  rtems_counter_initialize_converter(BSP_CRYSTAL_HZ / 4);
-
-  /*
-   * Initalize RTEMS IRQ system
-   */
-  BSP_rtems_irq_mng_init(0);
-}
diff --git a/c/src/lib/libbsp/powerpc/ss555/startup/iss555.c b/c/src/lib/libbsp/powerpc/ss555/startup/iss555.c
deleted file mode 100644
index 034ae74b1d..0000000000
--- a/c/src/lib/libbsp/powerpc/ss555/startup/iss555.c
+++ /dev/null
@@ -1,148 +0,0 @@
-/*
- *  Intec SS555 initialization routines.
- */
-
-/*
- *  SS555 port sponsored by Defence Research and Development Canada - Suffield
- *  Copyright (C) 2004, Real-Time Systems Inc. (querbach@realtime.bc.ca)
- *
- *  Derived from c/src/lib/libbsp/powerpc/mbx8xx/startup/imbx8xx.c:
- *
- *  Copyright (c) 1999, National Research Council of Canada
- *
- *  The license and distribution terms for this file may be
- *  found in the file LICENSE in this distribution or at
- *  http://www.rtems.org/license/LICENSE.
- */
-
-#include <bsp.h>
-
-SPR_RW(ICTRL);
-SPR_RW(PPC_DEC);
-SPR_RW(TBWU);
-SPR_RW(TBWL);
-SPR_RO(IMMR);
-SPR_RW(MI_GRA);
-SPR_RW(L2U_GRA);
-SPR_RW(BBCMCR);
-
-extern char int_ram_top[];		/* top of internal ram */
-
-/*
- *  Initialize SS555
- */
-void _InitSS555 (void)
-{
-  register uint32_t plprcr, msr;
-
-  /*
-   * Initialize the System Protection Control Register (SYPCR).
-   * The SYPCR can only be written once after Reset.
-   */
-  usiu.sypcr =
-      USIU_SYPCR_SWTC(WATCHDOG_TIMEOUT)	/* set watchdog timeout */
-    | USIU_SYPCR_BMT(0xFF) 		/* set bus monitor timeout */
-    | USIU_SYPCR_BME 			/* enable bus monitor */
-    | USIU_SYPCR_SWF			/* watchdog halted in freeze */
-#if WATCHDOG_TIMEOUT != 0xFFFF
-    | USIU_SYPCR_SWE			/* enable watchdog */
-#endif
-    | USIU_SYPCR_SWRI			/* watchdog forces reset */
-    | USIU_SYPCR_SWP;			/* prescale watchdog by 2048 */
-
-  TICKLE_WATCHDOG();			/* restart watchdog timer */
-
-  /*
-   * Re-tune the PLL to the desired system clock frequency.
-   */
-  usiu.plprck = USIU_UNLOCK_KEY;	/* unlock PLPRCR */
-  usiu.plprcr =
-      USIU_PLPRCR_TEXPS			/* assert TEXP always */
-    | USIU_PLPRCR_MF(BSP_CLOCK_HZ / BSP_CRYSTAL_HZ);
-  					/* PLL multiplication factor */
-  usiu.plprck = 0;			/* lock PLPRCR */
-
-  while (((plprcr = usiu.plprcr) & USIU_PLPRCR_SPLS) == 0)
-    ;					/* wait for PLL to re-lock */
-
-  /*
-   * Enable the timebase and decrementer, then initialize decrementer
-   * register to a large value to guarantee that a decrementer interrupt
-   * will not be generated before the kernel is fully initialized.
-   * Initialize the timebase register to zero.
-   */
-  usiu.tbscrk = USIU_UNLOCK_KEY;
-  usiu.tbscr |= USIU_TBSCR_TBE;		/* enable time base and decrementer */
-  usiu.tbscrk = 0;
-
-  usiu.tbk = USIU_UNLOCK_KEY;
-  _write_PPC_DEC(0x7FFFFFFF);
-  _write_TBWU(0x00000000 );
-  _write_TBWL(0x00000000 );
-  usiu.tbk = 0;
-
-  /*
-   * Run the Inter-Module Bus at full speed.
-   */
-  imb.uimb.umcr &= ~UIMB_UMCR_HSPEED;
-
-  /*
-   * Initialize Memory Controller for External RAM
-   *
-   * Initialize the Base and Option Registers (BR0-BR7 and OR0-OR7).  Note
-   * that for all chip selects, ORx should be programmed before BRx.
-   *
-   * If booting from internal flash ROM, configure the external RAM to
-   * extend the internal RAM.  If booting from external RAM, leave it at
-   * zero but set it up appropriately.
-   */
-  usiu.memc[0]._or =
-      USIU_MEMC_OR_512K			/* bank size */
-    | USIU_MEMC_OR_SCY(0)		/* wait states in first beat of burst */
-    | USIU_MEMC_OR_BSCY(0);		/* wait states in subsequent beats */
-
-  usiu.memc[0]._br =
-      USIU_MEMC_BR_BA(_read_IMMR() & IMMR_FLEN
-        ? (uint32_t)int_ram_top : 0)	/* base address */
-    | USIU_MEMC_BR_PS32			/* 32-bit data bus */
-    | USIU_MEMC_BR_TBDIP		/* toggle bdip */
-    | USIU_MEMC_BR_V;			/* base register valid */
-
-  /*
-   * Initialize Memory Controller for External CPLD
-   *
-   * The SS555 board includes a CPLD to control on-board features and
-   * off-board devices.  (Configuration taken from Intec's hwhook.c)
-   */
-  usiu.memc[3]._or =
-      USIU_MEMC_OR_16M			/* bank size */
-    | USIU_MEMC_OR_CSNT			/* negate CS/WE early */
-    | USIU_MEMC_OR_ACS_HALF		/* assert CS half cycle after address */
-    | USIU_MEMC_OR_SCY(15)		/* wait states in first beat of burst */
-    | USIU_MEMC_OR_TRLX;		/* relaxed timing */
-
-  usiu.memc[3]._br =
-      USIU_MEMC_BR_BA(&cpld)		/* base address */
-    | USIU_MEMC_BR_PS16			/* 16-bit data bus */
-    | USIU_MEMC_BR_BI			/* inhibit bursting */
-    | USIU_MEMC_BR_V;			/* base register valid */
-
-  /*
-   * Disable show cycles and serialization so that burst accesses will work
-   * properly.  A different value, such as 0x0, may be more appropriate for
-   * debugging, but can be set with the debugger, if needed.
-   */
-  _write_ICTRL(0x00000007);
-
-  /*
-   * Set up Burst Buffer Controller (BBC)
-   */
-  _write_BBCMCR(
-      BBCMCR_ETRE			/* enable exception relocation */
-    | BBCMCR_BE);			/* enable burst accesses */
-  _isync;
-
-  _CPU_MSR_GET(msr);
-  msr |= MSR_IP;		/* set prefix for exception relocation */
-  _CPU_MSR_SET(msr);
-}
diff --git a/c/src/lib/libbsp/powerpc/ss555/startup/linkcmds b/c/src/lib/libbsp/powerpc/ss555/startup/linkcmds
deleted file mode 100644
index 8282d6c605..0000000000
--- a/c/src/lib/libbsp/powerpc/ss555/startup/linkcmds
+++ /dev/null
@@ -1,328 +0,0 @@
-/*
- * Linker command file for Intec SS555 board
- *
- * When debugging, we assume that the internal flash ROM will be replaced by
- * the external RAM on the SS555 board.  All sections are stacked starting
- * at address zero.  Nothing is placed in the internal RAM, since it's not
- * contiguous with the external SRAM when the external RAM is placed at
- * zero.
- *
- * For final production, we assume that the .text section will be burned
- * into flash ROM starting at address zero.  The .data, .bss, heap, and
- * workspace will reside in RAM, starting at the beginning of the internal
- * RAM.  The system startup code will configure the external RAM to begin
- * where the internal RAM ends, so as to make one large RAM block.
- */
-
-OUTPUT_FORMAT("elf32-powerpc", "elf32-powerpc", "elf32-powerpc")
-OUTPUT_ARCH(powerpc) 
-ENTRY(start)
-EXTERN(_vectors)
-
-int_ram_org	= 0x003F9800;		/* base of internal RAM */
-int_ram_top	= 0x00400000;		/* top of internal RAM */
-ext_ram_size	= 0x00080000;		/* size of external RAM */
-
-RamBase = DEFINED(_RamBase) ? RamBase : 0x003F9800;
-RamSize = DEFINED(_RamSize) ? RamSize : 0x00486800;
-HeapSize = DEFINED(_HeapSize) ? HeapSize : 0x0;
-
-SECTIONS
-{
-  .vectors 0x0:
-  {
-    /*
-     * For the MPC555, we use the compressed vector table format which puts
-     * all of the exception vectors before 0x100.
-     */ 
-    *(.vectors)
-  }
-
-  .text 0x100:
-  {
-    /* Read-only sections, merged into text segment: */
-    
-    text.start = .;
-
-    /* Entry point is the .entry section */
-    *(.entry)
-    *(.entry2)
-
-    /* Actual code */
-    *(.text*)
-
-    /* C++ constructors/destructors */
-    *(.gnu.linkonce.t*)
-	     
-    /*  Initialization and finalization code.
-     *
-     *  Various files can provide initialization and finalization functions.
-     *  The bodies of these functions are in .init and .fini sections. We
-     *  accumulate the bodies here, and prepend function prologues from
-     *  ecrti.o and function epilogues from ecrtn.o. ecrti.o must be linked
-     *  first; ecrtn.o must be linked last. Because these are wildcards, it
-     *  doesn't matter if the user does not actually link against ecrti.o and
-     *  ecrtn.o; the linker won't look for a file to match a wildcard.  The
-     *  wildcard also means that it doesn't matter which directory ecrti.o
-     *  and ecrtn.o are in. 
-     */
-    PROVIDE (_init = .);
-    *ecrti.o(.init)
-    *(.init)
-    *ecrtn.o(.init)
-    
-    PROVIDE (_fini = .);
-    *ecrti.o(.fini)
-    *(.fini)
-    *ecrtn.o(.init)
-
-    /* 
-     *  C++ constructors and destructors for static objects.
-     *  PowerPC EABI does not use crtstuff yet, so we build "old-style"
-     *  constructor and destructor lists that begin with the list length
-     *  end terminate with a NULL entry.
-     */
-    PROVIDE (__CTOR_LIST__ = .);	     
-    /* LONG((__CTOR_END__ - __CTOR_LIST__) / 4 - 2) */
-    *crtbegin.o(.ctors)
-    *(.ctors)
-    *crtend.o(.ctors)
-    LONG(0)
-    PROVIDE (__CTOR_END__ = .);
-	
-    PROVIDE (__DTOR_LIST__ = .);
-    /* LONG((__DTOR_END__ - __DTOR_LIST__) / 4 - 2) */
-    *crtbegin.o(.dtors)
-    *(.dtors)
-    *crtend.o(.dtors)
-    LONG(0)
-    PROVIDE (__DTOR_END__ = .);
-	
-    /*
-     * Special FreeBSD sysctl sections.
-     */
-    . = ALIGN (16);
-    __start_set_sysctl_set = .;
-    *(set_sysctl_*);
-    __stop_set_sysctl_set = ABSOLUTE(.);
-    *(set_domain_*);
-    *(set_pseudo_*);
-
-    /* Exception frame info */
-    *(.eh_frame)
-
-    /* Miscellaneous read-only data */
-    _rodata_start = . ;
-    *(.gnu.linkonce.r*)
-    *(.lit)
-    *(.shdata)
-    *(.rodata*)
-    *(.rodata1)
-    KEEP (*(SORT(.rtemsroset.*)))
-    *(.descriptors)
-    *(rom_ver)
-    _erodata = .;
-
-    /* Various possible names for the end of the .text section */
-    etext = ALIGN(0x10);
-    _etext = .;
-    _endtext = .;
-    text.end = .;
-    PROVIDE (etext = .);
-    PROVIDE (__etext = .);
-  }
-  text.size = text.end - text.start;
-
-  .tdata : {
-    _TLS_Data_begin = .;
-    *(.tdata .tdata.* .gnu.linkonce.td.*)
-    _TLS_Data_end = .;
-
-    /* 
-     * .data section contents, copied to RAM at system startup. 
-     */
-    . = ALIGN(0x20);
-    data.contents.start = .;
-  }
-  .tbss : {
-    _TLS_BSS_begin = .;
-    *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon)
-    _TLS_BSS_end = .;
-  }
-  _TLS_Data_size = _TLS_Data_end - _TLS_Data_begin;
-  _TLS_Data_begin = _TLS_Data_size != 0 ? _TLS_Data_begin : _TLS_BSS_begin;
-  _TLS_Data_end = _TLS_Data_size != 0 ? _TLS_Data_end : _TLS_BSS_begin;
-  _TLS_BSS_size = _TLS_BSS_end - _TLS_BSS_begin;
-  _TLS_Size = _TLS_BSS_end - _TLS_Data_begin;
-  _TLS_Alignment = MAX (ALIGNOF (.tdata), ALIGNOF (.tbss));
-
-  /*
-   * If debugging, stack the read/write sections directly after the text
-   * section.  Otherwise, stack the read/write sections starting at base of
-   * internal RAM.
-   */
-  . = DEFINED(RTEMS_DEBUG) ? . : int_ram_org;
- 
-  .data : AT (data.contents.start)
-  {
-    data.start = .;
-    
-    *(.data)
-    *(.data.*)
-    KEEP (*(SORT(.rtemsrwset.*)))
-    *(.data1)
-    
-    PROVIDE (__SDATA_START__ = .);
-    *(.sdata .sdata.* .gnu.linkonce.s.*)
-    PROVIDE (__SDATA_END__ = .);
-    
-    PROVIDE (__EXCEPT_START__ = .);
-    *(.gcc_except_table*)
-    PROVIDE (__EXCEPT_END__ = .);
-    
-    PROVIDE(__GOT_START__ = .);
-    *(.got.plt) 
-    *(.got)
-    PROVIDE(__GOT_END__ = .);
-	
-    *(.got1)
-    
-    PROVIDE (__GOT2_START__ = .);
-    PROVIDE (_GOT2_START_ = .);
-    *(.got2)
-    PROVIDE (__GOT2_END__ = .);
-    PROVIDE (_GOT2_END_ = .);
-	
-    PROVIDE (__FIXUP_START__ = .);
-    PROVIDE (_FIXUP_START_ = .);
-    *(.fixup)
-    PROVIDE (_FIXUP_END_ = .);
-    PROVIDE (__FIXUP_END__ = .);
-
-    /*  We want the small data sections together, so single-instruction
-     *   offsets can access them all.
-     */
-    PROVIDE (__SDATA2_START__ = .);
-    *(.sdata2 .sdata2.* .gnu.linkonce.s2.*)
-    *(.sbss2 .sbss2.* .gnu.linkonce.sb2.*)
-    PROVIDE (__SDATA2_END__ = .);
-
-    data.end = .;
-  }
-  data.size = data.end - data.start;
-
-  bss.start = .;
-  .sbss          :
-  {
-    PROVIDE (__sbss_start = .); PROVIDE (___sbss_start = .);
-    *(.dynsbss)
-    *(.sbss .sbss.* .gnu.linkonce.sb.*)
-    *(.scommon)
-    PROVIDE (__sbss_end = .); PROVIDE (___sbss_end = .);
-  }
-  .bss :
-  {
-    *(.dynbss)	
-    *(.bss .bss* .gnu.linkonce.b*)
-    *(COMMON)
-    . = ALIGN(4);
-  }
-  bss.end = .;
-  bss.size = bss.end - bss.start;
-
-  PROVIDE(_end = bss.end);
-
-  /*
-   * Initialization stack
-   */
-  InitStack_start = ALIGN(0x10);
-  . += 0x1000;
-  initStack = .;
-  PROVIDE(initStackPtr = initStack);
-
-  /*
-   * Interrupt stack
-   */
-  IntrStack_start = ALIGN(0x10);
-  . += 0x4000;
-  intrStack = .;
-  PROVIDE(intrStackPtr = intrStack);
-
-  /*
-   * Work Area
-   *
-   * The Work Area is configured at run-time to use all available memory.  It
-   * begins just after the end of the Workspace and continues to the end of
-   * the external RAM.
-   */
-  . = DEFINED(RTEMS_DEBUG) ? 0 + ext_ram_size : int_ram_top + ext_ram_size;
-  WorkAreaBase = .;
-
- 
-  /* 
-   * Internal I/O devices 
-   */
-  .usiu 0x002FC000:		/* unified system interface unit */
-  {
-    usiu = .;
-  }
-
-  .imb 0x00300000:		/* inter-module bus and devices */
-  {
-    imb = .;
-  }
-
-  .sram 0x00380000:		/* internal SRAM control registers */
-  {
-    sram = .;
-  }
-
-  /*
-   * SS555 external devices managed by on-board CPLD
-   */
-  .cpld 0xFF000000:		/* SS555 external CPLD devices */
-  {
-    cpld = .;
-  }
-
-
-  /* Stabs debugging sections.  */
-  .stab 0 : { *(.stab) }
-  .stabstr 0 : { *(.stabstr) }
-  .stab.excl 0 : { *(.stab.excl) }
-  .stab.exclstr 0 : { *(.stab.exclstr) }
-  .stab.index 0 : { *(.stab.index) }
-  .stab.indexstr 0 : { *(.stab.indexstr) }
-  .comment 0 : { *(.comment) }
-  
-  /* DWARF debug sections.
-     Symbols in the DWARF debugging sections are relative to the beginning
-     of the section so we begin them at 0.  */
-  /* DWARF 1 */
-  .debug          0 : { *(.debug) }
-  .line           0 : { *(.line) }
-  
-  /* GNU DWARF 1 extensions */
-  .debug_srcinfo  0 : { *(.debug_srcinfo) }
-  .debug_sfnames  0 : { *(.debug_sfnames) }
-  
-  /* DWARF 1.1 and DWARF 2 */
-  .debug_aranges  0 : { *(.debug_aranges) }
-  .debug_pubnames 0 : { *(.debug_pubnames) }
-  
-  /* DWARF 2 */
-  .debug_info     0 : { *(.debug_info) }
-  .debug_abbrev   0 : { *(.debug_abbrev) }
-  .debug_line     0 : { *(.debug_line) }
-  .debug_frame    0 : { *(.debug_frame) }
-  .debug_str      0 : { *(.debug_str) }
-  .debug_loc      0 : { *(.debug_loc) }
-  .debug_macinfo  0 : { *(.debug_macinfo) }
-  
-  /* SGI/MIPS DWARF 2 extensions */
-  .debug_weaknames 0 : { *(.debug_weaknames) }
-  .debug_funcnames 0 : { *(.debug_funcnames) }
-  .debug_typenames 0 : { *(.debug_typenames) }
-  .debug_varnames  0 : { *(.debug_varnames) }
-  /* These must appear regardless of  .  */
-}
diff --git a/c/src/lib/libbsp/powerpc/ss555/startup/tm27supp.c b/c/src/lib/libbsp/powerpc/ss555/startup/tm27supp.c
deleted file mode 100644
index 4c1660ff70..0000000000
--- a/c/src/lib/libbsp/powerpc/ss555/startup/tm27supp.c
+++ /dev/null
@@ -1,14 +0,0 @@
-/*
- *  Support routines for TM27
- */
-
-#include <bsp.h>
-
-rtems_irq_connect_data tm27IrqData = {
-  CPU_USIU_EXT_IRQ_7,
-  (rtems_irq_hdl)0,
-  NULL,
-  NULL,
-  NULL
-};
-