Remove stray white spaces.

4 files changed, 66 insertions, 66 deletions

diff --git a/c/src/lib/libbsp/powerpc/shared/pci/detect_raven_bridge.c b/c/src/lib/libbsp/powerpc/shared/pci/detect_raven_bridge.c
index f68f7be2aa..7748e3c307 100644
--- a/c/src/lib/libbsp/powerpc/shared/pci/detect_raven_bridge.c
+++ b/c/src/lib/libbsp/powerpc/shared/pci/detect_raven_bridge.c
@@ -57,25 +57,25 @@ void detect_host_bridge()
   PPC_DEVICE *hostbridge;
   unsigned int id0;
   unsigned int tmp;
-  
+
   /*
    * This code assumes that the host bridge is located at
    * bus 0, dev 0, func 0 AND that the old pre PCI 2.1
    * standart devices detection mecahnism that was used on PC
    * (still used in BSD source code) works.
    */
-  hostbridge=residual_find_device(&residualCopy, PROCESSORDEVICE, NULL, 
+  hostbridge=residual_find_device(&residualCopy, PROCESSORDEVICE, NULL,
 				  BridgeController,
 				  PCIBridge, -1, 0);
   if (hostbridge) {
     if (hostbridge->DeviceId.Interface==PCIBridgeIndirect) {
       pci.pci_functions=&pci_indirect_functions;
-      /* Should be extracted from residual data, 
+      /* Should be extracted from residual data,
        * indeed MPC106 in CHRP mode is different,
        * but we should not use residual data in
-       * this case anyway. 
+       * this case anyway.
        */
-      pci.pci_config_addr = ((volatile unsigned char *) 
+      pci.pci_config_addr = ((volatile unsigned char *)
 			      (ptr_mem_map->io_base+0xcf8));
       pci.pci_config_data = ptr_mem_map->io_base+0xcfc;
     } else if(hostbridge->DeviceId.Interface==PCIBridgeDirect) {
@@ -87,7 +87,7 @@ void detect_host_bridge()
     /* Let us try by experimentation at our own risk! */
     pci.pci_functions = &pci_direct_functions;
     /* On all direct bridges I know the host bridge itself
-     * appears as device 0 function 0. 
+     * appears as device 0 function 0.
 		 */
     pci_read_config_dword(0, 0, 0, PCI_VENDOR_ID, &id0);
     if (id0==~0U) {
@@ -108,27 +108,27 @@ void detect_host_bridge()
      * We have a Raven bridge. We will get information about its settings
      */
     pci_read_config_dword(0, 0, 0, PCI_COMMAND, &id0);
-#ifdef SHOW_RAVEN_SETTING    
+#ifdef SHOW_RAVEN_SETTING
     printk("RAVEN PCI command register = %x\n",id0);
-#endif    
+#endif
     id0 |= RAVEN_CLEAR_EVENTS_MASK;
     pci_write_config_dword(0, 0, 0, PCI_COMMAND, id0);
     pci_read_config_dword(0, 0, 0, PCI_COMMAND, &id0);
-#ifdef SHOW_RAVEN_SETTING    
+#ifdef SHOW_RAVEN_SETTING
     printk("After error clearing RAVEN PCI command register = %x\n",id0);
-#endif    
-    
+#endif
+
     if (id0 & RAVEN_MPIC_IOSPACE_ENABLE) {
       pci_read_config_dword(0, 0, 0,PCI_BASE_ADDRESS_0, &tmp);
-#ifdef SHOW_RAVEN_SETTING    
+#ifdef SHOW_RAVEN_SETTING
       printk("Raven MPIC is accessed via IO Space Access at address : %x\n",(tmp & ~0x1));
-#endif    
+#endif
     }
     if (id0 & RAVEN_MPIC_MEMSPACE_ENABLE) {
       pci_read_config_dword(0, 0, 0,PCI_BASE_ADDRESS_1, &tmp);
-#ifdef SHOW_RAVEN_SETTING    
+#ifdef SHOW_RAVEN_SETTING
       printk("Raven MPIC is accessed via memory Space Access at address : %x\n", tmp);
-#endif    
+#endif
       OpenPIC=(volatile struct OpenPIC *) (tmp + PREP_ISA_MEM_BASE);
       printk("OpenPIC found at %x.\n",
 	     OpenPIC);
diff --git a/c/src/lib/libbsp/powerpc/shared/pci/pci.c b/c/src/lib/libbsp/powerpc/shared/pci/pci.c
index 506221c8e2..ba5a97d44d 100644
--- a/c/src/lib/libbsp/powerpc/shared/pci/pci.c
+++ b/c/src/lib/libbsp/powerpc/shared/pci/pci.c
@@ -44,9 +44,9 @@ unsigned char ucMaxPCIBus;
 
 static int
 indirect_pci_read_config_byte(unsigned char bus, unsigned char slot,
-			      unsigned char function, 
+			      unsigned char function,
 			      unsigned char offset, unsigned char *val) {
-	out_be32((unsigned int*) pci.pci_config_addr, 
+	out_be32((unsigned int*) pci.pci_config_addr,
 		 0x80|(bus<<8)|(PCI_DEVFN(slot,function)<<16)|((offset&~3)<<24));
 	*val = in_8(pci.pci_config_data + (offset&3));
 	return PCIBIOS_SUCCESSFUL;
@@ -54,11 +54,11 @@ indirect_pci_read_config_byte(unsigned char bus, unsigned char slot,
 
 static int
 indirect_pci_read_config_word(unsigned char bus, unsigned char slot,
-			      unsigned char function, 
+			      unsigned char function,
 			      unsigned char offset, unsigned short *val) {
-	*val = 0xffff; 
+	*val = 0xffff;
 	if (offset&1) return PCIBIOS_BAD_REGISTER_NUMBER;
-	out_be32((unsigned int*) pci.pci_config_addr, 
+	out_be32((unsigned int*) pci.pci_config_addr,
 		 0x80|(bus<<8)|(PCI_DEVFN(slot,function)<<16)|((offset&~3)<<24));
 	*val = in_le16((volatile unsigned short *)(pci.pci_config_data + (offset&3)));
 	return PCIBIOS_SUCCESSFUL;
@@ -66,11 +66,11 @@ indirect_pci_read_config_word(unsigned char bus, unsigned char slot,
 
 static int
 indirect_pci_read_config_dword(unsigned char bus, unsigned char slot,
-			      unsigned char function, 
+			      unsigned char function,
 			      unsigned char offset, unsigned int *val) {
-	*val = 0xffffffff; 
+	*val = 0xffffffff;
 	if (offset&3) return PCIBIOS_BAD_REGISTER_NUMBER;
-	out_be32((unsigned int*) pci.pci_config_addr, 
+	out_be32((unsigned int*) pci.pci_config_addr,
 		 0x80|(bus<<8)|(PCI_DEVFN(slot,function)<<16)|(offset<<24));
 	*val = in_le32((volatile unsigned int *)pci.pci_config_data);
 	return PCIBIOS_SUCCESSFUL;
@@ -78,9 +78,9 @@ indirect_pci_read_config_dword(unsigned char bus, unsigned char slot,
 
 static int
 indirect_pci_write_config_byte(unsigned char bus, unsigned char slot,
-			       unsigned char function, 
+			       unsigned char function,
 			       unsigned char offset, unsigned char val) {
-	out_be32((unsigned int*) pci.pci_config_addr, 
+	out_be32((unsigned int*) pci.pci_config_addr,
 		 0x80|(bus<<8)|(PCI_DEVFN(slot,function)<<16)|((offset&~3)<<24));
 	out_8(pci.pci_config_data + (offset&3), val);
 	return PCIBIOS_SUCCESSFUL;
@@ -88,10 +88,10 @@ indirect_pci_write_config_byte(unsigned char bus, unsigned char slot,
 
 static int
 indirect_pci_write_config_word(unsigned char bus, unsigned char slot,
-			       unsigned char function, 
+			       unsigned char function,
 			       unsigned char offset, unsigned short val) {
 	if (offset&1) return PCIBIOS_BAD_REGISTER_NUMBER;
-	out_be32((unsigned int*) pci.pci_config_addr, 
+	out_be32((unsigned int*) pci.pci_config_addr,
 		 0x80|(bus<<8)|(PCI_DEVFN(slot,function)<<16)|((offset&~3)<<24));
 	out_le16((volatile unsigned short *)(pci.pci_config_data + (offset&3)), val);
 	return PCIBIOS_SUCCESSFUL;
@@ -99,10 +99,10 @@ indirect_pci_write_config_word(unsigned char bus, unsigned char slot,
 
 static int
 indirect_pci_write_config_dword(unsigned char bus, unsigned char slot,
-				unsigned char function, 
+				unsigned char function,
 				unsigned char offset, unsigned int val) {
 	if (offset&3) return PCIBIOS_BAD_REGISTER_NUMBER;
-	out_be32((unsigned int*) pci.pci_config_addr, 
+	out_be32((unsigned int*) pci.pci_config_addr,
 		 0x80|(bus<<8)|(PCI_DEVFN(slot,function)<<16)|(offset<<24));
 	out_le32((volatile unsigned int *)pci.pci_config_data, val);
 	return PCIBIOS_SUCCESSFUL;
@@ -123,22 +123,22 @@ pci_config BSP_pci_configuration = {(volatile unsigned char*)PCI_CONFIG_ADDR,
 
 static int
 direct_pci_read_config_byte(unsigned char bus, unsigned char slot,
-			    unsigned char function, 
+			    unsigned char function,
 			    unsigned char offset, unsigned char *val) {
 	if (bus != 0 || (1<<slot & 0xff8007fe)) {
 		*val=0xff;
  		return PCIBIOS_DEVICE_NOT_FOUND;
 	}
-	*val=in_8(pci.pci_config_data + ((1<<slot)&~1) 
+	*val=in_8(pci.pci_config_data + ((1<<slot)&~1)
 		  + (function<<8) + offset);
 	return PCIBIOS_SUCCESSFUL;
 }
 
 static int
 direct_pci_read_config_word(unsigned char bus, unsigned char slot,
-			    unsigned char function, 
+			    unsigned char function,
 			    unsigned char offset, unsigned short *val) {
-	*val = 0xffff; 
+	*val = 0xffff;
 	if (offset&1) return PCIBIOS_BAD_REGISTER_NUMBER;
 	if (bus != 0 || (1<<slot & 0xff8007fe)) {
  		return PCIBIOS_DEVICE_NOT_FOUND;
@@ -151,9 +151,9 @@ direct_pci_read_config_word(unsigned char bus, unsigned char slot,
 
 static int
 direct_pci_read_config_dword(unsigned char bus, unsigned char slot,
-			     unsigned char function, 
+			     unsigned char function,
 			     unsigned char offset, unsigned int *val) {
-	*val = 0xffffffff; 
+	*val = 0xffffffff;
 	if (offset&3) return PCIBIOS_BAD_REGISTER_NUMBER;
 	if (bus != 0 || (1<<slot & 0xff8007fe)) {
  		return PCIBIOS_DEVICE_NOT_FOUND;
@@ -166,20 +166,20 @@ direct_pci_read_config_dword(unsigned char bus, unsigned char slot,
 
 static int
 direct_pci_write_config_byte(unsigned char bus, unsigned char slot,
-			     unsigned char function, 
+			     unsigned char function,
 			     unsigned char offset, unsigned char val) {
 	if (bus != 0 || (1<<slot & 0xff8007fe)) {
  		return PCIBIOS_DEVICE_NOT_FOUND;
 	}
-	out_8(pci.pci_config_data + ((1<<slot)&~1) 
-	      + (function<<8) + offset, 
+	out_8(pci.pci_config_data + ((1<<slot)&~1)
+	      + (function<<8) + offset,
 	      val);
 	return PCIBIOS_SUCCESSFUL;
 }
 
 static int
 direct_pci_write_config_word(unsigned char bus, unsigned char slot,
-			     unsigned char function, 
+			     unsigned char function,
 			     unsigned char offset, unsigned short val) {
 	if (offset&1) return PCIBIOS_BAD_REGISTER_NUMBER;
 	if (bus != 0 || (1<<slot & 0xff8007fe)) {
@@ -194,7 +194,7 @@ direct_pci_write_config_word(unsigned char bus, unsigned char slot,
 
 static int
 direct_pci_write_config_dword(unsigned char bus, unsigned char slot,
-			      unsigned char function, 
+			      unsigned char function,
 			      unsigned char offset, unsigned int val) {
 	if (offset&3) return PCIBIOS_BAD_REGISTER_NUMBER;
 	if (bus != 0 || (1<<slot & 0xff8007fe)) {
@@ -232,7 +232,7 @@ const pci_config_access_functions pci_direct_functions = {
              printk("pci : Device %d:%02x routed to interrupt_line %d\n", pbus, pslot, int_name )
 
 
-/* 
+/*
 ** Validate a test interrupt name and print a warning if its not one of
 ** the names defined in the routing record.
 */
@@ -244,19 +244,19 @@ static int test_intname(
 
    for(j=0; row->pin_route[j].pin > -1; j++)
    {
-      if( row->pin_route[j].pin == int_pin ) 
+      if( row->pin_route[j].pin == int_pin )
       {
          _nopin = 0;
-         
+
          for(k=0; k<4 && row->pin_route[j].int_name[k] > -1; k++ )
          {
-            if( row->pin_route[j].int_name[k] == int_name ){ _noname=0; break; } 
+            if( row->pin_route[j].int_name[k] == int_name ){ _noname=0; break; }
          }
          break;
       }
    }
 
-   if( _nopin  ) 
+   if( _nopin  )
    {
       printk("pci : Device %d:%02x supplied a bogus interrupt_pin %d\n", pbus, pslot, int_pin );
       return -1;
@@ -288,7 +288,7 @@ static int FindPCIbridge( int mybus, struct pcibridge *pb )
    for(pbus=0; pbus< BusCountPCI(); pbus++)
    {
       for(pslot=0; pslot< PCI_MAX_DEVICES; pslot++)
-      { 
+      {
          pci_read_config_word(pbus, pslot, 0, PCI_DEVICE_ID, &devid);
          if( devid == 0xffff ) continue;
 
@@ -297,7 +297,7 @@ static int FindPCIbridge( int mybus, struct pcibridge *pb )
 
          pci_read_config_word(pbus, pslot, 0, PCI_CLASS_DEVICE, &dclass);
 
-         if( dclass == PCI_CLASS_BRIDGE_PCI ) 
+         if( dclass == PCI_CLASS_BRIDGE_PCI )
          {
             pci_read_config_byte(pbus, pslot, 0, PCI_PRIMARY_BUS,    &buspri);
             pci_read_config_byte(pbus, pslot, 0, PCI_SECONDARY_BUS,  &bussec);
@@ -349,7 +349,7 @@ void FixupPCI( const struct _int_map *bspmap, int (*swizzler)(int,int) )
    for(pbus=0; pbus< BusCountPCI(); pbus++)
    {
       for(pslot=0; pslot< PCI_MAX_DEVICES; pslot++)
-      { 
+      {
          pci_read_config_word(pbus, pslot, 0, PCI_DEVICE_ID, &devid);
          if( devid == 0xffff ) continue;
 
@@ -406,13 +406,13 @@ void FixupPCI( const struct _int_map *bspmap, int (*swizzler)(int,int) )
                }
             }
 
-            
+
             if( !ismatch )
             {
-               /* 
+               /*
                ** no match, which means we're on a bus someplace.  Work
                ** backwards from it to one of our defined busses,
-               ** swizzling thru each bridge on the way. 
+               ** swizzling thru each bridge on the way.
                */
 
                /* keep pbus, pslot pointed to the device being
@@ -481,7 +481,7 @@ void FixupPCI( const struct _int_map *bspmap, int (*swizzler)(int,int) )
                   {
                      struct pcibridge   pb;
 
-                     /* 
+                     /*
                      ** Haven't found our bus in the int map, so work
                      ** upwards thru the bridges till we find it.
                      */
@@ -504,7 +504,7 @@ void FixupPCI( const struct _int_map *bspmap, int (*swizzler)(int,int) )
                         printk("pci : No bridge from bus %d towards root found\n", tbus );
                         goto donesearch;
                      }
-                     
+
                   }
 
                }
diff --git a/c/src/lib/libbsp/powerpc/shared/pci/pci.h b/c/src/lib/libbsp/powerpc/shared/pci/pci.h
index 0971a0ec48..4ce74f7307 100644
--- a/c/src/lib/libbsp/powerpc/shared/pci/pci.h
+++ b/c/src/lib/libbsp/powerpc/shared/pci/pci.h
@@ -43,7 +43,7 @@
 #define  PCI_STATUS_FAST_BACK	0x80	/* Accept fast-back to back */
 #define  PCI_STATUS_PARITY	0x100	/* Detected parity error */
 #define  PCI_STATUS_DEVSEL_MASK	0x600	/* DEVSEL timing */
-#define  PCI_STATUS_DEVSEL_FAST	0x000	
+#define  PCI_STATUS_DEVSEL_FAST	0x000
 #define  PCI_STATUS_DEVSEL_MEDIUM 0x200
 #define  PCI_STATUS_DEVSEL_SLOW 0x400
 #define  PCI_STATUS_SIG_TARGET_ABORT 0x800 /* Set on target abort */
@@ -72,8 +72,8 @@
 
 /*
  * Base addresses specify locations in memory or I/O space.
- * Decoded size can be determined by writing a value of 
- * 0xffffffff to the register, and reading it back.  Only 
+ * Decoded size can be determined by writing a value of
+ * 0xffffffff to the register, and reading it back.  Only
  * 1 bits are decoded.
  */
 #define PCI_BASE_ADDRESS_0	0x10	/* 32 bits */
@@ -97,7 +97,7 @@
 /* Header type 0 (normal devices) */
 #define PCI_CARDBUS_CIS		0x28
 #define PCI_SUBSYSTEM_VENDOR_ID	0x2c
-#define PCI_SUBSYSTEM_ID	0x2e  
+#define PCI_SUBSYSTEM_ID	0x2e
 #define PCI_ROM_ADDRESS		0x30	/* Bits 31..11 are address, 10..1 reserved */
 #define  PCI_ROM_ADDRESS_ENABLE	0x01
 #define PCI_ROM_ADDRESS_MASK	(~0x7ffUL)
@@ -456,8 +456,8 @@
 #define PCI_DEVICE_ID_PCTECH_SAMURAI_1	0x3010
 #define PCI_DEVICE_ID_PCTECH_SAMURAI_IDE 0x3020
 
-#define PCI_VENDOR_ID_DPT               0x1044   
-#define PCI_DEVICE_ID_DPT               0xa400  
+#define PCI_VENDOR_ID_DPT               0x1044
+#define PCI_DEVICE_ID_DPT               0xa400
 
 #define PCI_VENDOR_ID_OPTI		0x1045
 #define PCI_DEVICE_ID_OPTI_92C178	0xc178
@@ -1112,37 +1112,37 @@ typedef struct {
 extern pci_config BSP_pci_configuration;
 
 extern inline int
-pci_read_config_byte(unsigned char bus, unsigned char slot, unsigned char function, 
+pci_read_config_byte(unsigned char bus, unsigned char slot, unsigned char function,
 			 unsigned char where, unsigned char * val) {
 	return BSP_pci_configuration.pci_functions->read_config_byte(bus, slot, function, where, val);
 }
 
 extern inline int
-pci_read_config_word(unsigned char bus, unsigned char slot, unsigned char function, 
+pci_read_config_word(unsigned char bus, unsigned char slot, unsigned char function,
 			 unsigned char where, unsigned short * val) {
 	return BSP_pci_configuration.pci_functions->read_config_word(bus, slot, function, where, val);
 }
 
 extern inline int
-pci_read_config_dword(unsigned char bus, unsigned char slot, unsigned char function, 
+pci_read_config_dword(unsigned char bus, unsigned char slot, unsigned char function,
 			 unsigned char where, unsigned int * val) {
 	return BSP_pci_configuration.pci_functions->read_config_dword(bus, slot, function, where, val);
 }
 
 extern inline int
-pci_write_config_byte(unsigned char bus, unsigned char slot, unsigned char function, 
+pci_write_config_byte(unsigned char bus, unsigned char slot, unsigned char function,
 			 unsigned char where, unsigned char val) {
 	return BSP_pci_configuration.pci_functions->write_config_byte(bus, slot, function, where, val);
 }
 
 extern inline int
-pci_write_config_word(unsigned char bus, unsigned char slot, unsigned char function, 
+pci_write_config_word(unsigned char bus, unsigned char slot, unsigned char function,
 			 unsigned char where, unsigned short val) {
 	return BSP_pci_configuration.pci_functions->write_config_word(bus, slot, function, where, val);
 }
 
 extern inline int
-pci_write_config_dword(unsigned char bus, unsigned char slot, unsigned char function, 
+pci_write_config_dword(unsigned char bus, unsigned char slot, unsigned char function,
 			 unsigned char where, unsigned int val) {
 	return BSP_pci_configuration.pci_functions->write_config_dword(bus, slot, function, where, val);
 }
diff --git a/c/src/lib/libbsp/powerpc/shared/pci/pcifinddevice.c b/c/src/lib/libbsp/powerpc/shared/pci/pcifinddevice.c
index 6ba8d9cc05..3371eefe6f 100644
--- a/c/src/lib/libbsp/powerpc/shared/pci/pcifinddevice.c
+++ b/c/src/lib/libbsp/powerpc/shared/pci/pcifinddevice.c
@@ -28,7 +28,7 @@ BSP_pciFindDevice( unsigned short vendorid, unsigned short deviceid,
 		hd = (hd & PCI_MULTI_FUNCTION ? PCI_MAX_FUNCTIONS : 1);
 
 		for (fun=0; fun<hd; fun++) {
-			/* 
+			/*
 			 * The last devfn id/slot is special; must skip it
 			 */
 			if (PCI_MAX_DEVICES-1==dev && PCI_MAX_FUNCTIONS-1 == fun)