diff options
author | Ralf Corsepius <ralf.corsepius@rtems.org> | 2004-04-21 10:43:04 +0000 |
---|---|---|
committer | Ralf Corsepius <ralf.corsepius@rtems.org> | 2004-04-21 10:43:04 +0000 |
commit | 6128a4aa5e791ed4e0a655bfd346a52d92da7883 (patch) | |
tree | af53ca3f67ce405b6fbc6c98399c8e0c87e01a9e /c/src/lib/libbsp/powerpc/shared/irq | |
parent | 2004-04-20 Ralf Corsepius <ralf_corsepius@rtems.org> (diff) | |
download | rtems-6128a4aa5e791ed4e0a655bfd346a52d92da7883.tar.bz2 |
Remove stray white spaces.
Diffstat (limited to 'c/src/lib/libbsp/powerpc/shared/irq')
-rw-r--r-- | c/src/lib/libbsp/powerpc/shared/irq/i8259.c | 24 | ||||
-rw-r--r-- | c/src/lib/libbsp/powerpc/shared/irq/irq.c | 58 | ||||
-rw-r--r-- | c/src/lib/libbsp/powerpc/shared/irq/irq.h | 18 | ||||
-rw-r--r-- | c/src/lib/libbsp/powerpc/shared/irq/irq_asm.S | 66 | ||||
-rw-r--r-- | c/src/lib/libbsp/powerpc/shared/irq/irq_init.c | 60 |
5 files changed, 113 insertions, 113 deletions
diff --git a/c/src/lib/libbsp/powerpc/shared/irq/i8259.c b/c/src/lib/libbsp/powerpc/shared/irq/i8259.c index 0261d892f3..806a7eb19b 100644 --- a/c/src/lib/libbsp/powerpc/shared/irq/i8259.c +++ b/c/src/lib/libbsp/powerpc/shared/irq/i8259.c @@ -11,7 +11,7 @@ * * $Id$ */ - + #include <bsp.h> #include <bsp/irq.h> @@ -29,7 +29,7 @@ volatile rtems_i8259_masks i8259s_cache = 0xfffb; | Description: Mask IRQ line in appropriate PIC chip. | Global Variables: i8259s_cache | Arguments: vector_offset - number of IRQ line to mask. -| Returns: Nothing. +| Returns: Nothing. +--------------------------------------------------------------------------*/ int BSP_irq_disable_at_i8259s (const rtems_irq_symbolic_name irqLine) { @@ -40,12 +40,12 @@ int BSP_irq_disable_at_i8259s (const rtems_irq_symbolic_name irqLine) ((int)irqLine > BSP_ISA_IRQ_MAX_OFFSET) ) return 1; - + _CPU_ISR_Disable(level); - + mask = 1 << irqLine; i8259s_cache |= mask; - + if (irqLine < 8) { outport_byte(PIC_MASTER_IMR_IO_PORT, i8259s_cache & 0xff); @@ -57,14 +57,14 @@ int BSP_irq_disable_at_i8259s (const rtems_irq_symbolic_name irqLine) _CPU_ISR_Enable (level); return 0; -} +} /*-------------------------------------------------------------------------+ | Function: BSP_irq_enable_at_i8259s | Description: Unmask IRQ line in appropriate PIC chip. | Global Variables: i8259s_cache | Arguments: irqLine - number of IRQ line to mask. -| Returns: Nothing. +| Returns: Nothing. +--------------------------------------------------------------------------*/ int BSP_irq_enable_at_i8259s (const rtems_irq_symbolic_name irqLine) { @@ -77,10 +77,10 @@ int BSP_irq_enable_at_i8259s (const rtems_irq_symbolic_name irqLine) return 1; _CPU_ISR_Disable(level); - + mask = ~(1 << irqLine); i8259s_cache &= mask; - + if (irqLine < 8) { outport_byte(PIC_MASTER_IMR_IO_PORT, i8259s_cache & 0xff); @@ -106,14 +106,14 @@ int BSP_irq_enabled_at_i8259s (const rtems_irq_symbolic_name irqLine) mask = (1 << irqLine); return (~(i8259s_cache & mask)); } - + /*-------------------------------------------------------------------------+ | Function: BSP_irq_ack_at_i8259s | Description: Signal generic End Of Interrupt (EOI) to appropriate PIC. | Global Variables: None. | Arguments: irqLine - number of IRQ line to acknowledge. -| Returns: Nothing. +| Returns: Nothing. +--------------------------------------------------------------------------*/ int BSP_irq_ack_at_i8259s (const rtems_irq_symbolic_name irqLine) { @@ -147,5 +147,5 @@ void BSP_i8259s_init(void) outport_byte(PIC_SLAVE_IMR_IO_PORT, 0x02);/* edge triggered, Cascade (slave) on IRQ2 */ outport_byte(PIC_SLAVE_IMR_IO_PORT, 0x01); /* Select 8086 mode */ outport_byte(PIC_SLAVE_IMR_IO_PORT, 0xFF); /* Mask all */ - + } diff --git a/c/src/lib/libbsp/powerpc/shared/irq/irq.c b/c/src/lib/libbsp/powerpc/shared/irq/irq.c index 0f7d50fa9b..356c7921f9 100644 --- a/c/src/lib/libbsp/powerpc/shared/irq/irq.c +++ b/c/src/lib/libbsp/powerpc/shared/irq/irq.c @@ -12,7 +12,7 @@ */ #include <stdlib.h> - + #include <bsp.h> #include <bsp/irq.h> #include <bsp/VME.h> @@ -80,7 +80,7 @@ static inline int is_processor_irq(const rtems_irq_symbolic_name irqLine) /* * ------------------------ RTEMS Irq helper functions ---------------- */ - + /* * Caution : this function assumes the variable "internal_config" * is already set and that the tables it contains are still valid @@ -126,7 +126,7 @@ int BSP_install_rtems_shared_irq_handler (const rtems_irq_connect_data* irq) { unsigned int level; rtems_irq_connect_data* vchain; - + if (!isValidInterrupt(irq->name)) { printk("Invalid interrupt vector %d\n",irq->name); return 0; @@ -144,7 +144,7 @@ int BSP_install_rtems_shared_irq_handler (const rtems_irq_connect_data* irq) /* save off topmost handler */ vchain[0]= rtems_hdl_tbl[irq->name]; - + /* * store the data provided by user */ @@ -153,14 +153,14 @@ int BSP_install_rtems_shared_irq_handler (const rtems_irq_connect_data* irq) /* link chain to new topmost handler */ rtems_hdl_tbl[irq->name].next_handler = (void *)vchain; - + if (is_isa_irq(irq->name)) { /* * Enable interrupt at PIC level */ BSP_irq_enable_at_i8259s (irq->name); } - + if (is_pci_irq(irq->name)) { /* * Enable interrupt at OPENPIC level @@ -177,7 +177,7 @@ int BSP_install_rtems_shared_irq_handler (const rtems_irq_connect_data* irq) * Enable interrupt on device */ irq->on(irq); - + _CPU_ISR_Enable(level); return 1; @@ -191,7 +191,7 @@ int BSP_install_rtems_shared_irq_handler (const rtems_irq_connect_data* irq) int BSP_install_rtems_irq_handler (const rtems_irq_connect_data* irq) { unsigned int level; - + if (!isValidInterrupt(irq->name)) { printk("Invalid interrupt vector %d\n",irq->name); return 0; @@ -215,14 +215,14 @@ int BSP_install_rtems_irq_handler (const rtems_irq_connect_data* irq) */ rtems_hdl_tbl[irq->name] = *irq; rtems_hdl_tbl[irq->name].next_handler = (void *)-1; - + if (is_isa_irq(irq->name)) { /* * Enable interrupt at PIC level */ BSP_irq_enable_at_i8259s (irq->name); } - + if (is_pci_irq(irq->name)) { /* * Enable interrupt at OPENPIC level @@ -239,7 +239,7 @@ int BSP_install_rtems_irq_handler (const rtems_irq_connect_data* irq) * Enable interrupt on device */ irq->on(irq); - + _CPU_ISR_Enable(level); return 1; @@ -263,7 +263,7 @@ int BSP_remove_rtems_irq_handler (const rtems_irq_connect_data* irq) { rtems_irq_connect_data *pchain= NULL, *vchain = NULL; unsigned int level; - + if (!isValidInterrupt(irq->name)) { return 0; } @@ -302,7 +302,7 @@ int BSP_remove_rtems_irq_handler (const rtems_irq_connect_data* irq) } else { - if (rtems_hdl_tbl[irq->name].hdl != irq->hdl) + if (rtems_hdl_tbl[irq->name].hdl != irq->hdl) { _CPU_ISR_Enable(level); return 0; @@ -325,7 +325,7 @@ int BSP_remove_rtems_irq_handler (const rtems_irq_connect_data* irq) /* * disable exception at processor level */ - } + } /* * Disable interrupt on device @@ -394,7 +394,7 @@ int BSP_rtems_irq_mngt_set(rtems_irq_global_settings* config) { rtems_irq_connect_data* vchain; for( vchain = &rtems_hdl_tbl[i]; - ((int)vchain != -1 && vchain->hdl != default_rtems_entry.hdl); + ((int)vchain != -1 && vchain->hdl != default_rtems_entry.hdl); vchain = (rtems_irq_connect_data*)vchain->next_handler ) { vchain->on(vchain); @@ -406,7 +406,7 @@ int BSP_rtems_irq_mngt_set(rtems_irq_global_settings* config) { rtems_irq_connect_data* vchain; for( vchain = &rtems_hdl_tbl[i]; - ((int)vchain != -1 && vchain->hdl != default_rtems_entry.hdl); + ((int)vchain != -1 && vchain->hdl != default_rtems_entry.hdl); vchain = (rtems_irq_connect_data*)vchain->next_handler ) { vchain->off(vchain); @@ -434,7 +434,7 @@ int BSP_rtems_irq_mngt_set(rtems_irq_global_settings* config) { rtems_irq_connect_data* vchain; for( vchain = &rtems_hdl_tbl[i]; - ((int)vchain != -1 && vchain->hdl != default_rtems_entry.hdl); + ((int)vchain != -1 && vchain->hdl != default_rtems_entry.hdl); vchain = (rtems_irq_connect_data*)vchain->next_handler ) { vchain->on(vchain); @@ -447,13 +447,13 @@ int BSP_rtems_irq_mngt_set(rtems_irq_global_settings* config) { rtems_irq_connect_data* vchain; for( vchain = &rtems_hdl_tbl[i]; - ((int)vchain != -1 && vchain->hdl != default_rtems_entry.hdl); + ((int)vchain != -1 && vchain->hdl != default_rtems_entry.hdl); vchain = (rtems_irq_connect_data*)vchain->next_handler ) { vchain->off(vchain); } } - + openpic_disable_irq ((int) i - BSP_PCI_IRQ_LOWEST_OFFSET); } } @@ -470,7 +470,7 @@ int BSP_rtems_irq_mngt_set(rtems_irq_global_settings* config) { rtems_irq_connect_data* vchain; for( vchain = &rtems_hdl_tbl[i]; - ((int)vchain != -1 && vchain->hdl != default_rtems_entry.hdl); + ((int)vchain != -1 && vchain->hdl != default_rtems_entry.hdl); vchain = (rtems_irq_connect_data*)vchain->next_handler ) { vchain->on(vchain); @@ -483,7 +483,7 @@ int BSP_rtems_irq_mngt_set(rtems_irq_global_settings* config) { rtems_irq_connect_data* vchain; for( vchain = &rtems_hdl_tbl[i]; - ((int)vchain != -1 && vchain->hdl != default_rtems_entry.hdl); + ((int)vchain != -1 && vchain->hdl != default_rtems_entry.hdl); vchain = (rtems_irq_connect_data*)vchain->next_handler ) { vchain->off(vchain); @@ -500,10 +500,10 @@ int BSP_rtems_irq_mngt_get(rtems_irq_global_settings** config) { *config = internal_config; return 0; -} +} int _BSP_vme_bridge_irq = -1; - + unsigned BSP_spuriousIntr = 0; /* * High level IRQ handler called from shared_raw_irq_code_entry @@ -522,12 +522,12 @@ void C_dispatch_irq_handler (CPU_Interrupt_frame *frame, unsigned int excNum) _CPU_MSR_GET(msr); new_msr = msr | MSR_EE; _CPU_MSR_SET(new_msr); - + rtems_hdl_tbl[BSP_DECREMENTER].hdl(); _CPU_MSR_SET(msr); return; - + } irq = openpic_irq(0); if (irq == OPENPIC_VEC_SPURIOUS) { @@ -554,7 +554,7 @@ void C_dispatch_irq_handler (CPU_Interrupt_frame *frame, unsigned int excNum) _CPU_MSR_GET(msr); new_msr = msr | MSR_EE; _CPU_MSR_SET(new_msr); - + /* rtems_hdl_tbl[irq].hdl(); */ { rtems_irq_connect_data* vchain; @@ -585,9 +585,9 @@ void C_dispatch_irq_handler (CPU_Interrupt_frame *frame, unsigned int excNum) openpic_eoi(0); } } - - - + + + void _ThreadProcessSignalsFromIrq (BSP_Exception_frame* ctx) { /* diff --git a/c/src/lib/libbsp/powerpc/shared/irq/irq.h b/c/src/lib/libbsp/powerpc/shared/irq/irq.h index 9d1fab5102..f2457d36e5 100644 --- a/c/src/lib/libbsp/powerpc/shared/irq/irq.h +++ b/c/src/lib/libbsp/powerpc/shared/irq/irq.h @@ -104,7 +104,7 @@ typedef enum { BSP_MAX_OFFSET = BSP_MISC_IRQ_MAX_OFFSET, /* * Some ISA IRQ symbolic name definition - */ + */ BSP_ISA_PERIODIC_TIMER = 0, BSP_ISA_KEYBOARD = 1, @@ -114,7 +114,7 @@ typedef enum { BSP_ISA_UART_COM1_IRQ = 4, BSP_ISA_RT_TIMER1 = 8, - + BSP_ISA_RT_TIMER3 = 10, /* * Some PCI IRQ symbolic name definition @@ -125,10 +125,10 @@ typedef enum { * Some Processor execption handled as rtems IRQ symbolic name definition */ BSP_DECREMENTER = BSP_PROCESSOR_IRQ_LOWEST_OFFSET - + }rtems_irq_symbolic_name; - + /* @@ -162,9 +162,9 @@ typedef struct __rtems_irq_connect_data__ { * It is usually called immediately AFTER connecting the interrupt handler. * RTEMS may well need such a function when restoring normal interrupt * processing after a debug session. - * + * */ - rtems_irq_enable on; + rtems_irq_enable on; /* * function for disabling interrupts at device level (ONLY!). * The code will disable it at i8259s level. RATIONALE : anyway @@ -205,7 +205,7 @@ typedef struct { rtems_irq_symbolic_name irqBase; /* * software priorities associated with interrupts. - * if irqPrio [i] > intrPrio [j] it means that + * if irqPrio [i] > intrPrio [j] it means that * interrupt handler hdl connected for interrupt name i * will not be interrupted by the handler connected for interrupt j * The interrupt source will be physically masked at i8259 level. @@ -282,7 +282,7 @@ int BSP_irq_enabled_at_i8259s (const rtems_irq_symbolic_name irqLine); * 4) perform rescheduling when necessary, * 5) restore the C scratch registers... * 6) restore initial execution flow - * + * */ int BSP_install_rtems_irq_handler (const rtems_irq_connect_data*); int BSP_install_rtems_shared_irq_handler (const rtems_irq_connect_data*); @@ -329,7 +329,7 @@ int BSP_rtems_irq_mngt_set(rtems_irq_global_settings* config); * (Re) get info on current RTEMS interrupt management. */ int BSP_rtems_irq_mngt_get(rtems_irq_global_settings**); - + extern void BSP_rtems_irq_mng_init(unsigned cpuId); extern void BSP_i8259s_init(void); diff --git a/c/src/lib/libbsp/powerpc/shared/irq/irq_asm.S b/c/src/lib/libbsp/powerpc/shared/irq/irq_asm.S index 6faaf9f587..7eb018d606 100644 --- a/c/src/lib/libbsp/powerpc/shared/irq/irq_asm.S +++ b/c/src/lib/libbsp/powerpc/shared/irq/irq_asm.S @@ -1,5 +1,5 @@ /* - * This file contains the assembly code for the PowerPC + * This file contains the assembly code for the PowerPC * IRQ veneers for RTEMS. * * The license and distribution terms for this file may be @@ -15,22 +15,22 @@ * * $Id$ */ - + #include <rtems/asm.h> #include <rtems/score/cpu.h> #include <bsp/vectors.h> #include <libcpu/raw_exception.h> - + #define SYNC \ sync; \ isync - + .text - .p2align 5 - + .p2align 5 + PUBLIC_VAR(decrementer_exception_vector_prolog_code) - + SYM (decrementer_exception_vector_prolog_code): /* * let room for exception frame @@ -41,11 +41,11 @@ SYM (decrementer_exception_vector_prolog_code): ba shared_raw_irq_code_entry PUBLIC_VAR (decrementer_exception_vector_prolog_code_size) - + decrementer_exception_vector_prolog_code_size = . - decrementer_exception_vector_prolog_code PUBLIC_VAR(external_exception_vector_prolog_code) - + SYM (external_exception_vector_prolog_code): /* * let room for exception frame @@ -56,12 +56,12 @@ SYM (external_exception_vector_prolog_code): ba shared_raw_irq_code_entry PUBLIC_VAR (external_exception_vector_prolog_code_size) - + external_exception_vector_prolog_code_size = . - external_exception_vector_prolog_code PUBLIC_VAR(shared_raw_irq_code_entry) PUBLIC_VAR(C_dispatch_irq_handler) - + .p2align 5 SYM (shared_raw_irq_code_entry): /* @@ -72,7 +72,7 @@ SYM (shared_raw_irq_code_entry): * R4 : vector number */ /* - * Save SRR0/SRR1 As soon As possible as it is the minimal needed + * Save SRR0/SRR1 As soon As possible as it is the minimal needed * to reenable exception processing */ stw r0, GPR0_OFFSET(r1) @@ -81,10 +81,10 @@ SYM (shared_raw_irq_code_entry): */ stw r2, GPR2_OFFSET(r1) stw r3, GPR3_OFFSET(r1) - + mfsrr0 r0 mfsrr1 r3 - + stw r0, SRR0_FRAME_OFFSET(r1) stw r3, SRR1_FRAME_OFFSET(r1) @@ -123,7 +123,7 @@ SYM (shared_raw_irq_code_entry): mfctr r6 mfxer r7 mflr r8 - + stw r5, EXC_CR_OFFSET(r1) stw r6, EXC_CTR_OFFSET(r1) stw r7, EXC_XER_OFFSET(r1) @@ -161,9 +161,9 @@ SYM (shared_raw_irq_code_entry): cmpwi r3,0 bne nested mfspr r1, SPRG1 - -nested: - /* + +nested: + /* * Start Incrementing nesting level in R3 */ addi r3,r3,1 @@ -180,7 +180,7 @@ nested: /* store new nesting level in _ISR_Nest_level */ stw r3, _ISR_Nest_level@l(r7) #endif - + addi r6, r6, 1 mfmsr r5 /* @@ -190,7 +190,7 @@ nested: /* * We are now running on the interrupt stack. External and decrementer * exceptions are still disabled. I see no purpose trying to optimize - * further assembler code. + * further assembler code. */ /* * Call C exception handler for decrementer Interrupt frame is passed just @@ -199,7 +199,7 @@ nested: addi r3, r14, 0x8 bl C_dispatch_irq_handler /* C_dispatch_irq_handler(cpu_interrupt_frame* r3, vector r4) */ /* - * start decrementing nesting level. Note : do not test result against 0 + * start decrementing nesting level. Note : do not test result against 0 * value as an easy exit condition because if interrupt nesting level > 1 * then _Thread_Dispatch_disable_level > 1 */ @@ -223,7 +223,7 @@ nested: stw r3,_Thread_Dispatch_disable_level@l(r15) /* End decrementing _Thread_Dispatch_disable_level */ cmpwi r3, 0 /* - * switch back to original stack (done here just optimize registers + * switch back to original stack (done here just optimize registers * contention. Could have been done before...) */ addi r1, r14, 0 @@ -231,14 +231,14 @@ nested: /* * Here we are running again on the thread system stack. * We have interrupt nesting level = _Thread_Dispatch_disable_level = 0. - * Interrupt are still disabled. Time to check if scheduler request to + * Interrupt are still disabled. Time to check if scheduler request to * do something with the current thread... */ addis r4, 0, _Context_Switch_necessary@ha lwz r5, _Context_Switch_necessary@l(r4) cmpwi r5, 0 bne switch - + addis r6, 0, _ISR_Signals_to_thread_executing@ha lwz r7, _ISR_Signals_to_thread_executing@l(r6) cmpwi r7, 0 @@ -270,12 +270,12 @@ nested: lwz r30, EXC_XER_OFFSET(r1) lwz r29, EXC_CR_OFFSET(r1) lwz r28, EXC_LR_OFFSET(r1) - + mtctr r31 mtxer r30 mtcr r29 mtlr r28 - + lmw r4, GPR4_OFFSET(r1) lwz r2, GPR2_OFFSET(r1) lwz r0, GPR0_OFFSET(r1) @@ -290,21 +290,21 @@ nested: /* * Restore rfi related settings */ - + lwz r3, SRR1_FRAME_OFFSET(r1) mtsrr1 r3 lwz r3, SRR0_FRAME_OFFSET(r1) mtsrr0 r3 - + lwz r3, GPR3_OFFSET(r1) addi r1,r1, EXCEPTION_FRAME_END SYNC rfi - + switch: bl SYM (_Thread_Dispatch) - -easy_exit: + +easy_exit: /* * start restoring interrupt frame */ @@ -312,7 +312,7 @@ easy_exit: lwz r4, EXC_XER_OFFSET(r1) lwz r5, EXC_CR_OFFSET(r1) lwz r6, EXC_LR_OFFSET(r1) - + mtctr r3 mtxer r4 mtcr r5 @@ -341,7 +341,7 @@ easy_exit: /* * Restore rfi related settings */ - + lwz r4, SRR1_FRAME_OFFSET(r1) lwz r3, SRR0_FRAME_OFFSET(r1) lwz r2, GPR2_OFFSET(r1) diff --git a/c/src/lib/libbsp/powerpc/shared/irq/irq_init.c b/c/src/lib/libbsp/powerpc/shared/irq/irq_init.c index 5d14948608..c8de84c5e9 100644 --- a/c/src/lib/libbsp/powerpc/shared/irq/irq_init.c +++ b/c/src/lib/libbsp/powerpc/shared/irq/irq_init.c @@ -125,25 +125,25 @@ void VIA_isa_bridge_interrupts_setup(void) maxBus = BusCountPCI(); pci_dev.function = 0; /* Assumes the bidge is the first function */ - + for (pci_dev.bus = 0; pci_dev.bus < maxBus; pci_dev.bus++) { -#ifdef SCAN_PCI_PRINT +#ifdef SCAN_PCI_PRINT printk("isa_bridge_interrupts_setup: Scanning bus %d\n", pci_dev.bus); -#endif +#endif for (pci_dev.device = 0; pci_dev.device < PCI_MAX_DEVICES; pci_dev.device++) { -#ifdef SCAN_PCI_PRINT +#ifdef SCAN_PCI_PRINT printk("isa_bridge_interrupts_setup: Scanning device %d\n", pci_dev.device); -#endif +#endif pci_read_config_dword(pci_dev.bus, pci_dev.device, pci_dev.function, PCI_VENDOR_ID, &temp); -#ifdef SCAN_PCI_PRINT +#ifdef SCAN_PCI_PRINT printk("Vendor/device = %x\n", temp); #endif if ((temp == (((unsigned short) PCI_VENDOR_ID_VIA) | (PCI_DEVICE_ID_VIA_82C586_0 << 16))) ) { bridge = pci_dev; via_82c586 = &bridge; -#ifdef SHOW_ISA_PCI_BRIDGE_SETTINGS +#ifdef SHOW_ISA_PCI_BRIDGE_SETTINGS /* * Should print : bus = 0, device = 11, function = 0 on a MCP750. */ @@ -151,27 +151,27 @@ void VIA_isa_bridge_interrupts_setup(void) via_82c586->bus, via_82c586->device, via_82c586->function); -#endif +#endif found = 1; goto loop_exit; - + } } } loop_exit: if (!found) BSP_panic("VIA_82C586 PCI/ISA bridge not found!n"); - + tmp = inb(0x810); if ( !(tmp & 0x2)) { -#ifdef SHOW_ISA_PCI_BRIDGE_SETTINGS +#ifdef SHOW_ISA_PCI_BRIDGE_SETTINGS printk("This is a second generation MCP750 board\n"); printk("We must reprogram the PCI/ISA bridge...\n"); -#endif +#endif pci_read_config_byte(via_82c586->bus, via_82c586->device, via_82c586->function, 0x47, &tmp); -#ifdef SHOW_ISA_PCI_BRIDGE_SETTINGS +#ifdef SHOW_ISA_PCI_BRIDGE_SETTINGS printk(" PCI ISA bridge control2 = %x\n", (unsigned) tmp); -#endif +#endif /* * Enable 4D0/4D1 ISA interrupt level/edge config registers */ @@ -190,31 +190,31 @@ loop_exit: */ pci_read_config_byte(via_82c586->bus, via_82c586->device, via_82c586->function, 0x54, &tmp); -#ifdef SHOW_ISA_PCI_BRIDGE_SETTINGS +#ifdef SHOW_ISA_PCI_BRIDGE_SETTINGS printk(" PCI ISA bridge PCI/IRQ Edge/Level Select = %x\n", (unsigned) tmp); -#endif +#endif tmp = 0; pci_write_config_byte(via_82c586->bus, via_82c586->device, via_82c586->function, 0x54, tmp); } else { -#ifdef SHOW_ISA_PCI_BRIDGE_SETTINGS +#ifdef SHOW_ISA_PCI_BRIDGE_SETTINGS printk("This is a first generation MCP750 board\n"); printk("We just show the actual value used by PCI/ISA bridge\n"); -#endif +#endif pci_read_config_byte(via_82c586->bus, via_82c586->device, via_82c586->function, 0x47, &tmp); -#ifdef SHOW_ISA_PCI_BRIDGE_SETTINGS +#ifdef SHOW_ISA_PCI_BRIDGE_SETTINGS printk(" PCI ISA bridge control2 = %x\n", (unsigned) tmp); -#endif +#endif /* * Show the Interrupt inputs inverting/non-inverting level status */ pci_read_config_byte(via_82c586->bus, via_82c586->device, via_82c586->function, 0x54, &tmp); -#ifdef SHOW_ISA_PCI_BRIDGE_SETTINGS +#ifdef SHOW_ISA_PCI_BRIDGE_SETTINGS printk(" PCI ISA bridge PCI/IRQ Edge/Level Select = %x\n", (unsigned) tmp); -#endif +#endif } } @@ -229,15 +229,15 @@ void BSP_rtems_irq_mng_init(unsigned cpuId) rtems_raw_except_connect_data vectorDesc; int known_cpi_isa_bridge = 0; int i; - + /* * First initialize the Interrupt management hardware */ -#ifdef TRACE_IRQ_INIT +#ifdef TRACE_IRQ_INIT printk("Going to initialize raven interrupt controller (openpic compliant)\n"); -#endif +#endif openpic_init(1, mcp750_openpic_initpolarities, mcp750_openpic_initsenses); -#ifdef TRACE_IRQ_INIT +#ifdef TRACE_IRQ_INIT printk("Going to initialize the PCI/ISA bridge IRQ related setting (VIA 82C586)\n"); #endif if ( currentBoard == MESQUITE ) { @@ -258,9 +258,9 @@ void BSP_rtems_irq_mng_init(unsigned cpuId) printk("If your card works correctly please add a test and set known_cpi_isa_bridge to true\n"); printk("currentBoard = %i\n", currentBoard); } -#ifdef TRACE_IRQ_INIT +#ifdef TRACE_IRQ_INIT printk("Going to initialize the ISA PC legacy IRQ management hardware\n"); -#endif +#endif BSP_i8259s_init(); /* * Initialize Rtems management interrupt table @@ -287,7 +287,7 @@ void BSP_rtems_irq_mng_init(unsigned cpuId) */ BSP_panic("Unable to initialize RTEMS interrupt Management!!! System locked\n"); } - + /* * We must connect the raw irq handler for the two * expected interrupt sources : decrementer and external interrupts. @@ -309,7 +309,7 @@ void BSP_rtems_irq_mng_init(unsigned cpuId) if (!mpc60x_set_exception (&vectorDesc)) { BSP_panic("Unable to initialize RTEMS external raw exception\n"); } -#ifdef TRACE_IRQ_INIT +#ifdef TRACE_IRQ_INIT printk("RTEMS IRQ management is now operationnal\n"); #endif } |