2008-09-30 Jennifer Averett <jennifer.averett@oarcorp.com>

	* Makefile.am, preinstall.am, PCI_bus/universe.c, console/console.c,
	include/bsp.h, irq/FPGA.c, irq/irq.c, startup/Hwr_init.c,
	startup/bspstart.c, startup/vmeintr.c: Modifications required to run
	on hardware. Some cleanup.

3 files changed, 28 insertions, 204 deletions

diff --git a/c/src/lib/libbsp/powerpc/score603e/startup/Hwr_init.c b/c/src/lib/libbsp/powerpc/score603e/startup/Hwr_init.c
index 6fb0cc6e6b..dc942e873a 100644
--- a/c/src/lib/libbsp/powerpc/score603e/startup/Hwr_init.c
+++ b/c/src/lib/libbsp/powerpc/score603e/startup/Hwr_init.c
@@ -80,70 +80,10 @@ void init_RTC(void)
 
 void init_PCI(void)
 {
-#if (SCORE603E_USE_SDS) | (SCORE603E_USE_OPEN_FIRMWARE) | (SCORE603E_USE_NONE)
-  uint32_t         value;
-
- /*
-  * NOTE:  Accessing any memory location not mapped by the BAT
-  * registers will cause a TLB miss exception.
-  * Set the DBAT1 to be configured for 256M of PCI MEM
-  * at 0xC0000000 with Write-through and Guarded Attributed and
-  * read/write access allowed
-  */
-
- /* load DBAT1U (spr538) - 256Mbytes, User, Super */
-  value = SCORE603E_PCI_MEM_BASE | 0x1FFF;
-  asm volatile(
-    "isync;"
-    "mtspr 538, %0"
-    : "=r" (value)
-    : "0" (value)
-  );
-
-  /* load DBAT1L (spr539) - Write-through, Guarded and Read/Write */
-  value = SCORE603E_PCI_MEM_BASE | 0x0002;
-  asm volatile (
-      "mtspr 539, %0;"
-      "isync"
-      : "=r" (value)
-      : "0" (value)
-  );
-
-#elif (SCORE603E_USE_DINK)
   /* DINK Monitor setsup and uses all 4 BAT registers.  */
   /* The fourth BAT register can be modified to access this area */
 
-#if (0)
- /*
-  * NOTE:  Accessing any memory location not mapped by the BAT
-  * registers will cause a TLB miss exception.
-  * Set the DBAT3 to be configured for 256M of PCI MEM
-  * at 0xC0000000 with Write-through and Guarded Attributed and
-  * read/write access allowed
-  */
-
- /* load DBAT3U (spr542) - 256Mbytes, User, Super */
-  value = SCORE603E_PCI_MEM_BASE | 0x1FFF;
-  asm volatile(
-    "isync;"
-    "mtspr 542, %0"
-    : "=r" (value)
-    : "0" (value)
-  );
-
-  /* load DBAT3L (spr543) - Write-through, Guarded and Read/Write */
-  value = SCORE603E_PCI_MEM_BASE | 0x0002;
-  asm volatile (
-      "mtspr 543, %0;"
-      "isync"
-      : "=r" (value)
-      : "0" (value)
-  );
-#endif
-
-#else
-#error "SCORE603E BSPSTART.C -- what ROM monitor are you using"
-#endif
+  printk("init_PCI:\n");
 }
 
 #define PPC_Get_HID0( _value ) \
diff --git a/c/src/lib/libbsp/powerpc/score603e/startup/bspstart.c b/c/src/lib/libbsp/powerpc/score603e/startup/bspstart.c
index 01e1827964..c7c43285f8 100644
--- a/c/src/lib/libbsp/powerpc/score603e/startup/bspstart.c
+++ b/c/src/lib/libbsp/powerpc/score603e/startup/bspstart.c
@@ -47,7 +47,7 @@ unsigned int BSP_processor_frequency; /* XXX - Set this based upon the Score boa
 /*
  * Time base divisior (how many tick for 1 second).
  */
-unsigned int BSP_time_base_divisor = 1000;  /* XXX - Just a guess */
+unsigned int BSP_time_base_divisor = 4000;
 
 extern unsigned long __rtems_end[];
 
@@ -79,17 +79,6 @@ void initialize_PMC();
 
 void bsp_predriver_hook(void)
 {
-  #if DEBUG
-    printk("bsp_predriver_hook: init_RTC\n");
-  #endif
-  init_RTC();
-  init_PCI();
-  initialize_universe();
-
-  #if DEBUG
-    printk("bsp_predriver_hook: initialize_PCI_bridge\n");
-  #endif
-  initialize_PCI_bridge ();
 
 #if (HAS_PMC_PSC8)
   #if DEBUG
@@ -98,29 +87,6 @@ void bsp_predriver_hook(void)
   initialize_PMC();
 #endif
 
-#if 0
- /*
-  * Initialize Bsp General purpose vector table.
-  */
-  #if DEBUG
-    printk("bsp_predriver_hook: initialize_external_exception_vector\n");
-  #endif
- initialize_external_exception_vector();
-#endif
-
-#if (0)
-  /*
-   * XXX - Modify this to write a 48000000 (loop to self) command
-   *       to each interrupt location.  This is better for debug.
-   */
-  #if DEBUG
-    printk("bsp_predriver_hook: bsp_spurious_initialize\n");
-  #endif
- bsp_spurious_initialize();
-#endif
-
-  ShowBATS();
-
   #if DEBUG
     printk("bsp_predriver_hook: End of routine\n");
   #endif
@@ -133,64 +99,35 @@ void bsp_predriver_hook(void)
  */
 
 void initialize_PMC() {
-  volatile uint32_t         *PMC_addr;
-  uint8_t          data;
-
-#if (0) /* First Values sent */
-  /*
-   * set PMC base address.
-   */
-  PMC_addr  = BSP_PCI_DEVICE_ADDRESS( 0x14 );
-  *PMC_addr = (BSP_PCI_REGISTER_BASE >> 24) & 0x3f;
+  volatile uint32_t     *PMC_addr;
+  uint32_t               data;
 
   /*
    * Clear status, enable SERR and memory space only.
    */
   PMC_addr = BSP_PCI_DEVICE_ADDRESS( 0x4 );
-  *PMC_addr = 0x0201ff37;
-
-  /*
-   * Bit 0 and 1 HI cause Medium Loopback to occur.
-   */
-  PMC_addr = (volatile uint32_t*)
-        BSP_PMC_SERIAL_ADDRESS( 0x100000 );
-  data = *PMC_addr;
-  /*   *PMC_addr = data | 0x3;  */
-  *PMC_addr = data & 0xfc;
-
-#endif
-
-#if (1)
-
-  /*
-   * Clear status, enable SERR and memory space only.
-   */
+  *PMC_addr = 0x020080cc;
   #if DEBUG
-    printk("initialize_PMC: set Device Address 0x4 \n");
-  ShowBATS();
+    printk("initialize_PMC: 0x%x = 0x%x\n", PMC_addr, 0x020080cc);
   #endif
-  PMC_addr = BSP_PCI_DEVICE_ADDRESS( 0x4 );
-  *PMC_addr = 0x020080cc;
 
   /*
    * set PMC base address.
    */
-  #if DEBUG
-    printk("initialize_PMC: set Device Address 0x14 \n");
-  ShowBATS();
-  #endif
   PMC_addr  = BSP_PCI_DEVICE_ADDRESS( 0x14 );
   *PMC_addr = (BSP_PCI_REGISTER_BASE >> 24) & 0x3f;
-
   #if DEBUG
-    printk("initialize_PMC: set PMC Serial Address 0x100000\n");
+    printk("initialize_PMC: 0x%x = 0x%x\n", PMC_addr, ((BSP_PCI_REGISTER_BASE >> 24) & 0x3f));
   #endif
+
    PMC_addr = (volatile uint32_t*)
       BSP_PMC_SERIAL_ADDRESS( 0x100000 );
   data = *PMC_addr;
+  #if DEBUG
+    printk("initialize_PMC: Read 0x%x (0x%x)\n", PMC_addr, data );
+    printk("initialize_PMC: Read 0x%x (0x%x)\n", PMC_addr, data & 0xfc );
+  #endif
   *PMC_addr = data & 0xfc;
-
-#endif
 }
 
 /*PAGE
@@ -247,7 +184,6 @@ void bsp_start( void )
    */
   #if DEBUG
     printk("bsp_start: Zero out lots of memory\n");
-    ShowBATS();
   #endif
 
   memset(
@@ -266,6 +202,8 @@ void bsp_start( void )
    */
   myCpu         = get_ppc_cpu_type();
   myCpuRevision = get_ppc_cpu_revision();
+  printk("Cpu: 0x%x  Revision: %d\n", myCpu, myCpuRevision);
+  printk("Cpu %s\n", get_ppc_cpu_type_name(myCpu) );
 
   /*
    * Initialize the interrupt related settings.
@@ -279,75 +217,27 @@ void bsp_start( void )
   /*
    * Initialize default raw exception handlers.
    */
-printk("ppc_exc_initialize\n");
   ppc_exc_initialize(
     PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
     intrStackStart,
     intrStackSize
   );
-
-  /*
-   *  There are multiple ROM monitors available for this board.
-   */
-#if (SCORE603E_USE_SDS)
   #if DEBUG
-    printk("bsp_start: USE SDS\n");
+    printk("bsp_predriver_hook: init_RTC\n");
   #endif
 
+/*   init_RTC(); */
+  init_PCI();
+  initialize_universe();
 
-  /*
-   * Write instruction for Unconditional Branch to ROM vector.
-   */
-
-   Code = 0x4bf00002;
-   for (Address = 0x100; Address <= 0xe00; Address += 0x100) {
-     A_Vector = (uint32_t*)Address;
-     Code = 0x4bf00002 + Address;
-     *A_Vector = Code;
-   }
-
-   for (Address = 0x1000; Address <= 0x1400; Address += 0x100) {
-     A_Vector = (uint32_t*)Address;
-     Code = 0x4bf00002 + Address;
-     *A_Vector = Code;
-   }
-
-  msr_value = 0x2030;
-
-#elif (SCORE603E_USE_OPEN_FIRMWARE)
   #if DEBUG
-    printk("bsp_start: USE OPEN FIRMWARE\n");
+    printk("bsp_predriver_hook: initialize_PCI_bridge\n");
   #endif
-  msr_value = 0x2030;
+  initialize_PCI_bridge ();
 
-#elif (SCORE603E_USE_NONE)
-  #if DEBUG
-    printk("bsp_start: USE NONE\n");
-  #endif
   msr_value = 0x2030;
   _CPU_MSR_SET( msr_value );
-  bsp_set_trap_vectors();
 
-#elif (SCORE603E_USE_DINK)
-  #if DEBUG
-    printk("bsp_start: USE DINK\n");
-  #endif
-  msr_value = 0x2030;
-  _CPU_MSR_SET( msr_value );
-
-  /*
-   * Override the DINK error on a Decrementor interrupt.
-   */
-  /* org    dec_vector  - rfi */
-  ptr = (uint32_t*)0x900;
-  *ptr = 0x4c000064;
-
-#else
-  #if DEBUG
-    printk("bsp_start: ERROR unknow ROM Monitor\n");
-  #endif
-#error "SCORE603E BSPSTART.C -- what ROM monitor are you using"
-#endif
 
   _CPU_MSR_SET( msr_value );
 
@@ -369,6 +259,12 @@ printk("ppc_exc_initialize\n");
     printk("bsp_start: END PPC_USE_DATA_CACHE\n");
   #endif
 #endif
+
+  /* Initalize interrupt support */
+  if (bsp_interrupt_initialize() != RTEMS_SUCCESSFUL) {
+    BSP_panic( "Cannot intitialize interrupt support\n");
+  }
+
   #if DEBUG
     printk("bsp_start: end BSPSTART\n");
   ShowBATS();
diff --git a/c/src/lib/libbsp/powerpc/score603e/startup/vmeintr.c b/c/src/lib/libbsp/powerpc/score603e/startup/vmeintr.c
index 8e2f334881..db325333e5 100644
--- a/c/src/lib/libbsp/powerpc/score603e/startup/vmeintr.c
+++ b/c/src/lib/libbsp/powerpc/score603e/startup/vmeintr.c
@@ -26,18 +26,12 @@ void VME_interrupt_Disable (
   VME_interrupt_Mask                mask                        /* IN  */
 )
 {
-  volatile uint8_t          *VME_interrupt_enable;
-  uint8_t          value;
+  volatile uint8_t  *VME_interrupt_enable;
+  uint8_t           value;
 
-#if 0
-  VME_interrupt_enable = ACC_VIE;
-#else
   VME_interrupt_enable = 0;
-#endif
   value = *VME_interrupt_enable;
-
   value &= ~mask;  /* turn off interrupts for all levels in mask */
-
   *VME_interrupt_enable = value;
 }
 
@@ -54,14 +48,8 @@ void VME_interrupt_Enable (
   volatile uint8_t          *VME_interrupt_enable;
   uint8_t          value;
 
-#if 0
-  VME_interrupt_enable = ACC_VIE;
-#else
   VME_interrupt_enable = 0;
-#endif
   value = *VME_interrupt_enable;
-
   value |= mask;  /* turn on interrupts for all levels in mask */
-
   *VME_interrupt_enable = value;
 }