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authorRalf Corsepius <ralf.corsepius@rtems.org>2004-03-31 03:47:07 +0000
committerRalf Corsepius <ralf.corsepius@rtems.org>2004-03-31 03:47:07 +0000
commitdac42086c9fcf9bd9ac71cb3fed02990959ab8fe (patch)
treeaa2cab2b917f07ee37c52a661bf988fff2de2407 /c/src/lib/libbsp/powerpc/score603e/include/gen2.h
parent2004-03-31 Ralf Corsepius <ralf_corsepius@rtems.org> (diff)
downloadrtems-dac42086c9fcf9bd9ac71cb3fed02990959ab8fe.tar.bz2
2004-03-31 Ralf Corsepius <ralf_corsepius@rtems.org>
* PCI_bus/PCI.c, PCI_bus/PCI.h, PCI_bus/flash.c, PCI_bus/universe.c, clock/clock.c, console/85c30.c, console/console.c, console/consolebsp.h, include/bsp.h, include/gen2.h, startup/FPGA.c, startup/Hwr_init.c, startup/bspstart.c, startup/genpvec.c, startup/spurious.c, startup/vmeintr.c, timer/timer.c, tod/tod.c: Convert to using c99 fixed size types.
Diffstat (limited to 'c/src/lib/libbsp/powerpc/score603e/include/gen2.h')
-rw-r--r--c/src/lib/libbsp/powerpc/score603e/include/gen2.h30
1 files changed, 15 insertions, 15 deletions
diff --git a/c/src/lib/libbsp/powerpc/score603e/include/gen2.h b/c/src/lib/libbsp/powerpc/score603e/include/gen2.h
index f5157dbdff..c1e60fb2bb 100644
--- a/c/src/lib/libbsp/powerpc/score603e/include/gen2.h
+++ b/c/src/lib/libbsp/powerpc/score603e/include/gen2.h
@@ -32,17 +32,17 @@ extern "C" {
#define SCORE603E_TIMER_PORT_B 0xfd000008
#define SCORE603E_TIMER_PORT_A 0xfd000004
-#define SCORE603E_BOARD_CTRL_REG ((volatile rtems_unsigned8 *)0xfd00002c)
+#define SCORE603E_BOARD_CTRL_REG ((volatile uint8_t*)0xfd00002c)
#define SCORE603E_BRD_FLASH_DISABLE_MASK 0x40
-#define SCORE603E_85C30_CTRL_0 ((volatile rtems_unsigned8 *)0xfe200020)
-#define SCORE603E_85C30_DATA_0 ((volatile rtems_unsigned8 *)0xfe200024)
-#define SCORE603E_85C30_CTRL_1 ((volatile rtems_unsigned8 *)0xfe200028)
-#define SCORE603E_85C30_DATA_1 ((volatile rtems_unsigned8 *)0xfe20002c)
-#define SCORE603E_85C30_CTRL_2 ((volatile rtems_unsigned8 *)0xfe200000)
-#define SCORE603E_85C30_DATA_2 ((volatile rtems_unsigned8 *)0xfe200004)
-#define SCORE603E_85C30_CTRL_3 ((volatile rtems_unsigned8 *)0xfe200008)
-#define SCORE603E_85C30_DATA_3 ((volatile rtems_unsigned8 *)0xfe20000c)
+#define SCORE603E_85C30_CTRL_0 ((volatile uint8_t*)0xfe200020)
+#define SCORE603E_85C30_DATA_0 ((volatile uint8_t*)0xfe200024)
+#define SCORE603E_85C30_CTRL_1 ((volatile uint8_t*)0xfe200028)
+#define SCORE603E_85C30_DATA_1 ((volatile uint8_t*)0xfe20002c)
+#define SCORE603E_85C30_CTRL_2 ((volatile uint8_t*)0xfe200000)
+#define SCORE603E_85C30_DATA_2 ((volatile uint8_t*)0xfe200004)
+#define SCORE603E_85C30_CTRL_3 ((volatile uint8_t*)0xfe200008)
+#define SCORE603E_85C30_DATA_3 ((volatile uint8_t*)0xfe20000c)
/*
* PSC8 - PMC Card
@@ -54,11 +54,11 @@ extern "C" {
#define SCORE603E_PCI_REGISTER_BASE 0xfc000000
#define SCORE603E_PCI_DEVICE_ADDRESS( _offset) \
- ((volatile rtems_unsigned32 *)( SCORE603E_PCI_PMC_DEVICE_BASE + _offset ))
+ ((volatile uint32_t*)( SCORE603E_PCI_PMC_DEVICE_BASE + _offset ))
#define SCORE603E_PMC_SERIAL_ADDRESS( _offset ) \
- ((volatile rtems_unsigned8 *)(SCORE603E_PCI_REGISTER_BASE + _offset))
+ ((volatile uint8_t*)(SCORE603E_PCI_REGISTER_BASE + _offset))
/*
* PMC serial channels - (4-7: 232 and 8-11: 422)
@@ -150,10 +150,10 @@ extern "C" {
/*
* FPGA Interupt Address Definations.
*/
-#define SCORE603E_FPGA_VECT_DATA ((volatile rtems_unsigned16 *)0xfd000040)
-#define SCORE603E_FPGA_BIT1_15_0 ((volatile rtems_unsigned16 *)0xfd000044)
-#define SCORE603E_FPGA_MASK_DATA ((volatile rtems_unsigned16 *)0xfd000048)
-#define SCORE603E_FPGA_IRQ_INPUT ((volatile rtems_unsigned16 *)0xfd00004c)
+#define SCORE603E_FPGA_VECT_DATA ((volatile uint16_t*)0xfd000040)
+#define SCORE603E_FPGA_BIT1_15_0 ((volatile uint16_t*)0xfd000044)
+#define SCORE603E_FPGA_MASK_DATA ((volatile uint16_t*)0xfd000048)
+#define SCORE603E_FPGA_IRQ_INPUT ((volatile uint16_t*)0xfd00004c)
/*
* The PMC status word is at the PMC base address