2004-03-31 Ralf Corsepius <ralf_corsepius@rtems.org>

	* PCI_bus/PCI.c, PCI_bus/PCI.h, PCI_bus/flash.c, PCI_bus/universe.c,
	clock/clock.c, console/85c30.c, console/console.c,
	console/consolebsp.h, include/bsp.h, include/gen2.h, startup/FPGA.c,
	startup/Hwr_init.c, startup/bspstart.c, startup/genpvec.c,
	startup/spurious.c, startup/vmeintr.c, timer/timer.c, tod/tod.c:
	Convert to using c99 fixed size types.

2 files changed, 32 insertions, 32 deletions

diff --git a/c/src/lib/libbsp/powerpc/score603e/include/bsp.h b/c/src/lib/libbsp/powerpc/score603e/include/bsp.h
index c741130ab3..992a894b28 100644
--- a/c/src/lib/libbsp/powerpc/score603e/include/bsp.h
+++ b/c/src/lib/libbsp/powerpc/score603e/include/bsp.h
@@ -93,20 +93,20 @@ extern "C" {
 
 #define Cause_tm27_intr()  \
   do { \
-    unsigned32 _clicks = 8; \
+    uint32_t   _clicks = 8; \
     asm volatile( "mtdec %0" : "=r" ((_clicks)) : "r" ((_clicks)) ); \
   } while (0)
 
 
 #define Clear_tm27_intr() \
   do { \
-    unsigned32 _clicks = 0xffffffff; \
+    uint32_t   _clicks = 0xffffffff; \
     asm volatile( "mtdec %0" : "=r" ((_clicks)) : "r" ((_clicks)) ); \
   } while (0)
 
 #define Lower_tm27_intr() \
   do { \
-    unsigned32 _msr = 0; \
+    uint32_t   _msr = 0; \
     _ISR_Set_level( 0 ); \
     asm volatile( "mfmsr %0 ;" : "=r" (_msr) : "r" (_msr) ); \
     _msr |=  0x8002; \
@@ -200,11 +200,11 @@ void data_cache_enable ();
 
 
 void initialize_PCI_bridge ();
-rtems_unsigned16 read_and_clear_irq ();
+uint16_t         read_and_clear_irq ();
 void set_irq_mask(
-  rtems_unsigned16 value
+  uint16_t         value
 );
-rtems_unsigned16 get_irq_mask();
+uint16_t         get_irq_mask();
 
 /*
  * universe.c
@@ -212,27 +212,27 @@ rtems_unsigned16 get_irq_mask();
 void initialize_universe();
 
 void set_irq_mask(
-  rtems_unsigned16 value
+  uint16_t         value
 );
 
-rtems_unsigned16 get_irq_mask();
+uint16_t         get_irq_mask();
 
 void unmask_irq( 
-  rtems_unsigned16 irq_idx
+  uint16_t         irq_idx
 );
 
 void init_irq_data_register();
 
-rtems_unsigned16 read_and_clear_PMC_irq(
-  rtems_unsigned16    irq
+uint16_t         read_and_clear_PMC_irq(
+  uint16_t            irq
 );
 
 rtems_boolean Is_PMC_IRQ(
-  rtems_unsigned32   pmc_irq,
-  rtems_unsigned16   status_word
+  uint32_t           pmc_irq,
+  uint16_t           status_word
 );
 
-rtems_unsigned16 read_and_clear_irq();
+uint16_t         read_and_clear_irq();
 
 /*
  * FPGA.c
@@ -242,11 +242,11 @@ void initialize_PCI_bridge ();
 /* flash.c */
 
 unsigned int SCORE603e_FLASH_Disable(
-  rtems_unsigned32               unused
+  uint32_t                       unused
 );
 unsigned int SCORE603e_FLASH_verify_enable();
 unsigned int SCORE603e_FLASH_Enable_writes(
-  rtems_unsigned32               area        /* Unused  */
+  uint32_t                       area        /* Unused  */
 );
 
 #define Convert_Endian_32( _data ) \
@@ -258,7 +258,7 @@ unsigned int SCORE603e_FLASH_Enable_writes(
 
 extern rtems_configuration_table BSP_Configuration;     /* owned by BSP */
 extern rtems_cpu_table           Cpu_table;             /* owned by BSP */
-extern rtems_unsigned32          bsp_isr_level;
+extern uint32_t                  bsp_isr_level;
 
 #endif /* ASM */
 
diff --git a/c/src/lib/libbsp/powerpc/score603e/include/gen2.h b/c/src/lib/libbsp/powerpc/score603e/include/gen2.h
index f5157dbdff..c1e60fb2bb 100644
--- a/c/src/lib/libbsp/powerpc/score603e/include/gen2.h
+++ b/c/src/lib/libbsp/powerpc/score603e/include/gen2.h
@@ -32,17 +32,17 @@ extern "C" {
 #define SCORE603E_TIMER_PORT_B         0xfd000008
 #define SCORE603E_TIMER_PORT_A         0xfd000004
 
-#define SCORE603E_BOARD_CTRL_REG       ((volatile rtems_unsigned8 *)0xfd00002c)
+#define SCORE603E_BOARD_CTRL_REG       ((volatile uint8_t*)0xfd00002c)
 #define SCORE603E_BRD_FLASH_DISABLE_MASK     0x40
 
-#define SCORE603E_85C30_CTRL_0         ((volatile rtems_unsigned8 *)0xfe200020)
-#define SCORE603E_85C30_DATA_0         ((volatile rtems_unsigned8 *)0xfe200024)
-#define SCORE603E_85C30_CTRL_1         ((volatile rtems_unsigned8 *)0xfe200028)
-#define SCORE603E_85C30_DATA_1         ((volatile rtems_unsigned8 *)0xfe20002c)
-#define SCORE603E_85C30_CTRL_2         ((volatile rtems_unsigned8 *)0xfe200000)
-#define SCORE603E_85C30_DATA_2         ((volatile rtems_unsigned8 *)0xfe200004)
-#define SCORE603E_85C30_CTRL_3         ((volatile rtems_unsigned8 *)0xfe200008)
-#define SCORE603E_85C30_DATA_3         ((volatile rtems_unsigned8 *)0xfe20000c)
+#define SCORE603E_85C30_CTRL_0         ((volatile uint8_t*)0xfe200020)
+#define SCORE603E_85C30_DATA_0         ((volatile uint8_t*)0xfe200024)
+#define SCORE603E_85C30_CTRL_1         ((volatile uint8_t*)0xfe200028)
+#define SCORE603E_85C30_DATA_1         ((volatile uint8_t*)0xfe20002c)
+#define SCORE603E_85C30_CTRL_2         ((volatile uint8_t*)0xfe200000)
+#define SCORE603E_85C30_DATA_2         ((volatile uint8_t*)0xfe200004)
+#define SCORE603E_85C30_CTRL_3         ((volatile uint8_t*)0xfe200008)
+#define SCORE603E_85C30_DATA_3         ((volatile uint8_t*)0xfe20000c)
 
 /*
  * PSC8 - PMC Card 
@@ -54,11 +54,11 @@ extern "C" {
 #define SCORE603E_PCI_REGISTER_BASE        0xfc000000
 
 #define SCORE603E_PCI_DEVICE_ADDRESS( _offset) \
-         ((volatile rtems_unsigned32 *)( SCORE603E_PCI_PMC_DEVICE_BASE + _offset ))
+         ((volatile uint32_t*)( SCORE603E_PCI_PMC_DEVICE_BASE + _offset ))
   
 
 #define SCORE603E_PMC_SERIAL_ADDRESS( _offset )    \
-        ((volatile rtems_unsigned8 *)(SCORE603E_PCI_REGISTER_BASE + _offset))
+        ((volatile uint8_t*)(SCORE603E_PCI_REGISTER_BASE + _offset))
 
 /*
  * PMC serial channels - (4-7: 232 and 8-11: 422)
@@ -150,10 +150,10 @@ extern "C" {
 /*
  * FPGA Interupt Address Definations.
  */
-#define SCORE603E_FPGA_VECT_DATA    ((volatile rtems_unsigned16 *)0xfd000040)
-#define SCORE603E_FPGA_BIT1_15_0    ((volatile rtems_unsigned16 *)0xfd000044)
-#define SCORE603E_FPGA_MASK_DATA    ((volatile rtems_unsigned16 *)0xfd000048)
-#define SCORE603E_FPGA_IRQ_INPUT    ((volatile rtems_unsigned16 *)0xfd00004c)
+#define SCORE603E_FPGA_VECT_DATA    ((volatile uint16_t*)0xfd000040)
+#define SCORE603E_FPGA_BIT1_15_0    ((volatile uint16_t*)0xfd000044)
+#define SCORE603E_FPGA_MASK_DATA    ((volatile uint16_t*)0xfd000048)
+#define SCORE603E_FPGA_IRQ_INPUT    ((volatile uint16_t*)0xfd00004c)
 
 /*
  * The PMC status word is at the PMC base address