Remove stray white spaces.

4 files changed, 83 insertions, 83 deletions

diff --git a/c/src/lib/libbsp/powerpc/mpc8260ads/irq/irq.c b/c/src/lib/libbsp/powerpc/mpc8260ads/irq/irq.c
index 17fddf21a1..7de64a8884 100644
--- a/c/src/lib/libbsp/powerpc/mpc8260ads/irq/irq.c
+++ b/c/src/lib/libbsp/powerpc/mpc8260ads/irq/irq.c
@@ -16,7 +16,7 @@
  *
  *  $Id$
  */
-  
+
 #include <bsp.h>
 #include <bsp/irq.h>
 #include <rtems.h>
@@ -146,7 +146,7 @@ static m82xxIrqMasks_t SIU_MaskBit[BSP_CPM_IRQ_NUMBER] =
 void dump_irq_masks(void )
 {
 	int i;
-	for( i=0; i<BSP_CPM_IRQ_NUMBER;i++ )	
+	for( i=0; i<BSP_CPM_IRQ_NUMBER;i++ )
 	{
 		printk( "%04d: %08X %08X\n",
 	 		i,
@@ -172,9 +172,9 @@ static void compute_SIU_IvectMask_from_prio ()
 	 * correspond to the priorities defined
 	 * for the SIU in irq_init.c.
 	 */
-	
+
 	 int i,j;
-	
+
 	 for( i=0; i<BSP_CPM_IRQ_NUMBER; i++ )
 	 {
 	 	for( j=0;j<BSP_CPM_IRQ_NUMBER; j++ )
@@ -182,9 +182,9 @@ static void compute_SIU_IvectMask_from_prio ()
 		 	{
 				SIU_MaskBit[i].priority_h |= SIU_MaskBit[j].mask_h;
 				SIU_MaskBit[i].priority_l |= SIU_MaskBit[j].mask_l;
-			}		 		
+			}
 	 }
-	
+
 }
 
 /*
@@ -217,10 +217,10 @@ int BSP_irq_enable_at_cpm(const rtems_irq_symbolic_name irqLine)
 int BSP_irq_disable_at_cpm(const rtems_irq_symbolic_name irqLine)
 {
 	int cpm_irq_index;
-  
+
 	if (!is_cpm_irq(irqLine))
 		return 1;
-  
+
 	cpm_irq_index = ((int) (irqLine) - BSP_CPM_IRQ_LOWEST_OFFSET);
 
 	m8260.simr_h &= ~(SIU_MaskBit[cpm_irq_index].mask_h);
@@ -233,10 +233,10 @@ int BSP_irq_disable_at_cpm(const rtems_irq_symbolic_name irqLine)
 int BSP_irq_enabled_at_cpm(const rtems_irq_symbolic_name irqLine)
 {
 	int cpm_irq_index;
-  
+
 	if (!is_cpm_irq(irqLine))
 		return 0;
-  
+
 	cpm_irq_index = ((int) (irqLine) - BSP_CPM_IRQ_LOWEST_OFFSET);
 
 	return ((m8260.simr_h & SIU_MaskBit[cpm_irq_index].mask_h) ||
@@ -274,7 +274,7 @@ int BSP_install_rtems_irq_handler  (const rtems_irq_connect_data* irq)
 	 * store the data provided by user
 	 */
 	rtems_hdl_tbl[irq->name] = *irq;
-	
+
 	if (is_cpm_irq(irq->name)) {
 	    /*
 	     * Enable interrupt at PIC level
@@ -317,7 +317,7 @@ int BSP_get_current_rtems_irq_handler	(rtems_irq_connect_data* irq)
 int BSP_remove_rtems_irq_handler  (const rtems_irq_connect_data* irq)
 {
 	unsigned int level;
-  
+
 	if (!isValidInterrupt(irq->name)) {
 		return 0;
 	}
@@ -332,32 +332,32 @@ int BSP_remove_rtems_irq_handler  (const rtems_irq_connect_data* irq)
 	  return 0;
 	}
 	_CPU_ISR_Disable(level);
-	
+
 	if (is_cpm_irq(irq->name)) {
 	  /*
 	   * disable interrupt at PIC level
 	   */
 	  BSP_irq_disable_at_cpm (irq->name);
 	}
-	
+
 	if (is_processor_irq(irq->name)) {
 	  /*
 	   * disable exception at processor level
 	   */
-	}    
-	
+	}
+
 	/*
 	 * Disable interrupt on device
 	 */
 	irq->off(irq);
-	
+
 	/*
 	 * restore the default irq value
 	 */
 	rtems_hdl_tbl[irq->name] = default_rtems_entry;
-	
+
 	_CPU_ISR_Enable(level);
-	
+
 	return 1;
 }
 
@@ -378,7 +378,7 @@ int BSP_rtems_irq_mngt_set(rtems_irq_global_settings* config)
 
 	/* Fill in priority masks */
 	compute_SIU_IvectMask_from_prio();
-	
+
 	_CPU_ISR_Disable(level);
 	/*
 	 * start with CPM IRQ
@@ -458,14 +458,14 @@ void C_dispatch_irq_handler (CPU_Interrupt_frame *frame, unsigned int excNum)
 	 */
 #ifdef DISPATCH_HANDLER_STAT
 	loopCounter = 0;
-#endif  
+#endif
 
 	while (1) {
 
 		if( ((m8260.sipnr_h & m8260.simr_h) | (m8260.sipnr_l & m8260.simr_l)) == 0 ) {
 #ifdef DISPATCH_HANDLER_STAT
 			if (loopCounter >  maxLoop) maxLoop = loopCounter;
-#endif      
+#endif
 			break;
 		}
 
@@ -495,11 +495,11 @@ void C_dispatch_irq_handler (CPU_Interrupt_frame *frame, unsigned int excNum)
 
 			/* disable exceptions again */
 			_CPU_MSR_SET(msr);
-			
+
 			/* restore interrupt masks */
 			m8260.simr_h = old_simr_h;
 			m8260.simr_l = old_simr_l;
-			
+
 		}
 #ifdef DISPATCH_HANDLER_STAT
 		++ loopCounter;
@@ -507,8 +507,8 @@ void C_dispatch_irq_handler (CPU_Interrupt_frame *frame, unsigned int excNum)
 	}
 }
 
-    
-  
+
+
 void _ThreadProcessSignalsFromIrq (BSP_Exception_frame* ctx)
 {
 	/*
diff --git a/c/src/lib/libbsp/powerpc/mpc8260ads/irq/irq.h b/c/src/lib/libbsp/powerpc/mpc8260ads/irq/irq.h
index 451d4e0894..d01dcc1e47 100644
--- a/c/src/lib/libbsp/powerpc/mpc8260ads/irq/irq.h
+++ b/c/src/lib/libbsp/powerpc/mpc8260ads/irq/irq.h
@@ -83,7 +83,7 @@ typedef enum {
    *
    * The MPC8260 User Manual seems shot through with inconsistencies
    * about this whole area.
-   */	
+   */
 
   /*
    * Some CPM IRQ symbolic name definition
@@ -153,7 +153,7 @@ typedef enum {
 
 }rtems_irq_symbolic_name;
 
-#define CPM_INTERRUPT		    
+#define CPM_INTERRUPT
 
 
 /*
@@ -183,9 +183,9 @@ typedef struct __rtems_irq_connect_data__ {
    * It is usually called immediately AFTER connecting the interrupt handler.
    * RTEMS may well need such a function when restoring normal interrupt
    * processing after a debug session.
-   * 
+   *
    */
-    rtems_irq_enable		on;	
+    rtems_irq_enable		on;
   /*
    * function for disabling interrupts at device level (ONLY!).
    * The code will disable it at SIU and CPM level. RATIONALE : anyway
@@ -221,7 +221,7 @@ typedef struct {
   rtems_irq_symbolic_name	irqBase;
   /*
    * software priorities associated with interrupts.
-   * if irqPrio  [i]  >  intrPrio  [j]  it  means  that  
+   * if irqPrio  [i]  >  intrPrio  [j]  it  means  that
    * interrupt handler hdl connected for interrupt name i
    * will  not be interrupted by the handler connected for interrupt j
    * The interrupt source  will be physically masked at i8259 level.
@@ -300,7 +300,7 @@ int BSP_irq_enabled_at_cpm     	(const rtems_irq_symbolic_name irqLine);
  *	4) perform rescheduling when necessary,
  *	5) restore the C scratch registers...
  *	6) restore initial execution flow
- * 
+ *
  */
 int BSP_install_rtems_irq_handler   	(const rtems_irq_connect_data*);
 /*
@@ -344,7 +344,7 @@ int BSP_rtems_irq_mngt_set(rtems_irq_global_settings* config);
  * (Re) get info on current RTEMS interrupt management.
  */
 int BSP_rtems_irq_mngt_get(rtems_irq_global_settings**);
-  
+
 extern void BSP_rtems_irq_mng_init(unsigned cpuId);
 
 #ifdef __cplusplus
diff --git a/c/src/lib/libbsp/powerpc/mpc8260ads/irq/irq_asm.S b/c/src/lib/libbsp/powerpc/mpc8260ads/irq/irq_asm.S
index a0d7d02510..64f0176109 100644
--- a/c/src/lib/libbsp/powerpc/mpc8260ads/irq/irq_asm.S
+++ b/c/src/lib/libbsp/powerpc/mpc8260ads/irq/irq_asm.S
@@ -1,5 +1,5 @@
 /*
- *  This file contains the assembly code for the PowerPC 
+ *  This file contains the assembly code for the PowerPC
  *  IRQ veneers for RTEMS.
  *
  *  The license and distribution terms for this file may be
@@ -14,7 +14,7 @@
  *
  * $Id$
  */
-  	
+
 #include <bsp/vectors.h>
 #include <rtems/score/cpuopts.h>  /* for PPC_HAS_FPU */
 #include <rtems/score/cpu.h>
@@ -24,13 +24,13 @@
 #define SYNC \
 	sync; \
 	isync
-	
+
 	.text
-	.p2align 5	
-		
-	
+	.p2align 5
+
+
 	PUBLIC_VAR(decrementer_exception_vector_prolog_code)
-	
+
 SYM (decrementer_exception_vector_prolog_code):
 
 	/*
@@ -42,11 +42,11 @@ SYM (decrementer_exception_vector_prolog_code):
 	ba	shared_raw_irq_code_entry
 
 	PUBLIC_VAR (decrementer_exception_vector_prolog_code_size)
-	
+
 	decrementer_exception_vector_prolog_code_size = . - decrementer_exception_vector_prolog_code
 
 	PUBLIC_VAR(external_exception_vector_prolog_code)
-	
+
 SYM (external_exception_vector_prolog_code):
 	/*
 	 * let room for exception frame
@@ -57,12 +57,12 @@ SYM (external_exception_vector_prolog_code):
 	ba	shared_raw_irq_code_entry
 
 	PUBLIC_VAR (external_exception_vector_prolog_code_size)
-	
+
 	external_exception_vector_prolog_code_size = . - external_exception_vector_prolog_code
 
 	PUBLIC_VAR(shared_raw_irq_code_entry)
 	PUBLIC_VAR(C_dispatch_irq_handler)
-	
+
 	.p2align 5
 SYM (shared_raw_irq_code_entry):
 	/*
@@ -73,7 +73,7 @@ SYM (shared_raw_irq_code_entry):
 	 *	R4  :	vector number
 	 */
 	/*
-	 * Save SRR0/SRR1 As soon As possible as it is the minimal needed 
+	 * Save SRR0/SRR1 As soon As possible as it is the minimal needed
 	 * to reenable exception processing
 	 */
 	stw	r0, GPR0_OFFSET(r1)
@@ -100,7 +100,7 @@ SYM (shared_raw_irq_code_entry):
 #endif
 	mtmsr   r3
 	SYNC
-	
+
 	/*
 	 * Push C scratch registers on the current stack. It may
 	 * actually be the thread stack or the interrupt stack.
@@ -122,7 +122,7 @@ SYM (shared_raw_irq_code_entry):
 	mfctr	r6
 	mfxer	r7
 	mflr	r8
-	
+
 	stw		r5,  EXC_CR_OFFSET(r1)
 	stw		r6,  EXC_CTR_OFFSET(r1)
 	stw		r7,  EXC_XER_OFFSET(r1)
@@ -148,23 +148,23 @@ SYM (shared_raw_irq_code_entry):
 /*	mfspr	r2, SPRG0 */
 	addis	r6, 0, _ISR_Nest_level@ha
 	lwz		r2, _ISR_Nest_level@l( r6 )
-	
+
 	/*
 	 * Check if stack switch is necessary
 	 */
 	cmpwi	r2,0
 	bne		nested
 	mfspr	r1, SPRG1
-	
-nested:	
-	/* 
+
+nested:
+	/*
 	 * Start Incrementing nesting level in R2
 	 */
 	addi	r2,r2,1
-	
+
 	addis	r6, 0, _ISR_Nest_level@ha
 	stw		r2, _ISR_Nest_level@l( r6 )
-	
+
 	/*
 	 * Start Incrementing _Thread_Dispatch_disable_level R4 = _Thread_Dispatch_disable_level
 	 */
@@ -173,7 +173,7 @@ nested:
 	 * store new nesting level in SPRG0
 	 */
 /*	mtspr	SPRG0, r2 */
-	
+
 	addi	r6, r6, 1
 	mfmsr	r5
 	/*
@@ -183,40 +183,40 @@ nested:
 	/*
 	 * We are now running on the interrupt stack. External and decrementer
 	 * exceptions are still disabled. I see no purpose trying to optimize
-	 * further assembler code. 
+	 * further assembler code.
 	 */
 	/*
 	 * Call C exception handler for decrementer Interrupt frame is passed just
 	 * in case...
 	 */
-	
+
 	addi	r3, r14, 0x8
 	bl		C_dispatch_irq_handler /* C_dispatch_irq_handler(cpu_interrupt_frame* r3, vector r4) */
 
 	/*
-	 * start decrementing nesting level. Note : do not test result against 0 
+	 * start decrementing nesting level. Note : do not test result against 0
 	 * value as an easy exit condition because if interrupt nesting level > 1
 	 * then _Thread_Dispatch_disable_level > 1
 	 */
 /*	mfspr	r2, SPRG0 */
-	
+
 	addis	r6, 0, _ISR_Nest_level@ha
 	lwz		r2, _ISR_Nest_level@l( r6 )
-	
+
 	/*
 	 * start decrementing _Thread_Dispatch_disable_level
 	 */
 	lwz		r3,_Thread_Dispatch_disable_level@l(r15)
 	addi	r2, r2, -1	/* Continue decrementing nesting level */
 	addi	r3, r3, -1	/* Continue decrementing _Thread_Dispatch_disable_level */
-	
-	stw		r2, _ISR_Nest_level@l( r6 )	
+
+	stw		r2, _ISR_Nest_level@l( r6 )
 /*	mtspr	SPRG0, r2 */ 	/* End decrementing nesting level */
-	
+
 	stw		r3,_Thread_Dispatch_disable_level@l(r15) /* End decrementing _Thread_Dispatch_disable_level */
 	cmpwi	r3, 0
 	/*
-	 * switch back to original stack (done here just optimize registers 
+	 * switch back to original stack (done here just optimize registers
 	 * contention. Could have been done before...)
 	 */
 	addi	r1, r14, 0
@@ -224,14 +224,14 @@ nested:
 	/*
 	 * Here we are running again on the thread system stack.
 	 * We have interrupt nesting level = _Thread_Dispatch_disable_level = 0.
-	 * Interrupt are still disabled. Time to check if scheduler request to 
+	 * Interrupt are still disabled. Time to check if scheduler request to
 	 * do something with the current thread...
 	 */
 	addis	r4, 0, _Context_Switch_necessary@ha
 	lwz		r5, _Context_Switch_necessary@l(r4)
 	cmpwi	r5, 0
 	bne		switch
-	
+
 	addis	r6, 0, _ISR_Signals_to_thread_executing@ha
 	lwz		r7, _ISR_Signals_to_thread_executing@l(r6)
 	cmpwi	r7, 0
@@ -244,7 +244,7 @@ nested:
 	 */
 	stmw	r16, GPR16_OFFSET(r1)
 	addi	r3, r1, 0x8
-	
+
     /*
      * compute SP at exception entry
      */
@@ -257,7 +257,7 @@ nested:
 	 * Call High Level signal handling code
 	 */
 	bl		_ThreadProcessSignalsFromIrq
-	
+
 
 	/*
 	 * start restoring exception like frame
@@ -266,16 +266,16 @@ nested:
 	lwz		r30,  EXC_XER_OFFSET(r1)
 	lwz		r29,  EXC_CR_OFFSET(r1)
 	lwz		r28,  EXC_LR_OFFSET(r1)
-	
+
 	mtctr	r31
 	mtxer	r30
 	mtcr	r29
 	mtlr	r28
-	
-	
+
+
 	lmw		r4, GPR4_OFFSET(r1)
 
-	
+
 	lwz		r2, GPR2_OFFSET(r1)
 	lwz		r0, GPR0_OFFSET(r1)
 
@@ -289,21 +289,21 @@ nested:
 	/*
 	 * Restore rfi related settings
 	 */
-		
+
 	lwz		r3, SRR1_FRAME_OFFSET(r1)
 	mtsrr1	r3
 	lwz		r3, SRR0_FRAME_OFFSET(r1)
 	mtsrr0	r3
-	
+
 	lwz		r3, GPR3_OFFSET(r1)
 	addi 	r1,r1, EXCEPTION_FRAME_END
 	SYNC
 	rfi
-	
+
 switch:
 	bl		SYM (_Thread_Dispatch)
-	
-easy_exit:	
+
+easy_exit:
 	/*
 	 * start restoring interrupt frame
 	 */
@@ -311,7 +311,7 @@ easy_exit:
 	lwz		r4,  EXC_XER_OFFSET(r1)
 	lwz		r5,  EXC_CR_OFFSET(r1)
 	lwz		r6,  EXC_LR_OFFSET(r1)
-	
+
 	mtctr	r3
 	mtxer	r4
 	mtcr	r5
@@ -337,11 +337,11 @@ easy_exit:
 	xori	r3, r3, MSR_RI /*| MSR_IR | MSR_DR*/
 	mtmsr   r3
 	SYNC
-	
+
 	/*
 	 * Restore rfi related settings
 	 */
-		 
+
 	lwz		r4, SRR1_FRAME_OFFSET(r1)
 	lwz		r2, SRR0_FRAME_OFFSET(r1)
 	lwz		r3, GPR3_OFFSET(r1)
diff --git a/c/src/lib/libbsp/powerpc/mpc8260ads/irq/irq_init.c b/c/src/lib/libbsp/powerpc/mpc8260ads/irq/irq_init.c
index d2ca9b2005..b0f8324ae7 100644
--- a/c/src/lib/libbsp/powerpc/mpc8260ads/irq/irq_init.c
+++ b/c/src/lib/libbsp/powerpc/mpc8260ads/irq/irq_init.c
@@ -74,7 +74,7 @@ static rtems_irq_prio irqPrioTable[BSP_CPM_IRQ_NUMBER]={
 };
 
 
-/* 
+/*
  * Initialize CPM interrupt management
  */
 void
@@ -99,7 +99,7 @@ void BSP_rtems_irq_mng_init(unsigned cpuId)
 {
   rtems_raw_except_connect_data vectorDesc;
   int i;
-  
+
   BSP_CPM_irq_init();
   /*
    * Initialize Rtems management interrupt table
@@ -126,7 +126,7 @@ void BSP_rtems_irq_mng_init(unsigned cpuId)
        */
       BSP_panic("Unable to initialize RTEMS interrupt Management!!! System locked\n");
     }
-  
+
   /*
    * We must connect the raw irq handler for the two
    * expected interrupt sources : decrementer and external interrupts.
@@ -148,7 +148,7 @@ void BSP_rtems_irq_mng_init(unsigned cpuId)
     if (!mpc8xx_set_exception (&vectorDesc)) {
       BSP_panic("Unable to initialize RTEMS external raw exception\n");
     }
-#ifdef TRACE_IRQ_INIT  
+#ifdef TRACE_IRQ_INIT
     printk("RTEMS IRQ management is now operationnal\n");
 #endif
 }