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authorChris Johns <chrisj@rtems.org>2017-12-23 18:18:56 +1100
committerSebastian Huber <sebastian.huber@embedded-brains.de>2018-01-25 08:45:26 +0100
commit2afb22b7e1ebcbe40373ff7e0efae7d207c655a9 (patch)
tree44759efe9374f13200a97e96d91bd9a2b7e5ce2a /c/src/lib/libbsp/powerpc/motorola_powerpc/include/bsp.h
parentMAINTAINERS: Add myself to Write After Approval. (diff)
downloadrtems-2afb22b7e1ebcbe40373ff7e0efae7d207c655a9.tar.bz2
Remove make preinstall
A speciality of the RTEMS build system was the make preinstall step. It copied header files from arbitrary locations into the build tree. The header files were included via the -Bsome/build/tree/path GCC command line option. This has at least seven problems: * The make preinstall step itself needs time and disk space. * Errors in header files show up in the build tree copy. This makes it hard for editors to open the right file to fix the error. * There is no clear relationship between source and build tree header files. This makes an audit of the build process difficult. * The visibility of all header files in the build tree makes it difficult to enforce API barriers. For example it is discouraged to use BSP-specifics in the cpukit. * An introduction of a new build system is difficult. * Include paths specified by the -B option are system headers. This may suppress warnings. * The parallel build had sporadic failures on some hosts. This patch removes the make preinstall step. All installed header files are moved to dedicated include directories in the source tree. Let @RTEMS_CPU@ be the target architecture, e.g. arm, powerpc, sparc, etc. Let @RTEMS_BSP_FAMILIY@ be a BSP family base directory, e.g. erc32, imx, qoriq, etc. The new cpukit include directories are: * cpukit/include * cpukit/score/cpu/@RTEMS_CPU@/include * cpukit/libnetworking The new BSP include directories are: * bsps/include * bsps/@RTEMS_CPU@/include * bsps/@RTEMS_CPU@/@RTEMS_BSP_FAMILIY@/include There are build tree include directories for generated files. The include directory order favours the most general header file, e.g. it is not possible to override general header files via the include path order. The "bootstrap -p" option was removed. The new "bootstrap -H" option should be used to regenerate the "headers.am" files. Update #3254.
Diffstat (limited to 'c/src/lib/libbsp/powerpc/motorola_powerpc/include/bsp.h')
-rw-r--r--c/src/lib/libbsp/powerpc/motorola_powerpc/include/bsp.h248
1 files changed, 0 insertions, 248 deletions
diff --git a/c/src/lib/libbsp/powerpc/motorola_powerpc/include/bsp.h b/c/src/lib/libbsp/powerpc/motorola_powerpc/include/bsp.h
deleted file mode 100644
index 675796becf..0000000000
--- a/c/src/lib/libbsp/powerpc/motorola_powerpc/include/bsp.h
+++ /dev/null
@@ -1,248 +0,0 @@
-/*
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
- */
-#ifndef LIBBSP_POWERPC_MOTOROLA_POWERPC_BSP_H
-#define LIBBSP_POWERPC_MOTOROLA_POWERPC_BSP_H
-
-#include <bspopts.h>
-#include <bsp/default-initial-extension.h>
-
-#include <rtems.h>
-#include <libcpu/io.h>
-#include <bsp/vectors.h>
-
-#ifdef qemu
-#include <rtems/bspcmdline.h>
-#endif
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/*
- * diagram illustrating the role of the configuration
- * constants
- * PCI_MEM_WIN0: CPU starting addr where PCI memory space is visible
- * PCI_MEM_BASE: CPU address of PCI mem addr. zero. (regardless of this
- * address being 'visible' or not!).
- * _VME_A32_WIN0_ON_PCI: PCI starting addr of the 1st window to VME
- * _VME_A32_WIN0_ON_VME: VME address of that same window
- *
- * AFAIK, only PreP boards have a non-zero PCI_MEM_BASE (i.e., an offset between
- * CPU and PCI addresses). The mvme2300 'ppcbug' firmware configures the PCI
- * bus using PCI base addresses! I.e., drivers need to add PCI_MEM_BASE to
- * the base address read from PCI config.space in order to translate that
- * into a CPU address.
- *
- * NOTE: VME addresses should NEVER be translated using these constants!
- * they are strictly for BSP internal use. Drivers etc. should use
- * the translation routines int VME.h (BSP_vme2local_adrs/BSP_local2vme_adrs).
- *
- * CPU ADDR PCI_ADDR VME ADDR
- *
- * 00000000 XXXXXXXX XXXXXXXX
- * ^ ^ ........
- * | |
- * | | e.g., RAM XXXXXXXX
- * | | 00000000
- * | | ......... ^
- * | | (possible offset |
- * | | between pci and XXXXXXXX | ......
- * | | cpu addresses) |
- * | v |
- * | PCI_MEM_BASE -------------> 00000000 --------------- |
- * | ........ ........ ^ |
- * | invisible | |
- * | ........ from CPU | |
- * v | |
- * PCI_MEM_WIN0 ============= first visible PCI addr | |
- * | |
- * pci devices pci window | |
- * visible here v v
- * mapped by ========== _VME_A32_WIN0_ON_PCI ======= _VME_A32_WIN0_ON_VME
- * vme window
- * VME devices hostbridge mapped by
- * visible here universe
- * =====================================================
- *
- */
-
-/* fundamental addresses for BSP (CHRPxxx and PREPxxx are from libcpu/io.h) */
-#if defined(mvme2100)
-#define _IO_BASE CHRP_ISA_IO_BASE
-#define _ISA_MEM_BASE CHRP_ISA_MEM_BASE
-/* address of our ram on the PCI bus */
-#define PCI_DRAM_OFFSET CHRP_PCI_DRAM_OFFSET
-/* offset of pci memory as seen from the CPU */
-#define PCI_MEM_BASE 0
-/* where (in CPU addr. space) does the PCI window start */
-#define PCI_MEM_WIN0 0x80000000
-
-#else
-#define _IO_BASE PREP_ISA_IO_BASE
-#define _ISA_MEM_BASE PREP_ISA_MEM_BASE
-#ifndef qemu
-/* address of our ram on the PCI bus */
-#define PCI_DRAM_OFFSET PREP_PCI_DRAM_OFFSET
-/* offset of pci memory as seen from the CPU */
-#define PCI_MEM_BASE PREP_ISA_MEM_BASE
-#define PCI_MEM_WIN0 0
-#else
-#define PCI_DRAM_OFFSET 0
-#define PCI_MEM_BASE 0
-#define PCI_MEM_WIN0 PREP_ISA_MEM_BASE
-#endif
-#endif
-
-
-/*
- * Base address definitions for several devices
- *
- * MVME2100 is very similar but has fewer devices and uses on-CPU EPIC
- * implementation of OpenPIC controller. It also cannot be probed to
- * find out what it is which is VERY different from other Motorola boards.
- */
-
-#if defined(mvme2100)
-#define BSP_UART_IOBASE_COM1 ((_IO_BASE)+0x01e10000)
-/* #define BSP_UART_IOBASE_COM1 (0xffe10000) */
-#define BSP_OPEN_PIC_BASE_OFFSET 0x40000
-
-#define MVME_HAS_DEC21140
-#else
-#define BSP_UART_IOBASE_COM1 ((_IO_BASE)+0x3f8)
-#define BSP_UART_IOBASE_COM2 ((_IO_BASE)+0x2f8)
-
-#if ! defined(qemu)
-#define BSP_KBD_IOBASE ((_IO_BASE)+0x60)
-#define BSP_VGA_IOBASE ((_IO_BASE)+0x3c0)
-#endif
-
-#if defined(mvme2300)
-#define MVME_HAS_DEC21140
-#endif
-#endif
-
-#define BSP_CONSOLE_PORT BSP_UART_COM1
-#define BSP_UART_BAUD_BASE 115200
-
-#if defined(MVME_HAS_DEC21140)
-struct rtems_bsdnet_ifconfig;
-#define RTEMS_BSP_NETWORK_DRIVER_NAME "dc1"
-#define RTEMS_BSP_NETWORK_DRIVER_ATTACH rtems_dec21140_driver_attach
-extern int rtems_dec21140_driver_attach();
-#endif
-
-#ifdef qemu
-#define RTEMS_BSP_NETWORK_DRIVER_NAME "ne1"
-#define RTEMS_BSP_NETWORK_DRIVER_ATTACH rtems_ne_driver_attach
-extern int rtems_ne_driver_attach();
-#endif
-
-#ifdef qemu
-#define BSP_IDLE_TASK_BODY bsp_ppc_idle_task_body
-extern void *bsp_ppc_idle_task_body(uintptr_t arg);
-#endif
-
-#include <bsp/openpic.h>
-/* BSP_PIC_DO_EOI is optionally used by the 'vmeUniverse' driver
- * to implement VME IRQ priorities in software.
- * Note that this requires support by the interrupt controller
- * driver (cf. libbsp/shared/powerpc/irq/openpic_i8259_irq.c)
- * and the BSP-specific universe initialization/configuration
- * (cf. libbsp/shared/powerpc/vme/VMEConfig.h vme_universe.c)
- *
- * ********* IMPORTANT NOTE ********
- * When deriving from this file (new BSPs)
- * DO NOT define "BSP_PIC_DO_EOI" if you don't know what
- * you are doing i.e., w/o implementing the required pieces
- * mentioned above.
- * ********* IMPORTANT NOTE ********
- */
-#define BSP_PIC_DO_EOI openpic_eoi(0)
-
-#ifndef ASM
-#define outport_byte(port,value) outb(value,port)
-#define outport_word(port,value) outw(value,port)
-#define outport_long(port,value) outl(value,port)
-
-#define inport_byte(port,value) (value = inb(port))
-#define inport_word(port,value) (value = inw(port))
-#define inport_long(port,value) (value = inl(port))
-
-/*
- * Vital Board data Start using DATA RESIDUAL
- */
-
-/*
- * Total memory using RESIDUAL DATA
- */
-extern unsigned int BSP_mem_size;
-/*
- * Start of the heap
- */
-extern unsigned int BSP_heap_start;
-/*
- * PCI Bus Frequency
- */
-extern unsigned int BSP_bus_frequency;
-/*
- * processor clock frequency
- */
-extern unsigned int BSP_processor_frequency;
-/*
- * Time base divisior (how many tick for 1 second).
- */
-extern unsigned int BSP_time_base_divisor;
-
-/*
- * String passed by the bootloader.
- */
-extern char *BSP_commandline_string;
-
-#define BSP_Convert_decrementer( _value ) \
- ((unsigned long long) ((((unsigned long long)BSP_time_base_divisor) * 1000000ULL) /((unsigned long long) BSP_bus_frequency)) * ((unsigned long long) (_value)))
-
-/* extern int printk(const char *, ...) __attribute__((format(printf, 1, 2))); */
-extern int BSP_disconnect_clock_handler (void);
-extern int BSP_connect_clock_handler (void);
-
-/* clear hostbridge errors
- *
- * NOTE: The routine returns always (-1) if 'enableMCP==1'
- * [semantics needed by libbspExt] if the MCP input is not wired.
- * It returns and clears the error bits of the PCI status register.
- * MCP support is disabled because:
- * a) the 2100 has no raven chip
- * b) the raven (2300) would raise machine check interrupts
- * on PCI config space access to empty slots.
- */
-extern unsigned long _BSP_clear_hostbridge_errors(int enableMCP, int quiet);
-
-/*
- * Prototypes for methods called only from .S for dependency tracking
- */
-char *save_boot_params(
- void *r3,
- void *r4,
- void *r5,
- char *cmdline_start,
- char *cmdline_end
-);
-void zero_bss(void);
-
-/*
- * Prototypes for BSP methods which cross file boundaries
- */
-void VIA_isa_bridge_interrupts_setup(void);
-
-#endif
-
-#ifdef __cplusplus
-};
-#endif
-
-#endif