Remove make preinstall

A speciality of the RTEMS build system was the make preinstall step.  It
copied header files from arbitrary locations into the build tree.  The
header files were included via the -Bsome/build/tree/path GCC command
line option.

This has at least seven problems:

* The make preinstall step itself needs time and disk space.

* Errors in header files show up in the build tree copy.  This makes it
  hard for editors to open the right file to fix the error.

* There is no clear relationship between source and build tree header
  files.  This makes an audit of the build process difficult.

* The visibility of all header files in the build tree makes it
  difficult to enforce API barriers.  For example it is discouraged to
  use BSP-specifics in the cpukit.

* An introduction of a new build system is difficult.

* Include paths specified by the -B option are system headers.  This
  may suppress warnings.

* The parallel build had sporadic failures on some hosts.

This patch removes the make preinstall step.   All installed header
files are moved to dedicated include directories in the source tree.
Let @RTEMS_CPU@ be the target architecture, e.g. arm, powerpc, sparc,
etc.  Let @RTEMS_BSP_FAMILIY@ be a BSP family base directory, e.g.
erc32, imx, qoriq, etc.

The new cpukit include directories are:

* cpukit/include

* cpukit/score/cpu/@RTEMS_CPU@/include

* cpukit/libnetworking

The new BSP include directories are:

* bsps/include

* bsps/@RTEMS_CPU@/include

* bsps/@RTEMS_CPU@/@RTEMS_BSP_FAMILIY@/include

There are build tree include directories for generated files.

The include directory order favours the most general header file, e.g.
it is not possible to override general header files via the include path
order.

The "bootstrap -p" option was removed.  The new "bootstrap -H" option
should be used to regenerate the "headers.am" files.

Update #3254.

4 files changed, 0 insertions, 749 deletions

diff --git a/c/src/lib/libbsp/powerpc/motorola_powerpc/include/bsp.h b/c/src/lib/libbsp/powerpc/motorola_powerpc/include/bsp.h
deleted file mode 100644
index 675796becf..0000000000
--- a/c/src/lib/libbsp/powerpc/motorola_powerpc/include/bsp.h
+++ /dev/null
@@ -1,248 +0,0 @@
-/*
- *
- *  The license and distribution terms for this file may be
- *  found in the file LICENSE in this distribution or at
- *  http://www.rtems.org/license/LICENSE.
- */
-#ifndef LIBBSP_POWERPC_MOTOROLA_POWERPC_BSP_H
-#define LIBBSP_POWERPC_MOTOROLA_POWERPC_BSP_H
-
-#include <bspopts.h>
-#include <bsp/default-initial-extension.h>
-
-#include <rtems.h>
-#include <libcpu/io.h>
-#include <bsp/vectors.h>
-  
-#ifdef qemu
-#include <rtems/bspcmdline.h>
-#endif
-  
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/*
- * diagram illustrating the role of the configuration
- * constants
- *  PCI_MEM_WIN0:        CPU starting addr where PCI memory space is visible
- *  PCI_MEM_BASE:        CPU address of PCI mem addr. zero. (regardless of this
- *                       address being 'visible' or not!).
- * _VME_A32_WIN0_ON_PCI: PCI starting addr of the 1st window to VME
- * _VME_A32_WIN0_ON_VME: VME address of that same window
- *
- * AFAIK, only PreP boards have a non-zero PCI_MEM_BASE (i.e., an offset between
- * CPU and PCI addresses). The mvme2300 'ppcbug' firmware configures the PCI
- * bus using PCI base addresses! I.e., drivers need to add PCI_MEM_BASE to
- * the base address read from PCI config.space in order to translate that
- * into a CPU address.
- *
- * NOTE: VME addresses should NEVER be translated using these constants!
- *       they are strictly for BSP internal use. Drivers etc. should use
- *       the translation routines int VME.h (BSP_vme2local_adrs/BSP_local2vme_adrs).
- *
- *           CPU ADDR                  PCI_ADDR                                VME ADDR
- *
- *           00000000                  XXXXXXXX                                XXXXXXXX
- *    ^  ^   ........
- *    |  |
- *    |  |  e.g., RAM                  XXXXXXXX
- *    |  |                                                                     00000000
- *    |  |  .........                                                          ^
- *    |  |            (possible offset                                         |
- *    |  |             between pci and XXXXXXXX                                | ......
- *    |  |             cpu addresses)                                          |
- *    |  v                                                                     |
- *    |  PCI_MEM_BASE  ------------->  00000000 ---------------                |
- *    |     ........                   ........               ^                |
- *    |                                invisible              |                |
- *    |     ........                   from CPU               |                |
- *    v                                                       |                |
- *       PCI_MEM_WIN0 =============  first visible PCI addr   |                |
- *                                                            |                |
- *        pci devices   pci window                            |                |
- *       visible here                                         v                v
- *                      mapped by   ========== _VME_A32_WIN0_ON_PCI =======  _VME_A32_WIN0_ON_VME
- *                                                 vme window
- *        VME devices   hostbridge                 mapped by
- *       visible here                              universe
- *                    =====================================================
- *
- */
-
-/* fundamental addresses for BSP (CHRPxxx and PREPxxx are from libcpu/io.h) */
-#if defined(mvme2100)
-#define	_IO_BASE		CHRP_ISA_IO_BASE
-#define	_ISA_MEM_BASE		CHRP_ISA_MEM_BASE
-/* address of our ram on the PCI bus   */
-#define	PCI_DRAM_OFFSET		CHRP_PCI_DRAM_OFFSET
-/* offset of pci memory as seen from the CPU */
-#define PCI_MEM_BASE		0
-/* where (in CPU addr. space) does the PCI window start */
-#define PCI_MEM_WIN0		0x80000000
-
-#else
-#define	_IO_BASE		PREP_ISA_IO_BASE
-#define	_ISA_MEM_BASE		PREP_ISA_MEM_BASE
-#ifndef qemu
-/* address of our ram on the PCI bus   */
-#define	PCI_DRAM_OFFSET		PREP_PCI_DRAM_OFFSET
-/* offset of pci memory as seen from the CPU */
-#define PCI_MEM_BASE		PREP_ISA_MEM_BASE
-#define PCI_MEM_WIN0		0
-#else
-#define	PCI_DRAM_OFFSET		0
-#define PCI_MEM_BASE		0
-#define PCI_MEM_WIN0		PREP_ISA_MEM_BASE
-#endif
-#endif
-
-
-/*
- *  Base address definitions for several devices
- *
- *  MVME2100 is very similar but has fewer devices and uses on-CPU EPIC
- *  implementation of OpenPIC controller.  It also cannot be probed to
- *  find out what it is which is VERY different from other Motorola boards.
- */
-
-#if defined(mvme2100)
-#define BSP_UART_IOBASE_COM1 ((_IO_BASE)+0x01e10000)
-/* #define BSP_UART_IOBASE_COM1     (0xffe10000) */
-#define BSP_OPEN_PIC_BASE_OFFSET 0x40000
-
-#define MVME_HAS_DEC21140
-#else
-#define BSP_UART_IOBASE_COM1 ((_IO_BASE)+0x3f8)
-#define BSP_UART_IOBASE_COM2 ((_IO_BASE)+0x2f8)
-
-#if ! defined(qemu)
-#define BSP_KBD_IOBASE       ((_IO_BASE)+0x60)
-#define BSP_VGA_IOBASE       ((_IO_BASE)+0x3c0)
-#endif
-
-#if defined(mvme2300)
-#define MVME_HAS_DEC21140
-#endif
-#endif
-
-#define BSP_CONSOLE_PORT	BSP_UART_COM1
-#define BSP_UART_BAUD_BASE	115200
-
-#if defined(MVME_HAS_DEC21140)
-struct rtems_bsdnet_ifconfig;
-#define RTEMS_BSP_NETWORK_DRIVER_NAME "dc1"
-#define RTEMS_BSP_NETWORK_DRIVER_ATTACH rtems_dec21140_driver_attach
-extern int rtems_dec21140_driver_attach();
-#endif
-
-#ifdef qemu
-#define RTEMS_BSP_NETWORK_DRIVER_NAME "ne1"
-#define RTEMS_BSP_NETWORK_DRIVER_ATTACH rtems_ne_driver_attach
-extern int rtems_ne_driver_attach();
-#endif
-
-#ifdef qemu
-#define BSP_IDLE_TASK_BODY bsp_ppc_idle_task_body
-extern void *bsp_ppc_idle_task_body(uintptr_t arg);
-#endif
-
-#include <bsp/openpic.h>
-/* BSP_PIC_DO_EOI is optionally used by the 'vmeUniverse' driver
- * to implement VME IRQ priorities in software.
- * Note that this requires support by the interrupt controller
- * driver (cf. libbsp/shared/powerpc/irq/openpic_i8259_irq.c)
- * and the BSP-specific universe initialization/configuration
- * (cf. libbsp/shared/powerpc/vme/VMEConfig.h vme_universe.c)
- *
- * ********* IMPORTANT NOTE ********
- * When deriving from this file (new BSPs)
- * DO NOT define "BSP_PIC_DO_EOI" if you don't know what
- * you are doing i.e., w/o implementing the required pieces
- * mentioned above.
- * ********* IMPORTANT NOTE ********
- */
-#define BSP_PIC_DO_EOI openpic_eoi(0)
-
-#ifndef ASM
-#define outport_byte(port,value) outb(value,port)
-#define outport_word(port,value) outw(value,port)
-#define outport_long(port,value) outl(value,port)
-
-#define inport_byte(port,value) (value = inb(port))
-#define inport_word(port,value) (value = inw(port))
-#define inport_long(port,value) (value = inl(port))
-
-/*
- * Vital Board data Start using DATA RESIDUAL
- */
-
-/*
- * Total memory using RESIDUAL DATA
- */
-extern unsigned int BSP_mem_size;
-/*
- * Start of the heap
- */
-extern unsigned int BSP_heap_start;
-/*
- * PCI Bus Frequency
- */
-extern unsigned int BSP_bus_frequency;
-/*
- * processor clock frequency
- */
-extern unsigned int BSP_processor_frequency;
-/*
- * Time base divisior (how many tick for 1 second).
- */
-extern unsigned int BSP_time_base_divisor;
-
-/*
- * String passed by the bootloader.
- */
-extern char *BSP_commandline_string;
-
-#define BSP_Convert_decrementer( _value ) \
-  ((unsigned long long) ((((unsigned long long)BSP_time_base_divisor) * 1000000ULL) /((unsigned long long) BSP_bus_frequency)) * ((unsigned long long) (_value)))
-
-/* extern int printk(const char *, ...) __attribute__((format(printf, 1, 2))); */
-extern int BSP_disconnect_clock_handler (void);
-extern int BSP_connect_clock_handler (void);
-
-/* clear hostbridge errors
- *
- * NOTE: The routine returns always (-1) if 'enableMCP==1'
- *       [semantics needed by libbspExt] if the MCP input is not wired.
- *       It returns and clears the error bits of the PCI status register.
- *       MCP support is disabled because:
- *         a) the 2100 has no raven chip
- *         b) the raven (2300) would raise machine check interrupts
- *            on PCI config space access to empty slots.
- */
-extern unsigned long _BSP_clear_hostbridge_errors(int enableMCP, int quiet);
-
-/*
- * Prototypes for methods called only from .S for dependency tracking
- */
-char *save_boot_params(
-  void *r3,
-  void *r4,
-  void *r5,
-  char *cmdline_start,
-  char *cmdline_end
-);
-void zero_bss(void);
-
-/*
- * Prototypes for BSP methods which cross file boundaries
- */
-void VIA_isa_bridge_interrupts_setup(void);
-
-#endif
-
-#ifdef __cplusplus
-};
-#endif
-
-#endif
diff --git a/c/src/lib/libbsp/powerpc/motorola_powerpc/include/bsp/VMEConfig.h b/c/src/lib/libbsp/powerpc/motorola_powerpc/include/bsp/VMEConfig.h
deleted file mode 100644
index 9b355819f1..0000000000
--- a/c/src/lib/libbsp/powerpc/motorola_powerpc/include/bsp/VMEConfig.h
+++ /dev/null
@@ -1,233 +0,0 @@
-#ifndef RTEMS_BSP_VME_CONFIG_H
-#define RTEMS_BSP_VME_CONFIG_H
-
-/* BSP specific address space configuration parameters */
-
-/*
- * Authorship
- * ----------
- * This software was created by
- *     Till Straumann <strauman@slac.stanford.edu>, 2002,
- *      Stanford Linear Accelerator Center, Stanford University.
- *
- * Acknowledgement of sponsorship
- * ------------------------------
- * This software was produced by
- *     the Stanford Linear Accelerator Center, Stanford University,
- *      under Contract DE-AC03-76SFO0515 with the Department of Energy.
- *
- * Government disclaimer of liability
- * ----------------------------------
- * Neither the United States nor the United States Department of Energy,
- * nor any of their employees, makes any warranty, express or implied, or
- * assumes any legal liability or responsibility for the accuracy,
- * completeness, or usefulness of any data, apparatus, product, or process
- * disclosed, or represents that its use would not infringe privately owned
- * rights.
- *
- * Stanford disclaimer of liability
- * --------------------------------
- * Stanford University makes no representations or warranties, express or
- * implied, nor assumes any liability for the use of this software.
- *
- * Stanford disclaimer of copyright
- * --------------------------------
- * Stanford University, owner of the copyright, hereby disclaims its
- * copyright and all other rights in this software.  Hence, anyone may
- * freely use it for any purpose without restriction.
- *
- * Maintenance of notices
- * ----------------------
- * In the interest of clarity regarding the origin and status of this
- * SLAC software, this and all the preceding Stanford University notices
- * are to remain affixed to any copy or derivative of this software made
- * or distributed by the recipient and are to be affixed to any copy of
- * software made or distributed by the recipient that contains a copy or
- * derivative of this software.
- *
- * ------------------ SLAC Software Notices, Set 4 OTT.002a, 2004 FEB 03
- */
-
-/*
- * The BSP maps VME address ranges into
- * one BAT.
- * NOTE: the BSP (startup/bspstart.c) uses
- * hardcoded window lengths that match this
- * layout:
- *
- * BSP_VME_BAT_IDX defines
- * which BAT to use for mapping the VME bus.
- * If this is undefined, no extra BAT will be
- * configured and VME has to share the available
- * PCI address space with PCI devices.
- *
- * If you do define BSP_VME_BAT_IDX you must
- * make sure the corresponding BAT is really
- * available and unused!
- */
-
-#if defined(mvme2100)
-#define _VME_A32_WIN0_ON_PCI  0x90000000
-#define _VME_A24_ON_PCI      0x9f000000
-#define _VME_A16_ON_PCI      0x9fff0000
-#define BSP_VME_BAT_IDX      1
-#else
-#define _VME_A32_WIN0_ON_PCI  0x10000000
-#define _VME_A24_ON_PCI      0x1f000000
-#define _VME_A16_ON_PCI      0x1fff0000
-#define BSP_VME_BAT_IDX      0
-#endif
-
-/* start of the A32 window on the VME bus
- * TODO: this should perhaps be a run-time configuration option
- */
-#define _VME_A32_WIN0_ON_VME  0x20000000
-
-/* if _VME_DRAM_OFFSET is defined, the BSP
- * will map the board RAM onto the VME bus, starting
- * at _VME_DRAM_OFFSET
- */
-#define _VME_DRAM_OFFSET    0xc0000000
-
-/* Define BSP_PCI_VME_DRIVER_DOES_EOI to let the vmeUniverse
- * driver (Tsi148 driver doesn't implement this) implement
- * VME IRQ priorities in software.
- *
- * Here's how this works:
- *
- *    1) VME IRQ happens
- *    2) universe propagates IRQ to PCI/PPC/main interrupt
- *       controller ('PIC' - programmable interrupt controller).
- *    3) PIC driver dispatches universe driver's ISR
- *    4) universe driver ISR acknowledges IRQ on VME,
- *       determines VME vector.
- * ++++++++++++ stuff between ++ signs is related to SW priorities +++++++++
- *    5) universe driver *masks* all VME IRQ levels <= interrupting
- *       level.
- *    6) universe driver calls PIC driver's 'EOI' routine.
- *       This effectively re-enables PCI and hence higher
- *       level VME interrupts.
- *    7) universe driver dispatches user VME ISR.
- *
- * ++>> HIGHER PRIORITY VME IRQ COULD HAPPEN HERE and would be handled <<++
- *
- *    8) user ISR returns, universe driver re-enables lower
- *       level VME interrupts, returns.
- *    9) universe driver ISR returns control to PIC driver
- *   10) PIC driver *omits* regular EOI sequence since this
- *       was already done by universe driver (step 6).
- * ++++++++++++ end of special handling (SW priorities) ++++++++++++++++++++
- *   11) PIC driver ISR dispatcher returns.
- *
- * Note that the BSP *MUST* provide the following hooks
- * in order for this to work:
- *   a) bsp.h must define the symbol BSP_PIC_DO_EOI to
- *      a sequence of instructions that terminates an
- *      interrupt at the interrupt controller.
- *   b) The interrupt controller driver must check the
- *      interrupt source and *must omit* running the EOI
- *      sequence if the interrupt source is the vmeUniverse
- *      (because the universe driver already ran BSP_PIC_DO_EOI)
- *      The interrupt controller must define the variable
- *
- *          int _BSP_vme_bridge_irq = -1;
- *
- *      which is assigned the universe's interrupt line information
- *      by vme_universe.c:BSP_VMEIrqMgrInstall(). The interrupt
- *      controller driver may use this variable to determine
- *      if an IRQ was caused by the universe.
- *
- *   c) define BSP_PCI_VME_DRIVER_DOES_EOI
- *
- *  NOTE: If a) and b) are not implemented by the BSP
- *        BSP_PCI_VME_DRIVER_DOES_EOI must be *undefined*.
- */
-#define BSP_PCI_VME_DRIVER_DOES_EOI
-
-#ifdef BSP_PCI_VME_DRIVER_DOES_EOI
-/* don't reference vmeUniverse0PciIrqLine directly from the irq
- * controller driver - leave it up to BSP_VMEIrqMgrInstall() to
- * set _BSP_vme_bridge_irq. That way, we can avoid linking
- * the universe driver if VME is unused...
- */
-extern int _BSP_vme_bridge_irq;
-#endif
-
-/* If your BSP requires a non-standard way to configure
- * the VME interrupt manager then define the symbol
- *
- * BSP_VME_UNIVERSE_INSTALL_IRQ_MGR
- *
- * to a proper instruction sequence that installs the
- * universe interrupt manager. This requires knowledge
- * of the wiring between the universe and the PIC (main
- * interrupt controller), i.e., which IRQ 'pins' of the
- * universe are wired to which 'lines'/inputs at the PIC.
- * (consult vmeUniverse.h for more information).
- *
- * When installing the universe IRQ manager it is also
- * possible to specify whether it should try to share
- * PIC interrupts with other sources. This might not
- * be supported by all BSPs (but the unverse driver
- * recognizes that).
- *
- * If BSP_VME_UNIVERSE_INSTALL_IRQ_MGR is undefined then
- * the default algorithm is used (vme_universe.c):
- *
- * This default setup uses only a single wire. It reads
- * the PIC 'line' from PCI configuration space and assumes
- * this to be wired to the first (LIRQ0) IRQ input at the
- * universe. The default setup tries to use interrupt
- * sharing.
- */
-
-#include <bsp/motorola.h>
-#include <bsp/pci.h>
-
-#define BSP_VME_UNIVERSE_INSTALL_IRQ_MGR(err) \
-do { \
-int              bus, dev, i = 0, j; \
-const struct _int_map  *bspmap; \
-  /* install the VME interrupt manager; \
-   * if there's a bsp route map, use it to \
-   * configure additional lines... \
-   */ \
-  err = -1; \
-  if (0 == pci_find_device(0x10e3, 0x0000, 0, &bus, &dev, &i)){ \
-  if ( (bspmap = motorolaIntMap(currentBoard)) ) { \
-  for ( i=0; bspmap[i].bus >= 0; i++ ) { \
-    if ( bspmap[i].bus == bus && bspmap[i].slot == dev ) { \
-    int pins[5], names[4]; \
-    /* found it; use info here...                   */ \
-    /* copy up to 4 entries; terminated with -1 pin */ \
-    for ( j=0; \
-          j<5 && (pins[j]=bspmap[i].pin_route[j].pin-1)>=0; \
-          j++) { \
-      names[j] = bspmap[i].pin_route[j].int_name[0]; \
-    } \
-    pins[4] = -1; \
-    if ( 0 == vmeUniverseInstallIrqMgrAlt( \
-        VMEUNIVERSE_IRQ_MGR_FLAG_SHARED, /* shared IRQs */\
-        pins[0], names[0], \
-        pins[1], names[1], \
-        pins[2], names[2], \
-        pins[3], names[3], \
-        -1) ) { \
-      i = -1; \
-      break; \
-    } \
-    } \
-  } \
-    } \
-  if ( i >= 0 ) \
-      err = vmeUniverseInstallIrqMgrAlt( \
-          VMEUNIVERSE_IRQ_MGR_FLAG_SHARED, \
-        0,-1, \
-        -1); \
-  } \
-} while (0)
-
-extern int BSP_VMEInit(void);
-extern int BSP_VMEIrqMgrInstall(void);
-
-#endif
diff --git a/c/src/lib/libbsp/powerpc/motorola_powerpc/include/bsp/irq.h b/c/src/lib/libbsp/powerpc/motorola_powerpc/include/bsp/irq.h
deleted file mode 100644
index 2d575d8122..0000000000
--- a/c/src/lib/libbsp/powerpc/motorola_powerpc/include/bsp/irq.h
+++ /dev/null
@@ -1,204 +0,0 @@
-/* irq.h
- *
- *  This include file describe the data structure and the functions implemented
- *  by RTEMS to write interrupt handlers.
- *
- *  Copyright (C) 1999 valette@crf.canon.fr
- *
- *  This code is heavilly inspired by the public specification of STREAM V2
- *  that can be found at :
- *
- *      <http://www.chorus.com/Documentation/index.html> by following
- *  the STREAM API Specification Document link.
- *
- *  The license and distribution terms for this file may be
- *  found in the file LICENSE in this distribution or at
- *  http://www.rtems.org/license/LICENSE.
- */
-
-#ifndef BSP_POWERPC_IRQ_H
-#define BSP_POWERPC_IRQ_H
-
-#define BSP_SHARED_HANDLER_SUPPORT      1
-#include <rtems/irq.h>
-
-/*
- * 8259 edge/level control definitions at VIA
- */
-#define ISA8259_M_ELCR 		0x4d0
-#define ISA8259_S_ELCR 		0x4d1
-
-#define ELCRS_INT15_LVL         0x80
-#define ELCRS_INT14_LVL         0x40
-#define ELCRS_INT13_LVL         0x20
-#define ELCRS_INT12_LVL         0x10
-#define ELCRS_INT11_LVL         0x08
-#define ELCRS_INT10_LVL         0x04
-#define ELCRS_INT9_LVL          0x02
-#define ELCRS_INT8_LVL          0x01
-#define ELCRM_INT7_LVL          0x80
-#define ELCRM_INT6_LVL          0x40
-#define ELCRM_INT5_LVL          0x20
-#define ELCRM_INT4_LVL          0x10
-#define ELCRM_INT3_LVL          0x8
-#define ELCRM_INT2_LVL          0x4
-#define ELCRM_INT1_LVL          0x2
-#define ELCRM_INT0_LVL          0x1
-
-    /* PIC's command and mask registers */
-#define PIC_MASTER_COMMAND_IO_PORT		0x20	/* Master PIC command register */
-#define PIC_SLAVE_COMMAND_IO_PORT		0xa0	/* Slave PIC command register */
-#define PIC_MASTER_IMR_IO_PORT			0x21	/* Master PIC Interrupt Mask Register */
-#define PIC_SLAVE_IMR_IO_PORT		 	0xa1	/* Slave PIC Interrupt Mask Register */
-
-    /* Command for specific EOI (End Of Interrupt): Interrupt acknowledge */
-#define PIC_EOSI	0x60	/* End of Specific Interrupt (EOSI) */
-#define	SLAVE_PIC_EOSI  0x62	/* End of Specific Interrupt (EOSI) for cascade */
-#define PIC_EOI		0x20	/* Generic End of Interrupt (EOI) */
-
-#ifndef ASM
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/*
- * rtems_irq_number Definitions
- */
-
-/*
- * ISA IRQ handler related definitions
- */
-#define BSP_ISA_IRQ_NUMBER		(16)
-#define BSP_ISA_IRQ_LOWEST_OFFSET	(0)
-#define BSP_ISA_IRQ_MAX_OFFSET		(BSP_ISA_IRQ_LOWEST_OFFSET + BSP_ISA_IRQ_NUMBER - 1)
-/*
- * PCI IRQ handlers related definitions
- * CAUTION : BSP_PCI_IRQ_LOWEST_OFFSET should be equal to OPENPIC_VEC_SOURCE
- */
-#ifndef qemu
-#define BSP_PCI_IRQ_NUMBER		(16)
-#else
-#define BSP_PCI_IRQ_NUMBER		(0)
-#endif
-#define BSP_PCI_IRQ_LOWEST_OFFSET	(BSP_ISA_IRQ_NUMBER)
-#define BSP_PCI_IRQ_MAX_OFFSET		(BSP_PCI_IRQ_LOWEST_OFFSET + BSP_PCI_IRQ_NUMBER - 1)
-/*
- * PowerPC exceptions handled as interrupt where an RTEMS managed interrupt
- * handler might be connected
- */
-#define BSP_PROCESSOR_IRQ_NUMBER	(1)
-#define BSP_PROCESSOR_IRQ_LOWEST_OFFSET (BSP_PCI_IRQ_MAX_OFFSET + 1)
-#define BSP_PROCESSOR_IRQ_MAX_OFFSET	(BSP_PROCESSOR_IRQ_LOWEST_OFFSET + BSP_PROCESSOR_IRQ_NUMBER - 1)
-/* Misc vectors for OPENPIC irqs (IPI, timers)
- */
-#ifndef qemu
-#define BSP_MISC_IRQ_NUMBER		(8)
-#else
-#define BSP_MISC_IRQ_NUMBER		(0)
-#endif
-
-#define BSP_MISC_IRQ_LOWEST_OFFSET	(BSP_PROCESSOR_IRQ_MAX_OFFSET + 1)
-#define BSP_MISC_IRQ_MAX_OFFSET		(BSP_MISC_IRQ_LOWEST_OFFSET + BSP_MISC_IRQ_NUMBER - 1)
-/*
- * Summary
- */
-#define BSP_IRQ_NUMBER			(BSP_MISC_IRQ_MAX_OFFSET + 1)
-#define BSP_LOWEST_OFFSET		(BSP_ISA_IRQ_LOWEST_OFFSET)
-#define BSP_MAX_OFFSET			(BSP_MISC_IRQ_MAX_OFFSET)
-/*
- * Some ISA IRQ symbolic name definition
- */
-#define BSP_ISA_PERIODIC_TIMER      	(0)
-#define BSP_ISA_KEYBOARD          	(1)
-#define BSP_ISA_UART_COM2_IRQ		(3)
-#define BSP_ISA_UART_COM1_IRQ		(4)
-#define BSP_ISA_RT_TIMER1	      	(8)
-#define BSP_ISA_RT_TIMER3		(10)
-/*
- * Some PCI IRQ symbolic name definition
- */
-#define BSP_PCI_IRQ0			(BSP_PCI_IRQ_LOWEST_OFFSET)
-#if     BSP_PCI_IRQ_NUMBER > 0
-#define BSP_PCI_ISA_BRIDGE_IRQ		(BSP_PCI_IRQ0)
-#endif
-
-#if defined(mvme2100)
-#define BSP_DEC21143_IRQ                (BSP_PCI_IRQ_LOWEST_OFFSET + 1)
-#define BSP_PMC_PCMIP_TYPE1_SLOT0_IRQ   (BSP_PCI_IRQ_LOWEST_OFFSET + 2)
-#define BSP_PCMIP_TYPE1_SLOT1_IRQ       (BSP_PCI_IRQ_LOWEST_OFFSET + 3)
-#define BSP_PCMIP_TYPE2_SLOT0_IRQ       (BSP_PCI_IRQ_LOWEST_OFFSET + 4)
-#define BSP_PCMIP_TYPE2_SLOT1_IRQ       (BSP_PCI_IRQ_LOWEST_OFFSET + 5)
-#define BSP_PCI_INTA_UNIVERSE_LINT0_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 7)
-#define BSP_PCI_INTB_UNIVERSE_LINT1_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 8)
-#define BSP_PCI_INTC_UNIVERSE_LINT2_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 9)
-#define BSP_PCI_INTD_UNIVERSE_LINT3_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 10)
-#define BSP_UART_COM1_IRQ               (BSP_PCI_IRQ_LOWEST_OFFSET + 13)
-#define BSP_FRONT_PANEL_ABORT_IRQ       (BSP_PCI_IRQ_LOWEST_OFFSET + 14)
-#define BSP_RTC_IRQ                     (BSP_PCI_IRQ_LOWEST_OFFSET + 15)
-#else
-#define BSP_UART_COM1_IRQ		BSP_ISA_UART_COM1_IRQ
-#define BSP_UART_COM2_IRQ		BSP_ISA_UART_COM2_IRQ
-#endif
-
-/*
- * Some Processor execption handled as RTEMS IRQ symbolic name definition
- */
-#define BSP_DECREMENTER			(BSP_PROCESSOR_IRQ_LOWEST_OFFSET)
-
-
-/*
- * Type definition for RTEMS managed interrupts
- */
-typedef unsigned short rtems_i8259_masks;
-
-extern  volatile rtems_i8259_masks i8259s_cache;
-
-/*-------------------------------------------------------------------------+
-| Function Prototypes.
-+--------------------------------------------------------------------------*/
-/*
- * ------------------------ Intel 8259 (or emulation) Mngt Routines -------
- */
-void BSP_i8259s_init(void);
-
-/*
- * function to disable a particular irq at 8259 level. After calling
- * this function, even if the device asserts the interrupt line it will
- * not be propagated further to the processor
- *
- * RETURNS: 1/0 if the interrupt was enabled/disabled originally or
- *          a value < 0 on error.
- */
-int BSP_irq_disable_at_i8259s        (const rtems_irq_number irqLine);
-/*
- * function to enable a particular irq at 8259 level. After calling
- * this function, if the device asserts the interrupt line it will
- * be propagated further to the processor
- */
-int BSP_irq_enable_at_i8259s		(const rtems_irq_number irqLine);
-/*
- * function to acknowledge a particular irq at 8259 level. After calling
- * this function, if a device asserts an enabled interrupt line it will
- * be propagated further to the processor. Mainly usefull for people
- * writing raw handlers as this is automagically done for RTEMS managed
- * handlers.
- */
-int BSP_irq_ack_at_i8259s           	(const rtems_irq_number irqLine);
-/*
- * function to check if a particular irq is enabled at 8259 level. After calling
- */
-int BSP_irq_enabled_at_i8259s        	(const rtems_irq_number irqLine);
-
-extern void BSP_rtems_irq_mng_init(unsigned cpuId);
-extern void BSP_i8259s_init(void);
-
-/* Stuff in irq_supp.h should eventually go into <rtems/irq.h> */
-#include <bsp/irq_supp.h>
-
-#ifdef __cplusplus
-};
-#endif
-
-#endif
-#endif
diff --git a/c/src/lib/libbsp/powerpc/motorola_powerpc/include/tm27.h b/c/src/lib/libbsp/powerpc/motorola_powerpc/include/tm27.h
deleted file mode 100644
index 81eb55a54a..0000000000
--- a/c/src/lib/libbsp/powerpc/motorola_powerpc/include/tm27.h
+++ /dev/null
@@ -1,64 +0,0 @@
-/*
- * @file
- * @ingroup powerpc_motorola_powerpc
- * @brief Implementations for interrupt mechanisms for Time Test 27
- */
-
-/*
- *  The license and distribution terms for this file may be
- *  found in the file LICENSE in this distribution or at
- *  http://www.rtems.org/license/LICENSE.
- */
-
-#ifndef _RTEMS_TMTEST27
-#error "This is an RTEMS internal file you must not include directly."
-#endif
-
-#ifndef __tm27_h
-#define __tm27_h
-
-/*
- *  Stuff for Time Test 27
- */
-
-#include <bsp/irq.h>
-
-#define MUST_WAIT_FOR_INTERRUPT 1
-
-void nullFunc() {}
-static rtems_irq_connect_data clockIrqData = {BSP_DECREMENTER,
-					      0,
-					      (rtems_irq_enable)nullFunc,
-					      (rtems_irq_disable)nullFunc,
-					      (rtems_irq_is_enabled) nullFunc};
-void Install_tm27_vector(void (*_handler)())
-{
-  clockIrqData.hdl = _handler;
-  if (!BSP_install_rtems_irq_handler (&clockIrqData)) {
-	printk("Error installing clock interrupt handler!\n");
-	rtems_fatal_error_occurred(1);
-  }
-}
-
-#define Cause_tm27_intr()  \
-  do { \
-    uint32_t   _clicks = 8; \
-    __asm__ volatile( "mtdec %0" : "=r" ((_clicks)) : "r" ((_clicks)) ); \
-  } while (0)
-
-#define Clear_tm27_intr() \
-  do { \
-    uint32_t   _clicks = 0xffffffff; \
-    __asm__ volatile( "mtdec %0" : "=r" ((_clicks)) : "r" ((_clicks)) ); \
-  } while (0)
-
-#define Lower_tm27_intr() \
-  do { \
-    uint32_t   _msr = 0; \
-    _ISR_Set_level( 0 ); \
-    __asm__ volatile( "mfmsr %0 ;" : "=r" (_msr) : "r" (_msr) ); \
-    _msr |=  0x8002; \
-    __asm__ volatile( "mtmsr %0 ;" : "=r" (_msr) : "r" (_msr) ); \
-  } while (0)
-
-#endif