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| author | Joel Sherrill <joel.sherrill@OARcorp.com> | 1999-10-27 17:25:53 +0000 |
|---|---|---|
| committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 1999-10-27 17:25:53 +0000 |
| commit | ae7325bdc85e1dd39f039b66ba20ca681712dcc3 (patch) | |
| tree | b90f303df4b2cefcd3155f164e16d177bcfb18f9 /c/src/lib/libbsp/i960/rxgen960/startup | |
| parent | Added CVS Ids and a basic header. More header cleanup needed. (diff) | |
| download | rtems-ae7325bdc85e1dd39f039b66ba20ca681712dcc3.tar.bz2 | |
rxgen960 now compiles -- may not link.
Diffstat (limited to 'c/src/lib/libbsp/i960/rxgen960/startup')
5 files changed, 17 insertions, 17 deletions
diff --git a/c/src/lib/libbsp/i960/rxgen960/startup/asmstub.S b/c/src/lib/libbsp/i960/rxgen960/startup/asmstub.S index aa970a312f..193f5a7e4d 100644 --- a/c/src/lib/libbsp/i960/rxgen960/startup/asmstub.S +++ b/c/src/lib/libbsp/i960/rxgen960/startup/asmstub.S @@ -64,7 +64,7 @@ _asm_sysctl: .text _asm_ipend: chkbit 0, g1 - alterbit g0, sf0, sf0 + /* alterbit g0, sf0, sf0 XXX JRS */ ret ######################################################################## # @@ -82,7 +82,7 @@ _asm_ipend: .text _asm_imask: chkbit 0, g1 - alterbit g0, sf1, sf1 + /* alterbit g0, sf1, sf1 XXX JRS */ ret @@ -100,7 +100,7 @@ _asm_imask: .text _asm_get_imask: - mov sf1, g0 + /* mov sf1, g0 XXX JRS */ ret ######################################################################## diff --git a/c/src/lib/libbsp/i960/rxgen960/startup/cntrltbl.c b/c/src/lib/libbsp/i960/rxgen960/startup/cntrltbl.c index 8fc01ea212..07835ede2a 100644 --- a/c/src/lib/libbsp/i960/rxgen960/startup/cntrltbl.c +++ b/c/src/lib/libbsp/i960/rxgen960/startup/cntrltbl.c @@ -20,11 +20,11 @@ /* Bus configuration */ -#define RP_CONFIG_REGS BUS_WIDTH_32 -#define FLASH BUS_WIDTH_8 -#define DRAM BUS_WIDTH_32 -#define UART_LED BUS_WIDTH_8 -#define DEFAULT BUS_WIDTH_32 +#define RP_CONFIG_REGS I960RP_BUS_WIDTH_32 +#define FLASH I960RP_BUS_WIDTH_8 +#define DRAM I960RP_BUS_WIDTH_32 +#define UART_LED I960RP_BUS_WIDTH_8 +#define DEFAULT I960RP_BUS_WIDTH_32 /* Region Configuration */ #define REGION_0_CONFIG RP_CONFIG_REGS diff --git a/c/src/lib/libbsp/i960/rxgen960/startup/fault.c b/c/src/lib/libbsp/i960/rxgen960/startup/fault.c index 72bec05b53..6142851fd2 100644 --- a/c/src/lib/libbsp/i960/rxgen960/startup/fault.c +++ b/c/src/lib/libbsp/i960/rxgen960/startup/fault.c @@ -70,7 +70,7 @@ int faultOk(int fault) userFaultTable[fault].cnt ++; /* Check sum has changed. */ -#ifdef 0 +#if 0 faultCheckSum = faultNewCheckSum(); #endif faultCheckSum ++; @@ -95,7 +95,7 @@ void faultBad(int invokedFromRom, /* At this point RAM is repaired. Do * whatever you want. */ -# ifdef 0 +#if 0 if (OsfIsUp) { asm_exit(romFaultStart, & ram_prcb); } @@ -117,7 +117,7 @@ void faultGood(unsigned int inst, unsigned int * faultBuffer, userFaultTable[type].cnt --; /* Check sum has changed. */ -#ifdef 0 +#if 0 faultCheckSum = faultNewCheckSum(); #endif faultCheckSum --; diff --git a/c/src/lib/libbsp/i960/rxgen960/startup/rom_cntrltbl.c b/c/src/lib/libbsp/i960/rxgen960/startup/rom_cntrltbl.c index b94b96fc9a..6f3d97d6b0 100644 --- a/c/src/lib/libbsp/i960/rxgen960/startup/rom_cntrltbl.c +++ b/c/src/lib/libbsp/i960/rxgen960/startup/rom_cntrltbl.c @@ -20,11 +20,11 @@ /* Bus configuration */ -#define RP_CONFIG_REGS BUS_WIDTH_32 -#define FLASH BUS_WIDTH_8 -#define DRAM BUS_WIDTH_32 -#define UART_LED BUS_WIDTH_8 -#define DEFAULT BUS_WIDTH_32 +#define RP_CONFIG_REGS I960RP_BUS_WIDTH_32 +#define FLASH I960RP_BUS_WIDTH_8 +#define DRAM I960RP_BUS_WIDTH_32 +#define UART_LED I960RP_BUS_WIDTH_8 +#define DEFAULT I960RP_BUS_WIDTH_32 /* Region Configuration */ #define REGION_0_CONFIG RP_CONFIG_REGS diff --git a/c/src/lib/libbsp/i960/rxgen960/startup/rxgen_romld.S b/c/src/lib/libbsp/i960/rxgen960/startup/rxgen_romld.S index b939f16325..4b2076c764 100644 --- a/c/src/lib/libbsp/i960/rxgen960/startup/rxgen_romld.S +++ b/c/src/lib/libbsp/i960/rxgen960/startup/rxgen_romld.S @@ -80,7 +80,7 @@ SYM(_romFaultStart) : mov 0, g14 - ldconst 0, sf0 + /* ldconst 0, sf0 XXX JRS */ /* # To get ready to invoke procedures. # I'll use supervisor stack. |