rxgen960 now compiles -- may not link.

11 files changed, 32 insertions, 42 deletions

diff --git a/c/src/lib/libbsp/i960/rxgen960/console/Makefile.in b/c/src/lib/libbsp/i960/rxgen960/console/Makefile.in
index ee5e18a41a..a3076111ff 100644
--- a/c/src/lib/libbsp/i960/rxgen960/console/Makefile.in
+++ b/c/src/lib/libbsp/i960/rxgen960/console/Makefile.in
@@ -16,7 +16,7 @@ VPATH = @srcdir@
 PGM = ${ARCH}/console.rel
 
 # C source names, if any, go here -- minus the .c
-C_PIECES = console pcimsgreg
+C_PIECES = console
 C_FILES = $(C_PIECES:%=%.c)
 C_O_FILES = $(C_PIECES:%=${ARCH}/%.o)
 
diff --git a/c/src/lib/libbsp/i960/rxgen960/console/console.c b/c/src/lib/libbsp/i960/rxgen960/console/console.c
index d62e96869d..4f34cd50ac 100644
--- a/c/src/lib/libbsp/i960/rxgen960/console/console.c
+++ b/c/src/lib/libbsp/i960/rxgen960/console/console.c
@@ -21,7 +21,7 @@
 #include <bsp.h>
 #include <rtems/libio.h>
 #include "concntl.h"
-#include "pcimsgreg.h"
+/* #include "pcimsgreg.h" XXX JRS */
 
 #ifndef lint
 static char _sccsid[] = "@(#)console.c 09/12/96     1.13\n";
diff --git a/c/src/lib/libbsp/i960/rxgen960/include/bsp.h b/c/src/lib/libbsp/i960/rxgen960/include/bsp.h
index a45e8221eb..52f8258010 100644
--- a/c/src/lib/libbsp/i960/rxgen960/include/bsp.h
+++ b/c/src/lib/libbsp/i960/rxgen960/include/bsp.h
@@ -90,9 +90,9 @@ extern "C" {
  *  Returns the PRCB pointer.
  */
 
-static inline PRCB *get_prcb( void )
+static inline i960_PRCB *get_prcb( void )
 {
-  register PRCB *_prcb = 0;
+  register i960_PRCB *_prcb = 0;
 
   asm volatile( "calls 5; \
                  mov   g0,%0" \
@@ -118,18 +118,8 @@ static inline PRCB *get_prcb( void )
 
 extern rtems_configuration_table BSP_Configuration;
 
-BSP_EXTERN PRCB          *Prcb;
-BSP_EXTERN CNTL_TBL      *Ctl_tbl;
-
-/*
-#if defined(i960ca)
-BSP_EXTERN i960ca_control_table *Ctl_tbl;
-#elif defined(i960rp)
-BSP_EXTERN i960rp_control_table *Ctl_tbl;
-#else
-#error "invalid processor selection!"
-#endif
-*/
+BSP_EXTERN i960_PRCB          *Prcb;
+BSP_EXTERN i960_control_table *Ctl_tbl;
 
 /*
  *  Device Driver Table Entries
diff --git a/c/src/lib/libbsp/i960/rxgen960/include/rxgen960_config.h b/c/src/lib/libbsp/i960/rxgen960/include/rxgen960_config.h
index d424397299..e637fa7bf0 100644
--- a/c/src/lib/libbsp/i960/rxgen960/include/rxgen960_config.h
+++ b/c/src/lib/libbsp/i960/rxgen960/include/rxgen960_config.h
@@ -8,11 +8,11 @@
 #define __PMC901_CONFIG__

 /* The following define the PMC960 bus regions */

 /* Bus configuration */

-#define RP_CONFIG_REGS     BUS_WIDTH(32)

-#define FLASH              BUS_WIDTH(8)

-#define DRAM               BUS_WIDTH(32)

-#define UART_LED           BUS_WIDTH(8)

-#define DEFAULT            BUS_WIDTH(32)

+#define RP_CONFIG_REGS     I960RP_BUS_WIDTH(32)

+#define FLASH              I960RP_BUS_WIDTH(8)

+#define DRAM               I960RP_BUS_WIDTH(32)

+#define UART_LED           I960RP_BUS_WIDTH(8)

+#define DEFAULT            I960RP_BUS_WIDTH(32)

 

 /* Region Configuration */

 #define  REGION_0_CONFIG      RP_CONFIG_REGS

@@ -23,7 +23,7 @@
 #define  REGION_A_CONFIG      DRAM

 #define  REGION_C_CONFIG      UART_LED

 #define  REGION_E_CONFIG      DEFAULT

-/* #define  REGION_BOOT_CONFIG   (FLASH | BYTE_ORDER)*/

+/* #define  REGION_BOOT_CONFIG   (FLASH | I960RP_ZBYTE_ORDER)*/

 #define  REGION_BOOT_CONFIG   (DRAM)

 

 /* #define  DRAM_BASE	0xfed00000 */

diff --git a/c/src/lib/libbsp/i960/rxgen960/startup/asmstub.S b/c/src/lib/libbsp/i960/rxgen960/startup/asmstub.S
index aa970a312f..193f5a7e4d 100644
--- a/c/src/lib/libbsp/i960/rxgen960/startup/asmstub.S
+++ b/c/src/lib/libbsp/i960/rxgen960/startup/asmstub.S
@@ -64,7 +64,7 @@ _asm_sysctl:
 	.text
 _asm_ipend:
 	chkbit	 0, g1
-	alterbit g0, sf0, sf0
+	/* alterbit g0, sf0, sf0 XXX JRS */
 	ret
 ########################################################################
 #
@@ -82,7 +82,7 @@ _asm_ipend:
 	.text
 _asm_imask:
 	chkbit	 0, g1
-	alterbit g0, sf1, sf1
+	/* alterbit g0, sf1, sf1 XXX JRS */
 	ret
 
 
@@ -100,7 +100,7 @@ _asm_imask:
 
 	.text
 _asm_get_imask:
-	mov		sf1, g0
+	/* mov		sf1, g0 XXX JRS */
 	ret
 
 ########################################################################
diff --git a/c/src/lib/libbsp/i960/rxgen960/startup/cntrltbl.c b/c/src/lib/libbsp/i960/rxgen960/startup/cntrltbl.c
index 8fc01ea212..07835ede2a 100644
--- a/c/src/lib/libbsp/i960/rxgen960/startup/cntrltbl.c
+++ b/c/src/lib/libbsp/i960/rxgen960/startup/cntrltbl.c
@@ -20,11 +20,11 @@
 
 
 /* Bus configuration */
-#define RP_CONFIG_REGS     BUS_WIDTH_32
-#define FLASH              BUS_WIDTH_8
-#define DRAM               BUS_WIDTH_32
-#define UART_LED           BUS_WIDTH_8
-#define DEFAULT            BUS_WIDTH_32
+#define RP_CONFIG_REGS     I960RP_BUS_WIDTH_32
+#define FLASH              I960RP_BUS_WIDTH_8
+#define DRAM               I960RP_BUS_WIDTH_32
+#define UART_LED           I960RP_BUS_WIDTH_8
+#define DEFAULT            I960RP_BUS_WIDTH_32
 
 /* Region Configuration */
 #define  REGION_0_CONFIG      RP_CONFIG_REGS
diff --git a/c/src/lib/libbsp/i960/rxgen960/startup/fault.c b/c/src/lib/libbsp/i960/rxgen960/startup/fault.c
index 72bec05b53..6142851fd2 100644
--- a/c/src/lib/libbsp/i960/rxgen960/startup/fault.c
+++ b/c/src/lib/libbsp/i960/rxgen960/startup/fault.c
@@ -70,7 +70,7 @@ int faultOk(int fault)
     userFaultTable[fault].cnt ++;
       /* Check sum has changed.
        */
-#ifdef 0
+#if 0
     faultCheckSum = faultNewCheckSum();
 #endif
     faultCheckSum ++; 
@@ -95,7 +95,7 @@ void faultBad(int invokedFromRom,
      /* At this point RAM is repaired. Do
       * whatever you want.
       */
-# ifdef 0
+#if 0
   if (OsfIsUp)  {    
     asm_exit(romFaultStart, & ram_prcb);
   }
@@ -117,7 +117,7 @@ void faultGood(unsigned int inst, unsigned int * faultBuffer,
     userFaultTable[type].cnt --;
       /* Check sum has changed.
        */
-#ifdef 0
+#if 0
     faultCheckSum = faultNewCheckSum();
 #endif
     faultCheckSum --;
diff --git a/c/src/lib/libbsp/i960/rxgen960/startup/rom_cntrltbl.c b/c/src/lib/libbsp/i960/rxgen960/startup/rom_cntrltbl.c
index b94b96fc9a..6f3d97d6b0 100644
--- a/c/src/lib/libbsp/i960/rxgen960/startup/rom_cntrltbl.c
+++ b/c/src/lib/libbsp/i960/rxgen960/startup/rom_cntrltbl.c
@@ -20,11 +20,11 @@
 
 
 /* Bus configuration */
-#define RP_CONFIG_REGS     BUS_WIDTH_32
-#define FLASH              BUS_WIDTH_8
-#define DRAM               BUS_WIDTH_32
-#define UART_LED           BUS_WIDTH_8
-#define DEFAULT            BUS_WIDTH_32
+#define RP_CONFIG_REGS     I960RP_BUS_WIDTH_32
+#define FLASH              I960RP_BUS_WIDTH_8
+#define DRAM               I960RP_BUS_WIDTH_32
+#define UART_LED           I960RP_BUS_WIDTH_8
+#define DEFAULT            I960RP_BUS_WIDTH_32
 
 /* Region Configuration */
 #define  REGION_0_CONFIG      RP_CONFIG_REGS
diff --git a/c/src/lib/libbsp/i960/rxgen960/startup/rxgen_romld.S b/c/src/lib/libbsp/i960/rxgen960/startup/rxgen_romld.S
index b939f16325..4b2076c764 100644
--- a/c/src/lib/libbsp/i960/rxgen960/startup/rxgen_romld.S
+++ b/c/src/lib/libbsp/i960/rxgen960/startup/rxgen_romld.S
@@ -80,7 +80,7 @@ SYM(_romFaultStart) :
 
 	mov	0, g14
 
-	ldconst	0, sf0
+	/* ldconst	0, sf0 XXX JRS */
 /*
 	  # To get ready to invoke procedures.
 	  # I'll use supervisor stack.
diff --git a/c/src/lib/libbsp/i960/rxgen960/timer/Makefile.in b/c/src/lib/libbsp/i960/rxgen960/timer/Makefile.in
index aa40bfe26a..231d0811f4 100644
--- a/c/src/lib/libbsp/i960/rxgen960/timer/Makefile.in
+++ b/c/src/lib/libbsp/i960/rxgen960/timer/Makefile.in
@@ -23,7 +23,7 @@ C_O_FILES = $(C_PIECES:%=${ARCH}/%.o)
 H_FILES =
 
 # Assembly source names, if any, go here -- minus the .S
-S_PIECES = timerisr
+S_PIECES = 
 S_FILES = $(S_PIECES:%=%.S)
 S_O_FILES = $(S_FILES:%.S=${ARCH}/%.o)
 
diff --git a/c/src/lib/libbsp/i960/rxgen960/timer/timerisr.S b/c/src/lib/libbsp/i960/rxgen960/timer/timerisr.S
index 3c1368f130..60db891b58 100644
--- a/c/src/lib/libbsp/i960/rxgen960/timer/timerisr.S
+++ b/c/src/lib/libbsp/i960/rxgen960/timer/timerisr.S
@@ -50,8 +50,8 @@ SYM (_timerisr):
         addo    1,r6,r6
         st      r6,_Ttimer_val           # increment test timer
 loop_til_cleared:
-        clrbit 4,sf0,sf0
-        bbs    4,sf0,loop_til_cleared
+        /* clrbit 4,sf0,sf0 XXX JRS */
+        /* bbs    4,sf0,loop_til_cleared XXX JRS */
 leaf:   ret
 
         .leafproc _flush_reg, flush_reg.lf