Remove stray white spaces.

2 files changed, 69 insertions, 69 deletions

diff --git a/c/src/lib/libbsp/i386/ts_386ex/start/80386ex.h b/c/src/lib/libbsp/i386/ts_386ex/start/80386ex.h
index 8c2c5caeff..a62f08f425 100644
--- a/c/src/lib/libbsp/i386/ts_386ex/start/80386ex.h
+++ b/c/src/lib/libbsp/i386/ts_386ex/start/80386ex.h
@@ -8,7 +8,7 @@
  *  The license and distribution terms for this file may be
  *  found in the file LICENSE in this distribution or at
  *  http://www.rtems.com/license/LICENSE.
- *  
+ *
  *  $Id$
  */
 
diff --git a/c/src/lib/libbsp/i386/ts_386ex/start/start.S b/c/src/lib/libbsp/i386/ts_386ex/start/start.S
index 1add645b37..53c28c5585 100644
--- a/c/src/lib/libbsp/i386/ts_386ex/start/start.S
+++ b/c/src/lib/libbsp/i386/ts_386ex/start/start.S
@@ -2,14 +2,14 @@
  *  This file is the main boot and configuration file for the TS-1325. It is
  *  solely responsible for initializing the internal register set to reflect
  *  the proper board configuration.  This version is modified from the i386ex
- *  BSP startup:	
+ *  BSP startup:
  *
  *    1) 1 MB RAM @ 0x0100000
  *    2) 1 MB RAM @ 0x0 but with standard DOS memory usage.
  *    3) Timer0 used as RTEMS clock ticker, 1 msec tick rate.
  *    4) READY# is generated by CPU
  *
- *  The file describes the ".initial" section, which contains:	
+ *  The file describes the ".initial" section, which contains:
  *     1) device configuration code
  *     2) interrupt descriptor table
  *     3) global descriptor table
@@ -33,12 +33,12 @@
 #include "80386ex.inc"
 
 #include "ts_1325.inc"             /* controls for LED and button */
-	
+
 /*
  * NEW_GAS Needed for binutils 2.9.1.0.7 and higher
- */			
+ */
 
-        EXTERN (boot_card)         /* exits to bspstart   */ 
+        EXTERN (boot_card)         /* exits to bspstart   */
 	EXTERN (_DOS_seg_base)     /* defined in startup/linkcmds */
 	EXTERN (Clock_exit)
 
@@ -49,34 +49,34 @@
 
 	PUBLIC( SYM(_init_i386ex) )
 
-	
+
 	.section .initial, "ax"
 
 /*
  * Enable access to peripheral register at expanded I/O addresses
  */
-SYM(_init_i386ex):	
+SYM(_init_i386ex):
 	.code16
 /*
 	LED_GREEN
 	WAIT_BUTTON
 */
 #	cli                    Move this up for now for debug.
-	movw    $0x8000	, ax           
+	movw    $0x8000	, ax
 	outb	al , $REMAPCFGH
 	xchg	al , ah
         outb    al , $REMAPCFGL
 	outw    ax , $REMAPCFG ;
-/*	
+/*
 	LED_OFF
 	WAIT_BUTTON
 */
 /*
  * Configure operation of the A20 Address Line
- */	
+ */
 SYM(A20):
 	movw	$PORT92 , dx
-	
+
 	inb	dx      , al   # clear A20 port reset
 	andb    $0xfe	, al   # b0 Fast Reset(0)=disabled,(1)=reset triggered
 	orb	$0x02	, al   # Bit 1 Fast A20 = 0 (always 0) else enabled.
@@ -88,14 +88,14 @@ SYM(A20):
 SYM(Watchdog):
 	movw	$WDTSTATUS	, dx    # address the WDT status port
 	inb	dx		, al	# get the WDT status
-	orb	$0x01		, al	# set the CLKDIS bit 
+	orb	$0x01		, al	# set the CLKDIS bit
 	outb	al		, dx	# disable the clock to the WDT
 /*
 	LED_GREEN
 	WAIT_BUTTON
 */
 /*
- * Initialize Refresh Control Unit for:	
+ * Initialize Refresh Control Unit for:
  *	Refresh Address = 0x0000
 
  *	Refresh gate between rows is 20.0 (???) uSec
@@ -108,7 +108,7 @@ SYM(Watchdog):
  */
 
 /*
-SYM(InitRCU):		
+SYM(InitRCU):
 	SetExRegWord( RFSCIR , 0x1F4)	# refresh interval 500
 	SetExRegWord( RFSBAD , 0x0)	# base address
 	SetExRegWord( RFSADD , 0x0)	# address register
@@ -120,15 +120,15 @@ SYM(InitRCU):
 	WAIT_BUTTON
 */
 /*
- * Initialize clock and power mgmt unit for:	
+ * Initialize clock and power mgmt unit for:
  *	Clock Frequency = 50 Mhz
  *	Prescaled clock output = 1 Mhz
  *      Normal halt instructions
  *
- *      NOTE: Hope this doesn't change the COMCLK frequency 
+ *      NOTE: Hope this doesn't change the COMCLK frequency
  */
-	
-SYM(InitClk):	 
+
+SYM(InitClk):
 	SetExRegByte( PWRCON, 0x0 )
 	SetExRegWord( CLKPRS, 0x17)	# 0x13 for 1.19318 MHz.  0x17 for 1MHz.
 
@@ -140,7 +140,7 @@ SYM(InitClk):
 	WAIT_BUTTON
 */
 /*
- *	Initialize I/O port 1 for:	
+ *	Initialize I/O port 1 for:
  *	PIN 0 = 0,	Inport for external push-button switch
  *	PIN 1 = 1,	RTS0# to package pin
  *	PIN 2 = 1,	DTR0# to package pin
@@ -151,7 +151,7 @@ SYM(InitClk):
  *	PIN 7 = 0,	Inport ???
  */
 
-SYM(InitPort1):		
+SYM(InitPort1):
 	SetExRegByte( P1LTC	, 0xd1 )
 	SetExRegByte( P1DIR	, 0x91)
 	SetExRegByte( P1CFG	, 0x0e)
@@ -160,9 +160,9 @@ SYM(InitPort1):
 	WAIT_BUTTON
 */
 /*
- *	Initialize I/O port 2 for:	
+ *	Initialize I/O port 2 for:
  *	PIN 0 = 0,	Outport ???
- *	PIN 1 = 0,	Outport ??? 
+ *	PIN 1 = 0,	Outport ???
  *	PIN 2 = 0,	Outport ???
  *	PIN 3 = 0,	Outport ???
  *	PIN 4 = 0,	Outport ???
@@ -170,8 +170,8 @@ SYM(InitPort1):
  *	PIN 6 = 1,	Int. periph, TXD0
  *	PIN 7 = 0,	Outport ???
  */
-	
-SYM(InitPort2):	
+
+SYM(InitPort2):
 	SetExRegByte( P2LTC	, 0x1f )
 	SetExRegByte( P2DIR	, 0x00  )
 	SetExRegByte( P2CFG	, 0x60)
@@ -180,18 +180,18 @@ SYM(InitPort2):
 	WAIT_BUTTON
 */
 /*
- *	Initialize I/O port 3 P3CFG	
+ *	Initialize I/O port 3 P3CFG
  *	PIN 0 = 1,	Int. periph, TMROUT0
- *	PIN 1 = 1,	Int. periph, TMROUT1 
- *	PIN 2 = 1,	Int. periph, INT0 (IR1) 
- *	PIN 3 = 1,	Int. periph, INT1 (IR5) 
- *	PIN 4 = 1,	Int. periph, INT2 (IR6) 
- *	PIN 5 = 1,	Int. periph, INT2 (IR7) 
+ *	PIN 1 = 1,	Int. periph, TMROUT1
+ *	PIN 2 = 1,	Int. periph, INT0 (IR1)
+ *	PIN 3 = 1,	Int. periph, INT1 (IR5)
+ *	PIN 4 = 1,	Int. periph, INT2 (IR6)
+ *	PIN 5 = 1,	Int. periph, INT2 (IR7)
  *	PIN 6 = 0,	Outport ???
  *	PIN 7 = 1,	Int. periph, COMCLK used for serial I/O
  */
-	
-SYM(InitPort3):		
+
+SYM(InitPort3):
 	SetExRegByte( P3LTC	, 0x00 )
 	SetExRegByte( P3DIR	, 0xbf )
 	SetExRegByte( P3CFG	, 0xbf )  # can check TMROUT0
@@ -200,7 +200,7 @@ SYM(InitPort3):
 	WAIT_BUTTON
 */
 /*
- *	Initialize Peripheral Pin Configurations:	
+ *	Initialize Peripheral Pin Configurations:
  *	PIN 0 = 1,	Select RTS1#
  *	PIN 1 = 1,	Select DTR1#
  *	PIN 2 = 1,	Select TXD1#
@@ -210,23 +210,23 @@ SYM(InitPort3):
  *	PIN 6 = 0,	Select CS6#
  *	PIN 7 = 0,	Don't care
  */
-	
-SYM(InitPeriph):	
-	SetExRegByte( PINCFG , 0x3f) 
+
+SYM(InitPeriph):
+	SetExRegByte( PINCFG , 0x3f)
 /*
 	LED_GREEN
 	WAIT_BUTTON
 */
 /*
- *	Initialize the Asynchronous Serial Ports:	
+ *	Initialize the Asynchronous Serial Ports:
  *	BIT 7 = 1,	Internal SIO1 modem signals
  *	BIT 6 = 1,	Internal SIO0 modem signals
  *	BIT 2 = 0,	PSCLK for SSIO clock
- *	BIT 1 = 1,	SERCLK for SIO1 clock 
+ *	BIT 1 = 1,	SERCLK for SIO1 clock
  *	BIT 0 = 1,	SERCLK for SIO0 clock
  */
 
-SYM(InitSIO):	
+SYM(InitSIO):
 	SetExRegByte( SIOCFG, 0x00 ) # COMCLK -> baud-rate generator
                                      # modem signals -> package pins
 	SetExRegByte( LCR0, 0x80 )  # latch DLL0, DLH0
@@ -235,8 +235,8 @@ SYM(InitSIO):
 	SetExRegByte( LCR0, 0x03 )  # enable r/w buffers, IER0 accessible
 			            # mode 8-n-1
 	SetExRegByte( IER0, 0x00 )  # no generated interrupts
-	
-	SetExRegByte( LCR1, 0x80 )  # latch DLL0, DLH0 
+
+	SetExRegByte( LCR1, 0x80 )  # latch DLL0, DLH0
 	SetExRegByte( DLL1, 0x01 )  # 0x0C set to 9600 baud, 0x6 = 19.2K
 	SetExRegByte( DLH1, 0x00 )  # 0x4 is 28.8K baud
  	SetExRegByte( LCR1, 0x03 )  # enable r/w buffers, IER1 accessible
@@ -251,43 +251,43 @@ SYM(InitMCR):
 	SetExRegByte( MCR1, 0x03 )  # standard mode, RTS,DTR activated
 
 /*
- *	Initialize Timer for:	
+ *	Initialize Timer for:
  *	BIT 7 = 1,	Timer clocks disabled
  *      BIT 6 = 0,      Reserved
  *	BIT 5 = 1,	TMRCLK2 instead of Vcc to Gate2
  *	BIT 4 = 0,	PSCLK to CLK2
  *	BIT 3 = 1,	TMRCLK1 instead of Vcc to Gate1
  *	BIT 2 = 0,	PSCLK to Gate1
- *	BIT 1 = 0,	Vcc to Gate0	
+ *	BIT 1 = 0,	Vcc to Gate0
  *	BIT 0 = 0,	PSCLK to Gate0
  */
 /*
 	LED_YELLOW
 	WAIT_BUTTON
 */
-SYM(InitTimer):	
-	SetExRegByte(TMRCFG , 0x80 ) # All counters disabled, Gates 0,1 
+SYM(InitTimer):
+	SetExRegByte(TMRCFG , 0x80 ) # All counters disabled, Gates 0,1
 	                             # and 2 are set to Vcc
 
 	SetExRegByte(TMRCON , 0x34 ) # prepare to write counter 0 LSB,MSB
 	SetExRegByte(TMR0   , 0x00 ) # sfa
-	SetExRegByte(TMR0   , 0x00 ) # sfa 
+	SetExRegByte(TMR0   , 0x00 ) # sfa
+
 
-			
 	SetExRegByte(TMRCON , 0x70 ) # mode 0 disables on Gate= Vcc
-	SetExRegByte(TMR1   , 0x00 ) # sfa 
 	SetExRegByte(TMR1   , 0x00 ) # sfa
-	
+	SetExRegByte(TMR1   , 0x00 ) # sfa
+
 	SetExRegByte(TMRCON , 0xB0 ) # mode 0 disables on gate =Vcc
-	SetExRegByte(TMR2   , 0x00 ) #  
-	SetExRegByte(TMR2   , 0x00 ) #  
+	SetExRegByte(TMR2   , 0x00 ) #
+	SetExRegByte(TMR2   , 0x00 ) #
 
 /*
 	LED_GREEN
 	WAIT_BUTTON
 */
 /*
- *	Initialize the DMACFG register for:	
+ *	Initialize the DMACFG register for:
  *	BIT 7    = 1  ,	Disable DACK#1
  *	BITs 6:4 = 100, TMROUT2 connected to DRQ1
  *	BIT 3    = 1  ,	Disable DACK0#
@@ -315,7 +315,7 @@ SYM(InitTimer):
  */
 
 SYM(InitInt):
-	
+
 	cli				  # !
 /*
 	LED_YELLOW
@@ -330,7 +330,7 @@ SYM(InitInt):
 	SetExRegByte(ICW2M  , 0x20 ) # base vector starts at byte 32
 	SetExRegByte(ICW3M  , 0x04)  # internal slave cascaded from master IR2
 	SetExRegByte(ICW4M  , 0x01 ) # idem
-	
+
 	SetExRegByte(OCW1M  , 0xfb ) # mask master IRQs, but not IR2 (cascade)
 	SetExRegByte(OCW1S  , 0xff ) # mask all slave IRQs
 	SetExRegByte(INTCFG , 0x00 ) # slave IRs -> Vss or SSIOINT
@@ -346,11 +346,11 @@ SYM(InitInt):
 /*
 	NOTE: not sure about this so comment out...
 
-SYM(SetCS4):	
+SYM(SetCS4):
 	SetExRegWord(CS4ADL , 0x702)         #Configure chip select 4
 	SetExRegWord(CS4ADH , 0x00)
-	SetExRegWord(CS4MSKH, 0x03F)     
-	SetExRegWord(CS4MSKL, 0xFC01)  
+	SetExRegWord(CS4MSKH, 0x03F)
+	SetExRegWord(CS4MSKL, 0xFC01)
 */
 /*
 	LED_GREEN
@@ -364,10 +364,10 @@ SYM(SetCS4):
 	movl	$SYM(GDTR), eax
 	andl	$0xFFFF, eax
 
-#ifdef NEW_GAS	
+#ifdef NEW_GAS
 	addr32
 	data32
-#endif	
+#endif
 
 #if 0
         lgdt	 (eax)                    #  location of GDT in segment
@@ -375,11 +375,11 @@ SYM(SetCS4):
         lgdt SYM(GDTR) #  location of GDT
 
 /*
-	NOTE: not sure about this either so comment out for now...	
-SYM(SetUCS):		
+	NOTE: not sure about this either so comment out for now...
+SYM(SetUCS):
  	SetExRegWord(UCSADL, 0xC503)      # values taken from TS-1325 memory
  	SetExRegWord(UCSADH, 0x000D)
-	SetExRegWord(UCSMSKH, 0x0000)	
+	SetExRegWord(UCSMSKH, 0x0000)
 	SetExRegWord(UCSMSKL, 0x3C01)     # configure upper chip select
 */
 /*
@@ -392,7 +392,7 @@ SYM(SetUCS):
 	mov	cr0, eax
 	orw	$0x1, ax
 	mov	eax, cr0
-	
+
 /**************************
  * Flush prefetch queue,
  * and load CS selector
@@ -406,7 +406,7 @@ SYM(SetUCS):
 /*
  * Load the segment registers
  */
-SYM(_load_segment_registers):	
+SYM(_load_segment_registers):
 	.code32
 /*
 	LED_GREEN
@@ -417,7 +417,7 @@ SYM(_load_segment_registers):
 	pLOAD_SEGMENT( GDT_DATA_PTR, ss)
 	pLOAD_SEGMENT( GDT_DATA_PTR, ds)
 	pLOAD_SEGMENT( GDT_DATA_PTR, es)
-	
+
 /*
  *  Set up the stack
  */
@@ -482,7 +482,7 @@ SYM (zero_bss):
 	.balign 4	                 # align tables to 4 byte boundary
 
 SYM(IDTR):	DESC3( SYM(Interrupt_descriptor_table), 0x07ff );
-	
+
 SYM(Interrupt_descriptor_table):   /* Now in data section */
 	.rept 256
 	.word 0,0,0,0
@@ -493,8 +493,8 @@ SYM(Interrupt_descriptor_table):   /* Now in data section */
  *  Use the first (null) entry in the the GDT as a self-pointer for the GDTR.
  *  (looks like a common trick)
  */
-			
-SYM (_Global_descriptor_table): 
+
+SYM (_Global_descriptor_table):
 SYM(GDTR):	DESC3( GDTR, 0x17 );      # one less than the size
 	        .word 0                   # padding to DESC2 size
 SYM(GDT_CODE):	DESC2(0xffff,0,0x0,0x9B,0xDF,0x00);